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    Searched refs:getMachineOpcode (Results 1 - 21 of 21) sorted by null

  /external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGSDNodes.cpp 83 N->getMachineOpcode() == TargetOpcode::IMPLICIT_DEF))
124 const MCInstrDesc &II = TII->get(Def->getMachineOpcode());
304 unsigned Opc = Node->getMachineOpcode();
364 if (N->isMachineOpcode() && TII->get(N->getMachineOpcode()).isCall())
382 if (N->isMachineOpcode() && TII->get(N->getMachineOpcode()).isCall())
439 unsigned Opc = MainNode->getMachineOpcode();
454 TII->get(N->getMachineOpcode()).getImplicitDefs()) {
459 if (NumUsed > TII->get(N->getMachineOpcode()).getNumDefs())
544 unsigned POpc = Node->getMachineOpcode();
550 unsigned NRegDefs = SchedDAG->TII->get(Node->getMachineOpcode()).getNumDefs()
    [all...]
ResourcePriorityQueue.cpp 260 switch (SU->getNode()->getMachineOpcode()) {
263 SU->getNode()->getMachineOpcode())))
300 switch (SU->getNode()->getMachineOpcode()) {
303 SU->getNode()->getMachineOpcode()));
450 const MCInstrDesc &TID = TII->get(N->getMachineOpcode());
553 const MCInstrDesc &TID = TII->get(N->getMachineOpcode());
555 if (N->getMachineOpcode() == TargetOpcode::IMPLICIT_DEF) {
ScheduleDAGRRList.cpp 298 unsigned Opcode = Node->getMachineOpcode();
426 if (N->getMachineOpcode() ==
429 } else if (N->getMachineOpcode() ==
484 if (N->getMachineOpcode() ==
488 } else if (N->getMachineOpcode() ==
554 Node->getMachineOpcode() == (unsigned)TII->getCallFrameDestroyOpcode()) {
759 SUNode->getMachineOpcode() == (unsigned)TII->getCallFrameSetupOpcode()) {
830 SUNode->getMachineOpcode() == (unsigned)TII->getCallFrameSetupOpcode()) {
843 SUNode->getMachineOpcode() == (unsigned)TII->getCallFrameDestroyOpcode()) {
    [all...]
InstrEmitter.cpp 132 const MCInstrDesc &II = TII->get(User->getMachineOpcode());
211 assert(Node->getMachineOpcode() != TargetOpcode::IMPLICIT_DEF &&
282 Op.getMachineOpcode() == TargetOpcode::IMPLICIT_DEF) {
466 unsigned Opc = Node->getMachineOpcode();
710 unsigned Opc = Node->getMachineOpcode();
    [all...]
SelectionDAGDumper.cpp 40 if (getMachineOpcode() < TII->getNumOpcodes())
41 return TII->getName(getMachineOpcode());
ScheduleDAGFast.cpp 258 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode());
436 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode());
514 const MCInstrDesc &MCID = TII->get(Node->getMachineOpcode());
  /external/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp     [all...]
  /external/llvm/lib/Target/R600/
SIISelLowering.cpp     [all...]
AMDGPUISelDAGToDAG.cpp 126 switch (N->getMachineOpcode()) {
128 const MCInstrDesc &Desc = TM.getInstrInfo()->get(N->getMachineOpcode());
R600ISelLowering.cpp     [all...]
  /external/llvm/lib/CodeGen/
TargetInstrInfo.cpp 710 unsigned DefClass = get(DefNode->getMachineOpcode()).getSchedClass();
713 unsigned UseClass = get(UseNode->getMachineOpcode()).getSchedClass();
725 return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass());
ScheduleDAG.cpp 60 return &TII->get(Node->getMachineOpcode());
  /external/llvm/include/llvm/CodeGen/
SelectionDAGNodes.h 184 inline unsigned getMachineOpcode() const;
400 /// post-isel opcodes, see getMachineOpcode.
418 /// getMachineOpcode - This may only be called if isMachineOpcode returns
421 unsigned getMachineOpcode() const {
904 inline unsigned SDValue::getMachineOpcode() const {
905 return Node->getMachineOpcode();
    [all...]
  /external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp     [all...]
ARMISelDAGToDAG.cpp 430 const MCInstrDesc &MCID = TII->get(Use->getMachineOpcode());
    [all...]
ARMISelLowering.cpp     [all...]
  /external/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp     [all...]
AArch64ISelLowering.cpp     [all...]
  /external/llvm/lib/Target/X86/
X86InstrInfo.cpp     [all...]
X86ISelDAGToDAG.cpp     [all...]
  /external/llvm/lib/Target/NVPTX/
NVPTXISelLowering.cpp     [all...]

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