/external/vixl/src/a64/ |
instructions-a64.cc | 58 // indicate a failure case. Specifically, where the constraints on imm_s are 63 int64_t imm_s = ImmSetBits(); local 66 // An integer is constructed from the n, imm_s and imm_r bits according to 84 if (imm_s == 0x3F) { 87 uint64_t bits = (UINT64_C(1) << (imm_s + 1)) - 1; 90 if ((imm_s >> 1) == 0x1F) { 94 if ((imm_s & width) == 0) { 96 if ((imm_s & mask) == mask) { 99 uint64_t bits = (UINT64_C(1) << ((imm_s & mask) + 1)) - 1;
|
assembler-a64.cc | 1663 unsigned n, imm_s, imm_r; local [all...] |
macro-assembler-a64.cc | 176 unsigned n, imm_s, imm_r; local 177 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) { 179 LogicalImmediate(rd, rn, n, imm_s, imm_r, op); 292 unsigned n, imm_s, imm_r; local 301 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) { 304 LogicalImmediate(rd, AppropriateZeroRegFor(rd), n, imm_s, imm_r, ORR); [all...] |
assembler-a64.h | [all...] |
/external/chromium_org/v8/src/arm64/ |
instructions-arm64.cc | 92 // indicate a failure case. Specifically, where the constraints on imm_s are not 97 int64_t imm_s = ImmSetBits(); local 100 // An integer is constructed from the n, imm_s and imm_r bits according to 118 if (imm_s == 0x3F) { 121 uint64_t bits = (1UL << (imm_s + 1)) - 1; 124 if ((imm_s >> 1) == 0x1F) { 128 if ((imm_s & width) == 0) { 130 if ((imm_s & mask) == mask) { 133 uint64_t bits = (1UL << ((imm_s & mask) + 1)) - 1;
|
assembler-arm64.cc | 2277 unsigned n, imm_s, imm_r; local [all...] |
macro-assembler-arm64.cc | 122 unsigned n, imm_s, imm_r; local 123 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) { 125 LogicalImmediate(rd, rn, n, imm_s, imm_r, op); 417 unsigned n, imm_s, imm_r; local 429 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) { 431 LogicalImmediate(dst, AppropriateZeroRegFor(dst), n, imm_s, imm_r, ORR); [all...] |
assembler-arm64.h | [all...] |
/art/compiler/dex/quick/arm64/ |
target_arm64.cc | 282 unsigned imm_s = (value >> 0) & 0x3f; local 284 // An integer is constructed from the n, imm_s and imm_r bits according to 301 DCHECK_NE(imm_s, 0x3fU); 302 uint64_t bits = BIT_MASK(imm_s + 1); 305 DCHECK_NE((imm_s >> 1), 0x1fU); 307 if ((imm_s & width) == 0) { 309 DCHECK_NE((imm_s & mask), mask); 310 uint64_t bits = BIT_MASK((imm_s & mask) + 1); [all...] |
utility_arm64.cc | 183 unsigned n, imm_s, imm_r; local 185 // Logical immediates are encoded using parameters n, imm_s and imm_r using 229 imm_s = 0x3C; 235 imm_s = ((imm_s_fixed | (set_bits - 1)) & imm_s_mask); 269 return (n << 12 | imm_r << 6 | imm_s); [all...] |
/external/valgrind/main/VEX/priv/ |
host_arm64_isel.c | 1334 UInt n = 0, imm_s = 0, imm_r = 0; local [all...] |