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  /art/compiler/dex/quick/
gen_loadstore.cc 83 void Mir2Lir::LoadValueDirect(RegLocation rl_src, RegStorage r_dest) {
84 rl_src = UpdateLoc(rl_src);
85 if (rl_src.location == kLocPhysReg) {
86 OpRegCopy(r_dest, rl_src.reg);
87 } else if (IsInexpensiveConstant(rl_src)) {
89 DCHECK(!rl_src.ref || (mir_graph_->ConstantValue(rl_src) == 0));
90 LoadConstantNoClobber(r_dest, mir_graph_->ConstantValue(rl_src));
92 DCHECK((rl_src.location == kLocDalvikFrame) |
    [all...]
mir_to_lir.cc 390 RegLocation rl_src[3]; local
404 rl_src[0] = rl_src[1] = rl_src[2] = mir_graph_->GetBadLoc();
407 rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg);
410 rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg);
416 rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg);
419 rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg);
425 rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg);
427 rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg)
1067 RegLocation rl_src = mir_graph_->GetSrc(mir, 0); local
    [all...]
gen_common.cc 284 void Mir2Lir::GenCompareZeroAndBranch(Instruction::Code opcode, RegLocation rl_src, LIR* taken,
287 DCHECK(!rl_src.fp);
288 rl_src = LoadValue(rl_src);
312 OpCmpImmBranch(cond, rl_src.reg, 0, taken);
315 void Mir2Lir::GenIntToLong(RegLocation rl_dest, RegLocation rl_src) {
317 if (rl_src.location == kLocPhysReg) {
318 OpRegCopy(rl_result.reg, rl_src.reg);
320 LoadValueDirect(rl_src, rl_result.reg.GetLow());
327 RegLocation rl_src) {
    [all...]
mir_to_lir.h 697 bool IsInexpensiveConstant(RegLocation rl_src);
    [all...]
gen_invoke.cc 375 RegLocation rl_src = rl_method; local
376 rl_src.location = kLocPhysReg;
377 rl_src.reg = TargetReg(kArg0, kRef);
378 rl_src.home = false;
379 MarkLive(rl_src);
380 StoreValue(rl_method, rl_src);
383 StoreRefDisp(TargetPtrReg(kSp), 0, rl_src.reg, kNotVolatile);
1369 RegLocation rl_src = info->args[0]; local
1387 RegLocation rl_src = info->args[0]; local
1458 RegLocation rl_src = info->args[0]; local
1469 RegLocation rl_src = info->args[0]; local
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codegen_util.cc 55 bool Mir2Lir::IsInexpensiveConstant(RegLocation rl_src) {
57 if (rl_src.is_const) {
58 if (rl_src.wide) {
61 if (rl_src.high_word) {
62 rl_src.high_word = false;
63 rl_src.s_reg_low--;
64 rl_src.orig_sreg--;
66 if (rl_src.fp) {
67 res = InexpensiveConstantDouble(mir_graph_->ConstantValueWide(rl_src));
69 res = InexpensiveConstantLong(mir_graph_->ConstantValueWide(rl_src));
    [all...]
  /art/compiler/dex/portable/
mir_to_gbc.cc 144 int32_t table_offset, RegLocation rl_src) {
149 ::llvm::Value* value = GetLLVMValue(rl_src.orig_sreg);
168 int32_t table_offset, RegLocation rl_src) {
176 ::llvm::Value* value = GetLLVMValue(rl_src.orig_sreg);
203 art::llvm::IntrinsicHelper::IntrinsicId id, RegLocation rl_src) {
206 args.push_back(GetLLVMValue(rl_src.orig_sreg));
278 void MirConverter::ConvertThrow(RegLocation rl_src) {
279 ::llvm::Value* src = GetLLVMValue(rl_src.orig_sreg);
287 RegLocation rl_src) {
290 args.push_back(GetLLVMValue(rl_src.orig_sreg))
706 RegLocation rl_src[3]; local
    [all...]
mir_to_gbc.h 95 RegLocation rl_src);
97 RegLocation rl_src);
101 art::llvm::IntrinsicHelper::IntrinsicId id, RegLocation rl_src);
109 void ConvertThrow(RegLocation rl_src);
111 art::llvm::IntrinsicHelper::IntrinsicId id, RegLocation rl_src);
113 RegLocation rl_src);
130 RegLocation rl_dest, RegLocation rl_src, int shift_amount);
139 void ConvertCheckCast(uint32_t type_idx, RegLocation rl_src);
142 RegLocation rl_src);
146 RegLocation rl_src, RegLocation rl_array, RegLocation rl_index)
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  /art/compiler/dex/quick/mips/
fp_mips.cc 117 RegLocation rl_src) {
134 GenConversionCall(kQuickF2iz, rl_dest, rl_src);
137 GenConversionCall(kQuickD2iz, rl_dest, rl_src);
140 GenConversionCall(kQuickL2d, rl_dest, rl_src);
143 GenConversionCall(kQuickF2l, rl_dest, rl_src);
146 GenConversionCall(kQuickL2f, rl_dest, rl_src);
149 GenConversionCall(kQuickD2l, rl_dest, rl_src);
154 if (rl_src.wide) {
155 rl_src = LoadValueWide(rl_src, kFPReg)
    [all...]
call_mips.cc 64 void MipsMir2Lir::GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) {
109 rl_src = LoadValue(rl_src, kCoreReg);
117 OpCmpBranch(kCondNe, rl_src.reg, r_key, loop_label);
141 void MipsMir2Lir::GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) {
157 rl_src = LoadValue(rl_src, kCoreReg);
164 r_key = rl_src.reg;
181 OpRegRegReg(kOpSub, r_key, rl_src.reg, r_key);
183 OpRegRegImm(kOpSub, r_key, rl_src.reg, low_key)
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codegen_mips.h 30 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
32 bool EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE;
92 RegLocation rl_index, RegLocation rl_src, int scale, bool card_mark);
101 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src);
118 void GenFillArrayData(uint32_t table_offset, RegLocation rl_src);
127 void GenMultiplyByTwoBitMultiplier(RegLocation rl_src, RegLocation rl_result, int lit,
129 void GenNegDouble(RegLocation rl_dest, RegLocation rl_src);
130 void GenNegFloat(RegLocation rl_dest, RegLocation rl_src);
131 void GenLargePackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src);
132 void GenLargeSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src);
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int_mips.cc 342 void MipsMir2Lir::GenMultiplyByTwoBitMultiplier(RegLocation rl_src,
346 OpRegRegImm(kOpLsl, t_reg, rl_src.reg, second_bit - first_bit);
347 OpRegRegReg(kOpAdd, rl_result.reg, rl_src.reg, t_reg);
375 RegLocation rl_src, RegLocation rl_dest, int lit) {
380 bool MipsMir2Lir::EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) {
462 void MipsMir2Lir::GenNegLong(RegLocation rl_dest, RegLocation rl_src) {
463 rl_src = LoadValueWide(rl_src, kCoreReg);
473 OpRegReg(kOpNeg, rl_result.reg.GetLow(), rl_src.reg.GetLow());
474 OpRegReg(kOpNeg, rl_result.reg.GetHigh(), rl_src.reg.GetHigh())
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  /art/compiler/dex/quick/x86/
fp_x86.cc 125 void X86Mir2Lir::GenLongToFP(RegLocation rl_dest, RegLocation rl_src, bool is_double) {
127 int src_v_reg_offset = SRegOffset(rl_src.s_reg_low);
131 rl_src = UpdateLocWide(rl_src);
137 if (rl_src.location == kLocPhysReg) {
138 RegisterInfo* reg_info = GetRegInfo(rl_src.reg);
144 ResetDef(rl_src.reg);
148 StoreBaseDisp(rs_rX86_SP, src_v_reg_offset, rl_src.reg, k64, kNotVolatile);
194 RegLocation rl_src) {
216 rl_src = LoadValue(rl_src, kFPReg)
587 RegLocation rl_src = info->args[0]; local
598 RegLocation rl_src = info->args[0]; local
644 RegLocation rl_src = info->args[0]; local
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call_x86.cc 30 void X86Mir2Lir::GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) {
38 rl_src = LoadValue(rl_src, kCoreReg);
43 OpCmpImmBranch(kCondEq, rl_src.reg, key, &block_label_list_[case_block->id]);
63 void X86Mir2Lir::GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) {
79 rl_src = LoadValue(rl_src, kCoreReg);
103 keyReg = rl_src.reg;
106 OpRegRegImm(kOpSub, keyReg, rl_src.reg, low_key);
137 void X86Mir2Lir::GenFillArrayData(DexOffset table_offset, RegLocation rl_src) {
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int_x86.cc 272 RegLocation rl_src = mir_graph_->GetSrc(mir, 0); local
275 RegisterClass src_reg_class = rl_src.ref ? kRefReg : kCoreReg;
293 rl_src = LoadValue(rl_src, src_reg_class);
317 (rl_src.location == kLocPhysReg && rl_src.reg.GetRegNum() == rl_result.reg.GetRegNum());
327 OpRegImm(kOpCmp, rl_src.reg, 0);
346 rl_src = LoadValue(rl_src, src_reg_class);
369 OpRegImm(kOpCmp, rl_src.reg, 0)
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codegen_x86.h 67 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
69 bool EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE;
149 RegLocation rl_index, RegLocation rl_src, int scale, bool card_mark) OVERRIDE;
157 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
177 void GenIntToLong(RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
184 * @param rl_src constant source operand
188 bool GenLongImm(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op);
214 * @param rl_src Second operand.
217 void GenLongArith(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op);
222 * @param rl_src The other operand. May be in a register or in memory
    [all...]
  /art/compiler/dex/quick/arm64/
fp_arm64.cc 120 RegLocation rl_dest, RegLocation rl_src) {
185 if (rl_src.wide) {
186 rl_src = LoadValueWide(rl_src, src_reg_class);
188 rl_src = LoadValue(rl_src, src_reg_class);
192 NewLIR2(op, rl_result.reg.GetReg(), rl_src.reg.GetReg());
309 void Arm64Mir2Lir::GenNegFloat(RegLocation rl_dest, RegLocation rl_src) {
311 rl_src = LoadValue(rl_src, kFPReg)
349 RegLocation rl_src = UpdateLoc(info->args[0]); local
367 RegLocation rl_src = UpdateLocWide(info->args[0]); local
381 RegLocation rl_src = info->args[0]; local
391 RegLocation rl_src = info->args[0]; local
401 RegLocation rl_src = info->args[0]; local
411 RegLocation rl_src = info->args[0]; local
423 RegLocation rl_src = info->args[0]; local
    [all...]
call_arm64.cc 46 void Arm64Mir2Lir::GenLargeSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) {
61 rl_src = LoadValue(rl_src, kCoreReg);
81 OpRegReg(kOpCmp, r_key, rl_src.reg);
98 void Arm64Mir2Lir::GenLargePackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) {
114 rl_src = LoadValue(rl_src, kCoreReg);
122 key_reg = rl_src.reg;
125 OpRegRegImm(kOpSub, key_reg, rl_src.reg, low_key);
159 void Arm64Mir2Lir::GenFillArrayData(uint32_t table_offset, RegLocation rl_src) {
    [all...]
int_arm64.cc 184 RegLocation rl_src = mir_graph_->GetSrc(mir, 0);
185 rl_src = LoadValue(rl_src, rl_src.ref ? kRefReg : kCoreReg);
186 // rl_src may be aliased with rl_result/rl_dest, so do compare early.
187 OpRegImm(kOpCmp, rl_src.reg, 0);
404 RegLocation rl_src, RegLocation rl_dest, int lit) {
419 rl_src = LoadValue(rl_src, kCoreReg);
423 r_magic.GetReg(), rl_src.reg.GetReg(), rxzr)
645 RegLocation rl_src = info->args[0]; local
794 RegLocation rl_src = info->args[0]; local
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codegen_arm64.h 66 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
69 RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE;
71 RegLocation rl_src, RegLocation rl_dest, int64_t lit);
72 bool EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE;
147 RegLocation rl_src, int scale, bool card_mark) OVERRIDE;
156 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
172 void GenIntToLong(RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
184 void GenFillArrayData(DexOffset table_offset, RegLocation rl_src) OVERRIDE;
193 void GenMonitorEnter(int opt_flags, RegLocation rl_src) OVERRIDE;
194 void GenMonitorExit(int opt_flags, RegLocation rl_src) OVERRIDE
    [all...]
target_arm64.cc 920 RegLocation rl_src = rl_method; local
921 rl_src.location = kLocPhysReg;
922 rl_src.reg = TargetReg(kArg0, kRef);
923 rl_src.home = false;
924 MarkLive(rl_src);
925 StoreValue(rl_method, rl_src);
928 StoreRefDisp(TargetPtrReg(kSp), 0, rl_src.reg, kNotVolatile);
    [all...]
  /art/compiler/dex/quick/arm/
fp_arm.cc 116 void ArmMir2Lir::GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) {
141 rl_src = LoadValueWide(rl_src, kFPReg);
142 RegisterInfo* info = GetRegInfo(rl_src.reg);
161 GenConversionCall(kQuickF2l, rl_dest, rl_src);
164 rl_src = LoadValueWide(rl_src, kFPReg);
165 RegisterInfo* info = GetRegInfo(rl_src.reg);
191 GenConversionCall(kQuickD2l, rl_dest, rl_src);
196 if (rl_src.wide)
362 RegLocation rl_src = UpdateLoc(info->args[0]); local
380 RegLocation rl_src = UpdateLocWide(info->args[0]); local
404 RegLocation rl_src = info->args[0]; local
    [all...]
codegen_arm.h 30 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
32 bool EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE;
94 RegLocation rl_src, int scale, bool card_mark);
103 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src);
119 void GenFillArrayData(DexOffset table_offset, RegLocation rl_src);
127 void GenMonitorEnter(int opt_flags, RegLocation rl_src);
128 void GenMonitorExit(int opt_flags, RegLocation rl_src);
130 void GenMultiplyByTwoBitMultiplier(RegLocation rl_src, RegLocation rl_result, int lit,
132 void GenNegDouble(RegLocation rl_dest, RegLocation rl_src);
133 void GenNegFloat(RegLocation rl_dest, RegLocation rl_src);
    [all...]
int_arm.cc 232 RegLocation rl_src = mir_graph_->GetSrc(mir, 0); local
235 RegisterClass src_reg_class = rl_src.ref ? kRefReg : kCoreReg;
237 rl_src = LoadValue(rl_src, src_reg_class);
251 OpRegRegImm(kOpSub, rl_result.reg, rl_src.reg, -true_val);
257 OpRegRegImm(kOpRsub, rl_result.reg, rl_src.reg, 1);
263 OpRegImm(kOpCmp, rl_src.reg, 0);
274 OpRegImm(kOpCmp, rl_src.reg, 0);
287 OpRegImm(kOpCmp, rl_src.reg, 0);
493 RegLocation rl_src, RegLocation rl_dest, int lit)
963 RegLocation rl_src = info->args[0]; local
    [all...]
call_arm.cc 46 void ArmMir2Lir::GenLargeSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) {
61 rl_src = LoadValue(rl_src, kCoreReg);
81 OpRegReg(kOpCmp, r_key, rl_src.reg);
94 void ArmMir2Lir::GenLargePackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) {
110 rl_src = LoadValue(rl_src, kCoreReg);
118 keyReg = rl_src.reg;
121 OpRegRegImm(kOpSub, keyReg, rl_src.reg, low_key);
150 void ArmMir2Lir::GenFillArrayData(uint32_t table_offset, RegLocation rl_src) {
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