| /art/compiler/dex/quick/mips/ |
| fp_mips.cc | 25 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
53 CallRuntimeHelperRegLocationRegLocation(kQuickFmodf, rl_src1, rl_src2, false);
58 GenNegFloat(rl_dest, rl_src1);
63 rl_src1 = LoadValue(rl_src1, kFPReg);
66 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg());
71 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
95 CallRuntimeHelperRegLocationRegLocation(kQuickFmod, rl_src1, rl_src2, false);
100 GenNegDouble(rl_dest, rl_src1);
105 rl_src1 = LoadValueWide(rl_src1, kFPReg)
[all...] |
| int_mips.cc | 44 void MipsMir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1,
46 rl_src1 = LoadValueWide(rl_src1, kCoreReg);
51 NewLIR3(kMipsSlt, t0.GetReg(), rl_src1.reg.GetHighReg(), rl_src2.reg.GetHighReg());
52 NewLIR3(kMipsSlt, t1.GetReg(), rl_src2.reg.GetHighReg(), rl_src1.reg.GetHighReg());
55 NewLIR3(kMipsSltu, t0.GetReg(), rl_src1.reg.GetLowReg(), rl_src2.reg.GetLowReg());
56 NewLIR3(kMipsSltu, t1.GetReg(), rl_src2.reg.GetLowReg(), rl_src1.reg.GetLowReg());
265 RegLocation MipsMir2Lir::GenDivRem(RegLocation rl_dest, RegLocation rl_src1,
271 RegLocation MipsMir2Lir::GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div) {
396 RegLocation rl_src1, RegLocation rl_src2)
[all...] |
| codegen_mips.h | 88 RegLocation rl_src1, RegLocation rl_src2);
93 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
95 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
97 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
99 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
109 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
113 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
186 void GenAddLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
188 void GenSubLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
192 RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1,
[all...] |
| /art/compiler/dex/quick/arm64/ |
| fp_arm64.cc | 25 RegLocation rl_src1, RegLocation rl_src2) {
49 CallRuntimeHelperRegLocationRegLocation(kQuickFmodf, rl_src1, rl_src2, false);
54 GenNegFloat(rl_dest, rl_src1);
59 rl_src1 = LoadValue(rl_src1, kFPReg);
62 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg());
67 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
93 LoadValueDirectWideFixed(rl_src1, rs_d0);
102 GenNegDouble(rl_dest, rl_src1);
108 rl_src1 = LoadValueWide(rl_src1, kFPReg)
204 RegLocation rl_src1; local
441 RegLocation rl_src1 = info->args[0]; local
[all...] |
| int_arm64.cc | 49 void Arm64Mir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1,
52 rl_src1 = LoadValueWide(rl_src1, kCoreReg);
56 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg);
64 RegLocation rl_src1, RegLocation rl_shift) {
83 rl_src1 = LoadValueWide(rl_src1, kCoreReg);
85 OpRegRegReg(op, rl_result.reg, rl_src1.reg, As64BitReg(rl_shift.reg));
215 RegLocation rl_src1 = mir_graph_->GetSrcWide(mir, 0); local
221 if (rl_src1.is_const)
660 RegLocation rl_src1 = info->args[0]; local
[all...] |
| codegen_arm64.h | 140 void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
142 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
148 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
150 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
152 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
154 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
173 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
179 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) OVERRIDE;
342 RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
344 RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div)
[all...] |
| /art/compiler/dex/quick/arm/ |
| fp_arm.cc | 24 RegLocation rl_src1, RegLocation rl_src2) {
52 CallRuntimeHelperRegLocationRegLocation(kQuickFmodf, rl_src1, rl_src2, false);
57 GenNegFloat(rl_dest, rl_src1);
62 rl_src1 = LoadValue(rl_src1, kFPReg);
65 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg());
70 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
94 CallRuntimeHelperRegLocationRegLocation(kQuickFmod, rl_src1, rl_src2, false);
99 GenNegDouble(rl_dest, rl_src1);
105 rl_src1 = LoadValueWide(rl_src1, kFPReg)
217 RegLocation rl_src1; local
[all...] |
| int_arm.cc | 122 void ArmMir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
125 rl_src1 = LoadValueWide(rl_src1, kCoreReg);
129 OpRegReg(kOpCmp, rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh());
132 OpRegRegReg(kOpSub, t_reg, rl_src1.reg.GetLow(), rl_src2.reg.GetLow());
155 void ArmMir2Lir::GenFusedLongCmpImmBranch(BasicBlock* bb, RegLocation rl_src1,
163 rl_src1 = LoadValueWide(rl_src1, kCoreReg);
164 RegStorage low_reg = rl_src1.reg.GetLow();
165 RegStorage high_reg = rl_src1.reg.GetHigh()
306 RegLocation rl_src1 = mir_graph_->GetSrcWide(mir, 0); local
736 RegLocation rl_src1 = info->args[0]; local
[all...] |
| codegen_arm.h | 87 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
90 RegLocation rl_src1, RegLocation rl_src2);
96 RegLocation rl_src1, RegLocation rl_shift);
97 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
99 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
101 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
114 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
192 void GenMulLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
194 void GenFusedLongCmpImmBranch(BasicBlock* bb, RegLocation rl_src1, int64_t val,
203 RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2
[all...] |
| /art/compiler/dex/quick/x86/ |
| fp_x86.cc | 25 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
52 GenRemFP(rl_dest, rl_src1, rl_src2, false /* is_double */);
55 GenNegFloat(rl_dest, rl_src1);
60 rl_src1 = LoadValue(rl_src1, kFPReg);
64 RegStorage r_src1 = rl_src1.reg;
76 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
79 DCHECK(rl_src1.wide);
80 DCHECK(rl_src1.fp);
105 GenRemFP(rl_dest, rl_src1, rl_src2, true /* is_double */)
498 RegLocation rl_src1; local
710 RegLocation rl_src1 = LoadValueWide(info->args[0], kFPReg); local
744 RegLocation rl_src1 = LoadValue(info->args[0], kFPReg); local
[all...] |
| int_x86.cc | 34 void X86Mir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1,
37 rl_src1 = LoadValueWide(rl_src1, kCoreReg);
41 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg);
56 LoadValueDirectWideFixed(rl_src1, r_tmp1);
386 RegLocation rl_src1 = mir_graph_->GetSrcWide(mir, 0); local
390 if (rl_src1.is_const) {
391 std::swap(rl_src1, rl_src2);
397 GenFusedLongCmpImmBranch(bb, rl_src1, val, ccode);
402 rl_src1 = LoadValueWide(rl_src1, kCoreReg)
810 RegLocation rl_src1 = info->args[0]; local
[all...] |
| codegen_x86.h | 151 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
153 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
155 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
170 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
172 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
175 RegLocation rl_src1, RegLocation rl_shift) OVERRIDE;
176 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) OVERRIDE;
179 RegLocation rl_src1, RegLocation rl_shift) OVERRIDE;
193 * @param rl_src1 source operand
198 bool GenLongLongImm(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2
[all...] |
| /art/compiler/dex/portable/ |
| mir_to_gbc.h | 118 RegLocation rl_src1, RegLocation rl_src2);
120 RegLocation rl_src1);
125 void ConvertFPArithOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1,
128 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
131 void ConvertArithOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1,
133 void ConvertArithOpLit(OpKind op, RegLocation rl_dest, RegLocation rl_src1,
158 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
|
| mir_to_gbc.cc | 330 ConditionCode cc, RegLocation rl_src1, RegLocation rl_src2) {
334 ::llvm::Value* src1 = GetLLVMValue(rl_src1.orig_sreg);
345 MIR* mir, ConditionCode cc, RegLocation rl_src1) {
349 ::llvm::Value* src1 = GetLLVMValue(rl_src1.orig_sreg);
351 if (rl_src1.ref) {
409 RegLocation rl_src1, RegLocation rl_src2) {
410 ::llvm::Value* src1 = GetLLVMValue(rl_src1.orig_sreg);
426 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
429 args.push_back(GetLLVMValue(rl_src1.orig_sreg));
446 RegLocation rl_src1, RegLocation rl_src2)
[all...] |
| /art/compiler/dex/quick/ |
| gen_common.cc | 218 void Mir2Lir::GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1,
221 DCHECK(!rl_src1.fp);
249 if (rl_src1.is_const) {
250 RegLocation rl_temp = rl_src1;
251 rl_src1 = rl_src2;
256 rl_src1 = LoadValue(rl_src1);
265 OpCmpImmBranch(cond, rl_src1.reg, mir_graph_->ConstantValue(rl_src2), taken);
275 OpCmpImmBranch(cond, rl_src1.reg, 0, taken);
281 OpCmpBranch(cond, rl_src1.reg, rl_src2.reg, taken)
[all...] |
| mir_to_lir.h | [all...] |
