| /external/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | 438 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
491 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
581 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| Thumb2SizeReduction.cpp | 513 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end());
[all...] |
| ARMLoadStoreOptimizer.cpp | [all...] |
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBuilder.h | 159 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b,
161 MI->setMemRefs(b, e);
|
| MachineInstr.h | [all...] |
| SelectionDAGNodes.h | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.cpp | 293 MIB.setMemRefs(I->memoperands_begin(), I->memoperands_end());
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.cpp | 423 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1);
460 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1);
484 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1);
532 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1);
563 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1);
637 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1);
660 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1);
723 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1);
754 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1);
805 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1)
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelDAGToDAG.cpp | 158 cast<MachineSDNode>(node)->setMemRefs(MemOp, MemOp + 1);
|
| /external/llvm/lib/CodeGen/ |
| TargetInstrInfo.cpp | 471 NewMI->setMemRefs(MI->memoperands_begin(), MI->memoperands_end());
545 NewMI->setMemRefs(LoadMI->memoperands_begin(),
550 NewMI->setMemRefs(MI->memoperands_begin(),
|
| MachineInstr.cpp | 759 /// This function should be used only occasionally. The setMemRefs function
771 setMemRefs(NewMemRefs, NewMemRefs + NewNum);
[all...] |
| TargetLoweringBase.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 372 cast<MachineSDNode>(ResNode)->setMemRefs(MemRefs0, MemRefs0 + 1);
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelDAGToDAG.cpp | 622 cast<MachineSDNode>(NVPTXLD)->setMemRefs(MemRefs0, MemRefs0 + 1);
1006 cast<MachineSDNode>(LD)->setMemRefs(MemRefs0, MemRefs0 + 1);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 160 MN->setMemRefs(Begin, End);
[all...] |
| InstrEmitter.cpp | 795 MIB.setMemRefs(cast<MachineSDNode>(Node)->memoperands_begin(),
[all...] |
| SelectionDAGISel.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | [all...] |
| X86InstrInfo.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
