/frameworks/base/docs/html/sdk/api_diff/17/changes/ |
jdiff_statistics.html | 85 <TH ALIGN="center"><b>Additions</b></TH> 86 <TH ALIGN="center"><b>Changes</b></TH> 87 <TH ALIGN="center">Removals</TH> 88 <TH ALIGN="center"><b>Total</b></TH> 92 <TD ALIGN="right">2</TD> 93 <TD ALIGN="right">35</TD> 94 <TD ALIGN="right">0</TD> 95 <TD ALIGN="right">37</TD> 99 <TD ALIGN="right">41</TD> 100 <TD ALIGN="right">111</TD [all...] |
/frameworks/base/docs/html/sdk/api_diff/18/changes/ |
jdiff_statistics.html | 85 <TH ALIGN="center"><b>Additions</b></TH> 86 <TH ALIGN="center"><b>Changes</b></TH> 87 <TH ALIGN="center">Removals</TH> 88 <TH ALIGN="center"><b>Total</b></TH> 92 <TD ALIGN="right">2</TD> 93 <TD ALIGN="right">37</TD> 94 <TD ALIGN="right">0</TD> 95 <TD ALIGN="right">39</TD> 99 <TD ALIGN="right">61</TD> 100 <TD ALIGN="right">108</TD [all...] |
/frameworks/base/docs/html/sdk/api_diff/4/changes/ |
jdiff_statistics.html | 85 <TH ALIGN="center"><b>Additions</b></TH> 86 <TH ALIGN="center"><b>Changes</b></TH> 87 <TH ALIGN="center">Removals</TH> 88 <TH ALIGN="center"><b>Total</b></TH> 92 <TD ALIGN="right">4</TD> 93 <TD ALIGN="right">26</TD> 94 <TD ALIGN="right">0</TD> 95 <TD ALIGN="right">30</TD> 99 <TD ALIGN="right">22</TD> 100 <TD ALIGN="right">73</TD [all...] |
/external/clang/test/CodeGen/ |
ext-vector-member-alignment.c | 20 // CHECK: load <4 x float>* {{%.*}}, align 1 21 // CHECK: store <4 x float> {{%.*}}, <4 x float>* {{%.*}}, align 1 22 // CHECK: load <4 x float>* {{%.*}}, align 1 23 // CHECK: load <4 x float>* {{%.*}}, align 1 24 // CHECK: load <4 x float>* {{%.*}}, align 1 25 // CHECK: store <4 x float> {{%.*}}, <4 x float>* {{%.*}}, align 1
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volatile-complex.c | 17 // CHECK: load volatile float* getelementptr inbounds ({ float, float }* @cf, i32 0, i32 0), align 4 18 // CHECK-NEXT: load volatile float* getelementptr inbounds ({ float, float }* @cf, i32 0, i32 1), align 4 20 // CHECK-NEXT: [[R:%.*]] = load volatile float* getelementptr inbounds ({ float, float }* @cf, i32 0, i32 0), align 4 21 // CHECK-NEXT: [[I:%.*]] = load volatile float* getelementptr inbounds ({ float, float }* @cf, i32 0, i32 1), align 4 22 // CHECK-NEXT: store volatile float [[R]], float* getelementptr inbounds ({ float, float }* @cf, i32 0, i32 0), align 4 23 // CHECK-NEXT: store volatile float [[I]], float* getelementptr inbounds ({ float, float }* @cf, i32 0, i32 1), align 4 30 // CHECK: load volatile double* getelementptr inbounds ({ double, double }* @cd, i32 0, i32 0), align 8 31 // CHECK-NEXT: load volatile double* getelementptr inbounds ({ double, double }* @cd, i32 0, i32 1), align 8 33 // CHECK-NEXT: [[R:%.*]] = load volatile double* getelementptr inbounds ({ double, double }* @cd, i32 0, i32 0), align 8 34 // CHECK-NEXT: [[I:%.*]] = load volatile double* getelementptr inbounds ({ double, double }* @cd, i32 0, i32 1), align [all...] |
/external/clang/test/CodeGenCXX/ |
debug-info-template-quals.cpp | 18 // CHECK: [[BS:.*]] = {{.*}} ; [ DW_TAG_structure_type ] [basic_string<char>] [line 4, size 8, align 8, offset 0] [def] [from ] 21 // CHECK: [[P]] = {{.*}}, metadata [[CON:![0-9]*]]} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from ] 22 // CHECK: [[CON]] = {{.*}}, metadata [[CH:![0-9]*]]} ; [ DW_TAG_const_type ] [line 0, size 0, align 0, offset 0] [from char] 23 // CHECK: [[CH]] = {{.*}} ; [ DW_TAG_base_type ] [char] [line 0, size 8, align 8, offset 0, enc DW_ATE_signed_char] 25 // CHECK: [[R]] = {{.*}}, metadata [[CON2:![0-9]*]]} ; [ DW_TAG_reference_type ] [line 0, size 0, align 0, offset 0] [from ] 26 // CHECK: [[CON2]] = {{.*}}, metadata !"_ZTS12basic_stringIcE"} ; [ DW_TAG_const_type ] [line 0, size 0, align 0, offset 0] [from _ZTS12basic_stringIcE]
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/external/eigen/Eigen/src/Eigen2Support/ |
Memory.h | 21 template<bool Align> inline void* ei_conditional_aligned_malloc(size_t size) 23 return internal::conditional_aligned_malloc<Align>(size); 25 template<bool Align> inline void ei_conditional_aligned_free(void *ptr) 27 internal::conditional_aligned_free<Align>(ptr); 29 template<bool Align> inline void* ei_conditional_aligned_realloc(void* ptr, size_t new_size, size_t old_size) 31 return internal::conditional_aligned_realloc<Align>(ptr, new_size, old_size);
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/external/llvm/test/Bitcode/ |
deprecated-linker_private-linker_private_weak.ll | 4 @.linker_private = linker_private unnamed_addr constant [15 x i8] c"linker_private\00", align 64 5 @.linker_private_weak = linker_private_weak unnamed_addr constant [20 x i8] c"linker_private_weak\00", align 64 7 ; CHECK: @.linker_private = private unnamed_addr constant [15 x i8] c"linker_private\00", align 64 8 ; CHECK: @.linker_private_weak = private unnamed_addr constant [20 x i8] c"linker_private_weak\00", align 64 11 ; CHECK-WARNINGS: @.linker_private = linker_private unnamed_addr constant [15 x i8] c"linker_private\00", align 64 15 ; CHECK-WARNINGS: @.linker_private_weak = linker_private_weak unnamed_addr constant [20 x i8] c"linker_private_weak\00", align 64
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/external/llvm/test/CodeGen/AArch64/ |
arm64-fast-isel-indirectbr.ll | 3 @fn.table = internal global [2 x i8*] [i8* blockaddress(@fn, %ZERO), i8* blockaddress(@fn, %ONE)], align 8 8 %retval = alloca i32, align 4 9 %target.addr = alloca i32, align 4 10 store i32 %target, i32* %target.addr, align 4 11 %0 = load i32* %target.addr, align 4 14 %1 = load i8** %arrayidx, align 8
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arm64-spill-lr.ll | 2 @bar = common global i32 0, align 4 11 %stack = alloca [128 x i32], align 4 15 store i32 %b, i32* %arrayidx, align 4 16 %1 = load volatile i32* @bar, align 4 17 %2 = load volatile i32* @bar, align 4 18 %3 = load volatile i32* @bar, align 4 19 %4 = load volatile i32* @bar, align 4 20 %5 = load volatile i32* @bar, align 4 21 %6 = load volatile i32* @bar, align 4 22 %7 = load volatile i32* @bar, align [all...] |
arm64-unaligned_ldst.ll | 12 %tmp3 = load i64* %tmp1, align 1 13 store i64 %tmp3, i64* %tmp2, align 1 25 %tmp3 = load i32* %tmp1, align 1 26 store i32 %tmp3, i32* %tmp2, align 1 38 %tmp3 = load i16* %tmp1, align 1 39 store i16 %tmp3, i16* %tmp2, align 1
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arm64-zextload-unscaled.ll | 10 %val = load i1* %addr, align 1 13 store i32 %extended, i32* @var32, align 4 22 %val = load i8* %addr, align 1 25 store i32 %extended, i32* @var32, align 4 34 %val = load i16* %addr, align 2 37 store i32 %extended, i32* @var32, align 4
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/external/llvm/test/CodeGen/ARM/ |
2011-04-12-AlignBug.ll | 5 ; CHECK: align 3 6 @.v = private unnamed_addr constant <4 x i32> <i32 1, i32 2, i32 3, i32 4>, align 8 7 ; CHECK: align 2 9 ; CHECK-NOT: align 10 @.strB = private unnamed_addr constant [4 x i8] c"foo\00", align 1 11 @.strC = private unnamed_addr constant [4 x i8] c"baz\00", section "__TEXT,__cstring,cstring_literals", align 1
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2012-08-23-legalize-vmull.ll | 18 %0 = load <4 x i8>* %v, align 8 22 store <4 x i32> %v1, <4 x i32>* undef, align 8 31 %0 = load <2 x i8>* %v, align 8 35 store <2 x i64> %v1, <2 x i64>* undef, align 8 44 %0 = load <2 x i16>* %v, align 8 48 store <2 x i64> %v1, <2 x i64>* undef, align 8 59 %0 = load <4 x i8>* %v, align 8 62 %1 = load <4 x i8>* %p, align 8 66 store <4 x i32> %v1, <4 x i32>* undef, align 8 75 %0 = load <2 x i8>* %v, align [all...] |
/external/llvm/test/CodeGen/Hexagon/ |
tfr-to-combine.ll | 13 store i16 0, i16* @a, align 2 14 store i16 10, i16* @b, align 2 22 store i16 0, i16* @a, align 2 23 %0 = load i16* @c, align 2 32 store i16 100, i16* @b, align 2 33 store i16 0, i16* @a, align 2
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/external/llvm/test/CodeGen/Mips/ |
brconeq.ll | 3 @i = global i32 5, align 4 4 @j = global i32 10, align 4 5 @result = global i32 0, align 4 9 %0 = load i32* @i, align 4 10 %1 = load i32* @j, align 4 18 store i32 1, i32* @result, align 4
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brconne.ll | 3 @i = global i32 5, align 4 4 @j = global i32 5, align 4 5 @result = global i32 0, align 4 9 %0 = load i32* @j, align 4 10 %1 = load i32* @i, align 4 19 store i32 1, i32* @result, align 4
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fptr2.ll | 6 %a.addr = alloca double, align 8 7 %b.addr = alloca double, align 8 8 store double %a, double* %a.addr, align 8 9 store double %b, double* %b.addr, align 8 10 %0 = load double* %a.addr, align 8 11 %1 = load double* %b.addr, align 8
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lbu1.ll | 3 @c = global i8 97, align 1 4 @.str = private unnamed_addr constant [5 x i8] c"%c \0A\00", align 1 8 %i = alloca i32, align 4 9 %0 = load i8* @c, align 1 12 store i32 %conv, i32* %i, align 4 13 %1 = load i8* @c, align 1
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mulll.ll | 3 @iiii = global i64 5, align 8 4 @jjjj = global i64 -6, align 8 5 @kkkk = common global i64 0, align 8 9 %0 = load i64* @iiii, align 8 10 %1 = load i64* @jjjj, align 8 12 store i64 %mul, i64* @kkkk, align 8
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optimize-pic-o0.ll | 6 %retval = alloca i32, align 4 7 %i = alloca i32, align 4 9 store i32 0, i32* %i, align 4 13 %0 = load i32* %i, align 4 23 %1 = load i32* %i, align 4 25 store i32 %inc, i32* %i, align 4
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sel1c.ll | 3 @i = global i32 1, align 4 4 @j = global i32 2, align 4 5 @k = common global i32 0, align 4 10 %0 = load i32* @i, align 4 11 %1 = load i32* @j, align 4 14 store i32 %cond, i32* @k, align 4
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sel2c.ll | 3 @i = global i32 1, align 4 4 @j = global i32 2, align 4 5 @k = common global i32 0, align 4 10 %0 = load i32* @i, align 4 11 %1 = load i32* @j, align 4 14 store i32 %cond, i32* @k, align 4
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sll1.ll | 3 @i = global i32 10, align 4 4 @j = global i32 0, align 4 5 @.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 10 %0 = load i32* @i, align 4 13 store i32 %shl, i32* @j, align 4 14 %1 = load i32* @j, align 4
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/external/llvm/test/CodeGen/PowerPC/ |
pwr7-gt-nop.ll | 11 %0 = load float* %b, align 4 12 store float %0, float* %a, align 4 13 %1 = load float* %c, align 4 14 store float %1, float* %b, align 4 15 %2 = load float* %a, align 4 16 store float %2, float* %d, align 4
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