| /external/clang/test/Lexer/ |
| has_feature_rtti.cpp | 1 // RUN: %clang_cc1 -E %s -o - | FileCheck --check-prefix=CHECK-RTTI %s
2 // RUN: %clang_cc1 -E -fno-rtti %s -o - | FileCheck --check-prefix=CHECK-NO-RTTI %s
10 // CHECK-RTTI: foo
11 // CHECK-NO-RTTI: bar
|
| has_feature_thread_sanitizer.cpp | 1 // RUN: %clang_cc1 -E -fsanitize=thread %s -o - | FileCheck --check-prefix=CHECK-TSAN %s
2 // RUN: %clang_cc1 -E %s -o - | FileCheck --check-prefix=CHECK-NO-TSAN %s
10 // CHECK-TSAN: ThreadSanitizerEnabled
11 // CHECK-NO-TSAN: ThreadSanitizerDisabled
|
| /external/clang/test/Modules/ |
| driver.c | 1 // RUN: %clang -fmodules %s -### 2>&1 | FileCheck -check-prefix CHECK-NO_MODULE_CACHE %s
2 // RUN: %clang -fmodules -fmodules-cache-path=blarg %s -### 2>&1 | FileCheck -check-prefix CHECK-WITH_MODULE_CACHE %s
4 // CHECK-NO_MODULE_CACHE: {{clang.*"-fmodules-cache-path=.*ModuleCache"}}
6 // CHECK-WITH_MODULE_CACHE: {{clang.*"-fmodules-cache-path=blarg"}}
|
| /external/clang/test/SemaCXX/ |
| cxx11-thread-local-print.cpp | 3 // CHECK: __thread int gnu_tl;
4 // CHECK: _Thread_local int c11_tl;
5 // CHECK: thread_local int cxx11_tl;
10 // CHECK: void foo() {
11 // CHECK: thread_local int cxx11_tl;
12 // CHECK: }
|
| /external/compiler-rt/test/asan/TestCases/Darwin/ |
| asan_gen_prefixes.cc | 9 // CHECK: .section{{.*}}__TEXT,__const
10 // CHECK: l___asan_gen_
11 // CHECK: .section{{.*}}__TEXT,__cstring,cstring_literals
12 // CHECK: L___asan_gen_
13 // CHECK: L___asan_gen_
14 // CHECK: L___asan_gen_
|
| /external/llvm/test/Assembler/ |
| 2008-09-02-FunctionNotes.ll | 4 ; CHECK: define void @fn1() #0
9 ; CHECK: define void @fn2() #1
14 ; CHECK: define void @fn3()
15 ; CHECK-NOT: define void @fn3() #{{.*}}
20 ; CHECK: attributes #0 = { alwaysinline }
21 ; CHECK: attributes #1 = { noinline }
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-frameaddr.ll | 5 ; CHECK-LABEL: t:
6 ; CHECK: stp x29, x30, [sp, #-16]!
7 ; CHECK: mov x29, sp
8 ; CHECK: mov x0, x29
9 ; CHECK: ldp x29, x30, [sp], #16
10 ; CHECK: ret
|
| arm64-hello.ll | 2 ; RUN: llc < %s -mtriple=arm64-linux-gnu | FileCheck %s --check-prefix=CHECK-LINUX
4 ; CHECK-LABEL: main:
5 ; CHECK: stp x29, x30, [sp, #-16]!
6 ; CHECK-NEXT: mov x29, sp
7 ; CHECK-NEXT: sub sp, sp, #16
8 ; CHECK-NEXT: stur wzr, [x29, #-4]
9 ; CHECK: adrp x0, L_.str@PAGE
10 ; CHECK: add x0, x0, L_.str@PAGEOFF
11 ; CHECK-NEXT: bl _put
[all...] |
| arm64-leaf.ll | 5 ; CHECK-LABEL: t8:
6 ; CHECK-NOT: stp fp, lr, [sp, #-16]!
7 ; CHECK-NOT: mov fp, sp
8 ; CHECK: nop
9 ; CHECK-NOT: mov sp, fp
10 ; CHECK-NOT: ldp fp, lr, [sp], #16
|
| arm64-subsections.ll | 1 ; RUN: llc -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefix=CHECK-MACHO
2 ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s --check-prefix=CHECK-ELF
4 ; CHECK-MACHO: .subsections_via_symbols
5 ; CHECK-ELF-NOT: .subsections_via_symbol
|
| /external/llvm/test/CodeGen/ARM/ |
| div.ll | 1 ; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK-ARM
2 ; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=swift | FileCheck %s -check-prefix=CHECK-HWDIV
3 ; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r5 | FileCheck %s -check-prefix=CHECK-HWDIV
7 ; CHECK-ARM: f1
8 ; CHECK-ARM: __divsi3
10 ; CHECK-HWDIV: f1
11 ; CHECK-HWDIV: sdi
[all...] |
| /external/llvm/test/CodeGen/R600/ |
| build_vector.ll | 1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
2 ; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
4 ; R600-CHECK: @build_vector2
5 ; R600-CHECK: MOV
6 ; R600-CHECK: MOV
7 ; R600-CHECK-NOT: MOV
8 ; SI-CHECK: @build_vector2
9 ; SI-CHECK-DAG: V_MOV_B32_e32 v[[X:[0-9]]],
[all...] |
| /external/llvm/test/CodeGen/SPARC/ |
| parts.ll | 3 ; CHECK-LABEL: test
4 ; CHECK: srl %i1, 0, %o2
5 ; CHECK-NEXT: mov %i2, %o0
6 ; CHECK-NEXT: call __ashlti3
7 ; CHECK-NEXT: mov %i3, %o1
8 ; CHECK-NEXT: mov %o0, %i0
|
| /external/llvm/test/CodeGen/X86/ |
| bswap-vector.ll | 1 ; RUN: llc < %s -mcpu=x86-64 | FileCheck %s -check-prefix=CHECK-NOSSSE3
2 ; RUN: llc < %s -mcpu=core2 | FileCheck %s -check-prefix=CHECK-SSSE3
3 ; RUN: llc < %s -mcpu=core-avx2 | FileCheck %s -check-prefix=CHECK-AVX2
4 ; RUN: llc < %s -mcpu=core-avx2 -x86-experimental-vector-widening-legalization | FileCheck %s -check-prefix=CHECK-WIDE-AVX2
17 ; CHECK-NOSSSE3-LABEL: @test1
18 ; CHECK-NOSSSE3: rol
[all...] |
| fold-imm.ll | 9 ; CHECK: test
10 ; CHECK: inc
11 ; CHECK: ret
19 ; CHECK: test2
20 ; CHECK: {{add.*4.*$}}
21 ; CHECK: ret
|
| prefixdata.ll | 5 ; CHECK: f:
6 ; CHECK-NEXT: .cfi_startproc
7 ; CHECK-NEXT: .long 1
12 ; CHECK: g:
13 ; CHECK-NEXT: .cfi_startproc
14 ; CHECK-NEXT: .quad i
|
| /external/llvm/test/MC/ARM/ |
| directive-arch_extension-sec.s | 2 @ RUN: | FileCheck %s -check-prefix CHECK-ARMv6 -check-prefix CHECK-V6
4 @ RUN: | FileCheck %s -check-prefix CHECK-ARMv7 -check-prefix CHECK-V7
6 @ RUN: | FileCheck %s -check-prefix CHECK-THUMBv6 -check-prefix CHECK-V
[all...] |
| udf-arm-diagnostics.s | 10 @ CHECK: error: instruction 'udf' is not predicable, but condition code specified
11 @ CHECK: udfpl
12 @ CHECK: ^
16 @ CHECK: error: invalid operand for instruction
17 @ CHECK: udf #65536
18 @ CHECK: ^
|
| udf-thumb-diagnostics.s | 10 @ CHECK: error: conditional execution not supported in Thumb1
11 @ CHECK: udfpl
12 @ CHECK: ^
16 @ CHECK: error: instruction requires: arm-mode
17 @ CHECK: udf #256
18 @ CHECK: ^
|
| vorr-vbic-illegal-cases.s | 4 @ CHECK: error: invalid operand for instruction
5 @ CHECK: vorr.i32 d2, #0xffffffff
6 @ CHECK: error: invalid operand for instruction
7 @ CHECK: vorr.i32 q2, #0xffffffff
8 @ CHECK: error: invalid operand for instruction
9 @ CHECK: vorr.i32 d2, #0xabababab
10 @ CHECK: error: invalid operand for instruction
11 @ CHECK: vorr.i32 q2, #0xabababab
12 @ CHECK: error: invalid operand for instruction
13 @ CHECK: vorr.i16 q2, #0xaba
[all...] |
| /external/llvm/test/MC/AsmParser/ |
| directive_align.s | 3 # CHECK: TEST0:
4 # CHECK: .align 1
8 # CHECK: TEST1:
9 # CHECK: .p2alignl 3, 0x0, 2
13 # CHECK: TEST2:
14 # CHECK: .balign 3, 10
|
| rename.s | 9 // CHECK: .Ltmp0:
10 // CHECK: .size bar, .Ltmp0-bar
11 // CHECK: .Ltmp01
12 // CHECK: .size foo, .Ltmp01-foo
13 // CHECK: .Ltmp02
14 // CHECK: .size qux, .Ltmp02-qux
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| ppc64-encoding-bookII.txt | 3 # CHECK: icbi 2, 3
6 # CHECK: dcbt 2, 3
9 # CHECK: dcbtst 2, 3
12 # CHECK: dcbz 2, 3
15 # CHECK: dcbst 2, 3
18 # CHECK: isync
21 # CHECK: stwcx. 2, 3, 4
24 # CHECK: stdcx. 2, 3, 4
27 # CHECK: sync 2
30 # CHECK: eieio
[all...] |
| /external/llvm/test/MC/SystemZ/ |
| insn-bad-z196.s | 5 #CHECK: error: invalid operand
6 #CHECK: aghik %r0, %r1, -32769
7 #CHECK: error: invalid operand
8 #CHECK: aghik %r0, %r1, 32768
9 #CHECK: error: invalid operand
10 #CHECK: aghik %r0, %r1, foo
16 #CHECK: error: invalid operand
17 #CHECK: ahik %r0, %r1, -32769
18 #CHECK: error: invalid operand
19 #CHECK: ahik %r0, %r1, 3276
[all...] |
| /external/llvm/test/MC/X86/ |
| x86_64-rand-encoding.s | 3 // CHECK: rdrandw %ax
4 // CHECK: encoding: [0x66,0x0f,0xc7,0xf0]
7 // CHECK: rdrandl %eax
8 // CHECK: encoding: [0x0f,0xc7,0xf0]
11 // CHECK: rdrandq %rax
12 // CHECK: encoding: [0x48,0x0f,0xc7,0xf0]
15 // CHECK: rdrandw %r11w
16 // CHECK: encoding: [0x66,0x41,0x0f,0xc7,0xf3]
19 // CHECK: rdrandl %r11d
20 // CHECK: encoding: [0x41,0x0f,0xc7,0xf3
[all...] |
