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      1 ; RUN: llc < %s -mcpu=x86-64 | FileCheck %s -check-prefix=CHECK-NOSSSE3
      2 ; RUN: llc < %s -mcpu=core2 | FileCheck %s -check-prefix=CHECK-SSSE3
      3 ; RUN: llc < %s -mcpu=core-avx2 | FileCheck %s -check-prefix=CHECK-AVX2
      4 ; RUN: llc < %s -mcpu=core-avx2 -x86-experimental-vector-widening-legalization | FileCheck %s -check-prefix=CHECK-WIDE-AVX2
      5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
      6 target triple = "x86_64-unknown-linux-gnu"
      7 
      8 declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>)
      9 declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>)
     10 declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>)
     11 
     12 define <8 x i16> @test1(<8 x i16> %v) #0 {
     13 entry:
     14   %r = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %v)
     15   ret <8 x i16> %r
     16 
     17 ; CHECK-NOSSSE3-LABEL: @test1
     18 ; CHECK-NOSSSE3: rolw
     19 ; CHECK-NOSSSE3: rolw
     20 ; CHECK-NOSSSE3: rolw
     21 ; CHECK-NOSSSE3: rolw
     22 ; CHECK-NOSSSE3: rolw
     23 ; CHECK-NOSSSE3: rolw
     24 ; CHECK-NOSSSE3: rolw
     25 ; CHECK-NOSSSE3: rolw
     26 ; CHECK-NOSSSE3: retq
     27 
     28 ; CHECK-SSSE3-LABEL: @test1
     29 ; CHECK-SSSE3: pshufb
     30 ; CHECK-SSSE3-NEXT: retq
     31 
     32 ; CHECK-AVX2-LABEL: @test1
     33 ; CHECK-AVX2: vpshufb
     34 ; CHECK-AVX2-NEXT: retq
     35 
     36 ; CHECK-WIDE-AVX2-LABEL: @test1
     37 ; CHECK-WIDE-AVX2: vpshufb
     38 ; CHECK-WIDE-AVX2-NEXT: retq
     39 }
     40 
     41 define <4 x i32> @test2(<4 x i32> %v) #0 {
     42 entry:
     43   %r = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %v)
     44   ret <4 x i32> %r
     45 
     46 ; CHECK-NOSSSE3-LABEL: @test2
     47 ; CHECK-NOSSSE3: bswapl
     48 ; CHECK-NOSSSE3: bswapl
     49 ; CHECK-NOSSSE3: bswapl
     50 ; CHECK-NOSSSE3: bswapl
     51 ; CHECK-NOSSSE3: retq
     52 
     53 ; CHECK-SSSE3-LABEL: @test2
     54 ; CHECK-SSSE3: pshufb
     55 ; CHECK-SSSE3-NEXT: retq
     56 
     57 ; CHECK-AVX2-LABEL: @test2
     58 ; CHECK-AVX2: vpshufb
     59 ; CHECK-AVX2-NEXT: retq
     60 
     61 ; CHECK-WIDE-AVX2-LABEL: @test2
     62 ; CHECK-WIDE-AVX2: vpshufb
     63 ; CHECK-WIDE-AVX2-NEXT: retq
     64 }
     65 
     66 define <2 x i64> @test3(<2 x i64> %v) #0 {
     67 entry:
     68   %r = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v)
     69   ret <2 x i64> %r
     70 
     71 ; CHECK-NOSSSE3-LABEL: @test3
     72 ; CHECK-NOSSSE3: bswapq
     73 ; CHECK-NOSSSE3: bswapq
     74 ; CHECK-NOSSSE3: retq
     75 
     76 ; CHECK-SSSE3-LABEL: @test3
     77 ; CHECK-SSSE3: pshufb
     78 ; CHECK-SSSE3-NEXT: retq
     79 
     80 ; CHECK-AVX2-LABEL: @test3
     81 ; CHECK-AVX2: vpshufb
     82 ; CHECK-AVX2-NEXT: retq
     83 
     84 ; CHECK-WIDE-AVX2-LABEL: @test3
     85 ; CHECK-WIDE-AVX2: vpshufb
     86 ; CHECK-WIDE-AVX2-NEXT: retq
     87 }
     88 
     89 declare <16 x i16> @llvm.bswap.v16i16(<16 x i16>)
     90 declare <8 x i32> @llvm.bswap.v8i32(<8 x i32>)
     91 declare <4 x i64> @llvm.bswap.v4i64(<4 x i64>)
     92 
     93 define <16 x i16> @test4(<16 x i16> %v) #0 {
     94 entry:
     95   %r = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %v)
     96   ret <16 x i16> %r
     97 
     98 ; CHECK-SSSE3-LABEL: @test4
     99 ; CHECK-SSSE3: pshufb
    100 ; CHECK-SSSE3: pshufb
    101 ; CHECK-SSSE3-NEXT: retq
    102 
    103 ; CHECK-AVX2-LABEL: @test4
    104 ; CHECK-AVX2: vpshufb
    105 ; CHECK-AVX2-NEXT: retq
    106 
    107 ; CHECK-WIDE-AVX2-LABEL: @test4
    108 ; CHECK-WIDE-AVX2: vpshufb
    109 ; CHECK-WIDE-AVX2-NEXT: retq
    110 }
    111 
    112 define <8 x i32> @test5(<8 x i32> %v) #0 {
    113 entry:
    114   %r = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %v)
    115   ret <8 x i32> %r
    116 
    117 ; CHECK-SSSE3-LABEL: @test5
    118 ; CHECK-SSSE3: pshufb
    119 ; CHECK-SSSE3: pshufb
    120 ; CHECK-SSSE3-NEXT: retq
    121 
    122 ; CHECK-AVX2-LABEL: @test5
    123 ; CHECK-AVX2: vpshufb
    124 ; CHECK-AVX2-NEXT: retq
    125 
    126 ; CHECK-WIDE-AVX2-LABEL: @test5
    127 ; CHECK-WIDE-AVX2: vpshufb
    128 ; CHECK-WIDE-AVX2-NEXT: retq
    129 }
    130 
    131 define <4 x i64> @test6(<4 x i64> %v) #0 {
    132 entry:
    133   %r = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %v)
    134   ret <4 x i64> %r
    135 
    136 ; CHECK-SSSE3-LABEL: @test6
    137 ; CHECK-SSSE3: pshufb
    138 ; CHECK-SSSE3: pshufb
    139 ; CHECK-SSSE3-NEXT: retq
    140 
    141 ; CHECK-AVX2-LABEL: @test6
    142 ; CHECK-AVX2: vpshufb
    143 ; CHECK-AVX2-NEXT: retq
    144 
    145 ; CHECK-WIDE-AVX2-LABEL: @test6
    146 ; CHECK-WIDE-AVX2: vpshufb
    147 ; CHECK-WIDE-AVX2-NEXT: retq
    148 }
    149 
    150 declare <4 x i16> @llvm.bswap.v4i16(<4 x i16>)
    151 
    152 define <4 x i16> @test7(<4 x i16> %v) #0 {
    153 entry:
    154   %r = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %v)
    155   ret <4 x i16> %r
    156 
    157 ; CHECK-SSSE3-LABEL: @test7
    158 ; CHECK-SSSE3: pshufb
    159 ; CHECK-SSSE3: psrld $16
    160 ; CHECK-SSSE3-NEXT: retq
    161 
    162 ; CHECK-AVX2-LABEL: @test7
    163 ; CHECK-AVX2: vpshufb
    164 ; CHECK-AVX2: vpsrld $16
    165 ; CHECK-AVX2-NEXT: retq
    166 
    167 ; CHECK-WIDE-AVX2-LABEL: @test7
    168 ; CHECK-WIDE-AVX2: vpshufb
    169 ; CHECK-WIDE-AVX2-NEXT: retq
    170 }
    171 
    172 attributes #0 = { nounwind uwtable }
    173 
    174