/external/llvm/test/CodeGen/ARM/ |
2014-05-14-DwarfEHCrash.ll | 37 declare void @_Z3fn1v() #0 39 declare i32 @__gxx_personality_v0(...) 42 declare i32 @llvm.eh.typeid.for(i8*) #1 44 declare i8* @__cxa_begin_catch(i8*) 46 declare void @__cxa_end_catch()
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big-endian-eh-unwind.ll | 54 declare void @_Z3fooi(i32) #0 56 declare i32 @__gxx_personality_v0(...) 58 declare i8* @__cxa_begin_catch(i8*) 60 declare void @__cxa_end_catch() 69 declare void @_ZSt9terminatev()
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2012-04-24-SplitEHCriticalEdge.ll | 16 declare i8* @objc_msgSend(i8*, i8*, ...) 18 declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone 20 declare i8* @__cxa_begin_catch(i8*) 22 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind 24 declare void @__cxa_end_catch() 26 declare void @_ZSt9terminatev() 64 declare i32 @__gxx_personality_sj0(...)
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vabs.ll | 67 declare <8 x i8> @llvm.arm.neon.vabs.v8i8(<8 x i8>) nounwind readnone 68 declare <4 x i16> @llvm.arm.neon.vabs.v4i16(<4 x i16>) nounwind readnone 69 declare <2 x i32> @llvm.arm.neon.vabs.v2i32(<2 x i32>) nounwind readnone 70 declare <2 x float> @llvm.fabs.v2f32(<2 x float>) nounwind readnone 72 declare <16 x i8> @llvm.arm.neon.vabs.v16i8(<16 x i8>) nounwind readnone 73 declare <8 x i16> @llvm.arm.neon.vabs.v8i16(<8 x i16>) nounwind readnone 74 declare <4 x i32> @llvm.arm.neon.vabs.v4i32(<4 x i32>) nounwind readnone 75 declare <4 x float> @llvm.fabs.v4f32(<4 x float>) nounwind readnone 125 declare <8 x i8> @llvm.arm.neon.vqabs.v8i8(<8 x i8>) nounwind readnone 126 declare <4 x i16> @llvm.arm.neon.vqabs.v4i16(<4 x i16>) nounwind readnon [all...] |
vcnt.ll | 20 declare <8 x i8> @llvm.ctpop.v8i8(<8 x i8>) nounwind readnone 21 declare <16 x i8> @llvm.ctpop.v16i8(<16 x i8>) nounwind readnone 71 declare <8 x i8> @llvm.ctlz.v8i8(<8 x i8>, i1) nounwind readnone 72 declare <4 x i16> @llvm.ctlz.v4i16(<4 x i16>, i1) nounwind readnone 73 declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) nounwind readnone 75 declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>, i1) nounwind readnone 76 declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>, i1) nounwind readnone 77 declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1) nounwind readnone 127 declare <8 x i8> @llvm.arm.neon.vcls.v8i8(<8 x i8>) nounwind readnone 128 declare <4 x i16> @llvm.arm.neon.vcls.v4i16(<4 x i16>) nounwind readnon [all...] |
/external/llvm/test/CodeGen/PowerPC/ |
2008-10-31-PPCF128Libcalls.ll | 31 declare ppc_fp128 @llvm.sqrt.ppcf128(ppc_fp128) nounwind readonly 33 declare ppc_fp128 @"\01_sinl$LDBL128"(ppc_fp128) nounwind readonly 35 declare ppc_fp128 @"\01_cosl$LDBL128"(ppc_fp128) nounwind readonly 37 declare ppc_fp128 @llvm.pow.ppcf128(ppc_fp128, ppc_fp128) nounwind readonly 39 declare ppc_fp128 @copysignl(ppc_fp128, ppc_fp128)
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/external/llvm/test/CodeGen/Thumb2/ |
2013-02-19-tail-call-register-hint.ll | 41 declare void @mno(i8*) 43 declare void @def(%"myclass"*) 45 declare void @abc(%"myclass"*) 47 declare void @ghi(i8*) 49 declare %"myclass"* @jkl(%"myclass"*) nounwind
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/external/llvm/test/CodeGen/X86/ |
2009-09-10-LoadFoldingBug.ll | 43 declare i32 @vm_deallocate(i32, i64, i64) 45 declare i8* @pluginInstance(i8*, i32) 47 declare zeroext i8 @invoke(i8*, i32, i8*, i64, i32, i64*, i32*) 49 declare void @booleanAndDataReply(i32, i32, i32, i32, i64, i32) 51 declare i32 @__gxx_personality_v0(...)
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StackColoring-dbg.ll | 8 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone 20 call void @llvm.dbg.declare(metadata !{i8* %x.i}, metadata !22) nounwind 24 declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind 26 declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind
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sse3-intrinsics-x86.ll | 8 declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwind readnone 16 declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind readnone 24 declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind readnone 32 declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind readnone 40 declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind readnone 48 declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind readnone 57 declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8*) nounwind readonly
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tailcall-cgp-dup.ll | 53 declare i32 @f1() 55 declare i32 @f2() 57 declare i32 @f3() 59 declare i32 @f4() 61 declare i32 @f5() 63 declare i32 @f6() 68 declare i8* @bar(i8*) uwtable optsize noinline ssp
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vector-intrinsics.ll | 3 declare <4 x double> @llvm.sin.v4f64(<4 x double> %p) 4 declare <4 x double> @llvm.cos.v4f64(<4 x double> %p) 5 declare <4 x double> @llvm.pow.v4f64(<4 x double> %p, <4 x double> %q) 6 declare <4 x double> @llvm.powi.v4f64(<4 x double> %p, i32) 30 declare <9 x double> @llvm.exp.v9f64(<9 x double> %a) 31 declare <9 x double> @llvm.pow.v9f64(<9 x double> %a, <9 x double> %b) 32 declare <9 x double> @llvm.powi.v9f64(<9 x double> %a, i32)
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/external/llvm/test/MC/ARM/ |
elf-reloc-01.ll | 29 declare i32 @mystrlen(i8* nocapture %s) nounwind 31 declare void @myhextochar(i32 %n, i8* nocapture %buffer) 33 declare void @__aeabi_read_tp() nounwind 35 declare void @__nacl_read_tp() nounwind 61 declare void @exit(i32) noreturn nounwind
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/external/llvm/test/Transforms/InstCombine/ |
constant-fold-math.ll | 3 declare float @llvm.fma.f32(float, float, float) #0 4 declare float @llvm.fmuladd.f32(float, float, float) #0 5 declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>) #0 7 declare double @llvm.fma.f64(double, double, double) #0 8 declare double @llvm.fmuladd.f64(double, double, double) #0
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/external/llvm/test/Transforms/ObjCARC/ |
split-backedge.ll | 42 declare i8* @returner() 43 declare i32 @__objc_personality_v0(...) 44 declare void @objc_release(i8*) 45 declare i8* @objc_retain(i8*) 46 declare void @use_pointer(i8*)
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/external/llvm/test/Verifier/ |
invoke.ll | 26 declare i32 @__gxx_personality_v0(...) 27 declare void @llvm.donothing() 28 declare void @llvm.trap() 29 declare i8 @llvm.expect.i8(i8,i8) 30 declare i32 @fn(i8 (i8, i8)*)
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/external/llvm/test/CodeGen/AArch64/ |
arm64-neon-add-pairwise.ll | 3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>) 13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>) 22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>) 31 declare <8 x i16> @llvm.aarch64.neon.addp.v8i16(<8 x i16>, <8 x i16>) 40 declare <2 x i32> @llvm.aarch64.neon.addp.v2i32(<2 x i32>, <2 x i32>) 49 declare <4 x i32> @llvm.aarch64.neon.addp.v4i32(<4 x i32>, <4 x i32>) 59 declare <2 x i64> @llvm.aarch64.neon.addp.v2i64(<2 x i64>, <2 x i64>) 68 declare <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float>, <2 x float>) 69 declare <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float>, <4 x float>) 70 declare <2 x double> @llvm.aarch64.neon.addp.v2f64(<2 x double>, <2 x double> [all...] |
arm64-call-tailcalls.ll | 85 declare float @sinf(float) nounwind readonly 86 declare double @sin(double) nounwind readonly 87 declare void @bar() nounwind 88 declare void @foo() nounwind 89 declare i32 @a(i32) 90 declare i32 @b(i32) 91 declare i32 @c(i32)
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arm64-vpopcnt.ll | 13 declare <8 x i8> @llvm.ctpop.v8i8(<8 x i8>) nounwind readnone 22 declare <4 x i16> @llvm.ctpop.v4i16(<4 x i16>) nounwind readnone 31 declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>) nounwind readnone 41 declare <16 x i8> @llvm.ctpop.v16i8(<16 x i8>) nounwind readnone 50 declare <8 x i16> @llvm.ctpop.v8i16(<8 x i16>) nounwind readnone 59 declare <4 x i32> @llvm.ctpop.v4i32(<4 x i32>) nounwind readnone 68 declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>) nounwind readnone
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/external/llvm/test/Linker/ |
DbgDeclare.ll | 3 ; Test if metadata in dbg.declare is mapped properly or not. 7 ; CHECK: call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !{{[0-9]+}}) 8 ; CHECK: call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !{{[0-9]+}}) 10 ; CHECK: call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !{{[0-9]+}}) 11 ; CHECK: call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !{{[0-9]+}}) 12 ; CHECK: call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !{{[0-9]+}}) 24 call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !14), !dbg !15 26 call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !16), !dbg !15 33 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnon [all...] |
/external/llvm/test/CodeGen/Thumb/ |
dyn-stackalloc.ll | 34 declare fastcc void @f1(float*, float*, i32) 36 declare fastcc void @f2(float*, float*, float*, i32) 69 declare i32 @strlen(i8*) 71 declare i8* @strcat(i8*, i8*) 73 declare fastcc void @comment_add(%struct.comment*, i8*) 75 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind 77 declare i8* @strcpy(i8*, i8*)
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/external/llvm/test/CodeGen/XCore/ |
misc-intrinsics.ll | 4 declare i32 @llvm.xcore.bitrev(i32) 5 declare i32 @llvm.xcore.crc32(i32, i32, i32) 6 declare %0 @llvm.xcore.crc8(i32, i32, i32) 7 declare i32 @llvm.xcore.zext(i32, i32) 8 declare i32 @llvm.xcore.sext(i32, i32) 9 declare i32 @llvm.xcore.geted() 10 declare i32 @llvm.xcore.getet()
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/external/llvm/test/Transforms/GVN/ |
2011-07-07-MatchIntrinsicExtract.ll | 78 declare void @exit(i32) noreturn 79 declare %0 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone 80 declare %0 @llvm.usub.with.overflow.i64(i64, i64) nounwind readnone 81 declare %0 @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone 82 declare %0 @llvm.sadd.with.overflow.i64(i64, i64) nounwind readnone 83 declare %0 @llvm.ssub.with.overflow.i64(i64, i64) nounwind readnone 84 declare %0 @llvm.smul.with.overflow.i64(i64, i64) nounwind readnone
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/external/llvm/test/Transforms/Reg2Mem/ |
crash.ll | 4 declare void @f1() 6 declare i32 @__gxx_personality_sj0(...) 8 declare void @f2() 10 declare void @f3() 12 declare void @f4_() 14 declare void @_Z12xxxdtsP10xxxpq() 88 declare void @xxx_MemFree()
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/frameworks/compile/mclinker/include/mcld/Support/ |
TargetSelect.h | 13 // Declare all of the target-initialization functions that are available. 17 // Declare all of the target-dependent functions that are available. 21 // Declare all of the target-depedent linker information 25 // Declare all of the available linker environment. 29 // Declare all of the available emulators. 33 // Declare all of the available target-specific linker 37 // Declare all of the available target-specific diagnostic line infomation
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