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    Searched refs:getImm (Results 126 - 150 of 203) sorted by null

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  /external/llvm/lib/Target/PowerPC/
PPCBranchSelector.cpp 167 PPC::Predicate Pred = (PPC::Predicate)I->getOperand(0).getImm();
PPCMCInstLower.cpp 184 MCOp = MCOperand::CreateImm(MO.getImm());
PPCCodeEmitter.cpp 290 return MO.getImm();
PPCRegisterInfo.cpp 767 Offset += MI.getOperand(OffsetOperandNo).getImm();
    [all...]
  /external/llvm/lib/Target/R600/
R600EmitClauseMarkers.cpp 247 if (TII->getFlagOp(I).getImm() & MO_FLAG_PUSH)
  /external/llvm/lib/Target/Sparc/AsmParser/
SparcAsmParser.cpp 208 const MCExpr *getImm() const {
241 case k_Immediate: OS << "Imm: " << getImm() << "\n"; break;
258 const MCExpr *Expr = getImm();
375 const MCExpr *Imm = Op->getImm();
  /external/llvm/lib/Target/Sparc/MCTargetDesc/
SparcMCCodeEmitter.cpp 122 return MO.getImm();
  /external/llvm/lib/Target/Sparc/
SparcCodeEmitter.cpp 182 return static_cast<unsigned>(MO.getImm());
SparcRegisterInfo.cpp 164 MI.getOperand(FIOperandNum + 1).getImm() +
SparcAsmPrinter.cpp 361 O << (int)MO.getImm();
400 MI->getOperand(opNum+1).getImm() == 0)
SparcFrameLowering.cpp 140 int Size = MI.getOperand(0).getImm();
  /external/llvm/utils/TableGen/
CodeGenInstruction.h 325 int64_t getImm() const { assert(isImm()); return Imm; }
FastISelEmitter.cpp 88 static OpKind getImm(unsigned V) {
142 Result.Operands.push_back(OpKind::getImm(0));
182 Operands.push_back(OpKind::getImm(0));
222 Operands.push_back(OpKind::getImm(PredNo));
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
R600ISelLowering.cpp 99 int64_t RegIndex = MI->getOperand(1).getImm();
148 int64_t ReservedIndex = MI->getOperand(0).getImm();
  /external/llvm/include/llvm/CodeGen/
MachineInstr.h 522 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
536 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
    [all...]
MachineInstrBuilder.h 203 return addImm(Disp.getImm() + off);
MachineOperand.h 407 int64_t getImm() const {
  /external/llvm/lib/Target/ARM/
ARMLoadStoreOptimizer.cpp 357 Offset = MO.getImm() - WordOffset * getImmScale(Opc);
369 MO.getImm() + WordOffset * 4 :
370 MO.getImm() - WordOffset * 4 ;
820 (MI->getOperand(2).getImm() * Scale) == Bytes &&
855 (MI->getOperand(2).getImm() * Scale) == Bytes &&
    [all...]
  /external/mesa3d/src/gallium/drivers/radeon/
R600ISelLowering.cpp 99 int64_t RegIndex = MI->getOperand(1).getImm();
148 int64_t ReservedIndex = MI->getOperand(0).getImm();
  /external/llvm/lib/Target/AArch64/
AArch64AdvSIMDScalarPass.cpp 133 if (MI->getOpcode() == AArch64::UMOVvi64 && MI->getOperand(2).getImm() == 0) {
AArch64RegisterInfo.cpp 340 Offset += MI.getOperand(FIOperandNum + 1).getImm();
  /external/llvm/lib/Target/Hexagon/
HexagonVLIWPacketizer.cpp     [all...]
  /external/llvm/lib/Target/Mips/
Mips16ISelLowering.cpp 679 .addImm(MI->getOperand(4).getImm());
729 int64_t imm = MI->getOperand(1).getImm();
781 int64_t Imm = MI->getOperand(2).getImm();
MipsSEISelDAGToDAG.cpp 48 unsigned Mask = MI.getOperand(1).getImm();
92 (MI.getOperand(2).getImm() == 0)) {
97 (MI.getOperand(2).getImm() == 0)) {
  /external/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp     [all...]

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