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  /external/llvm/lib/Target/AArch64/AsmParser/
AArch64AsmParser.cpp 321 const MCExpr *getImm() const {
411 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
420 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
429 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
438 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
482 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
484 return isSymbolicUImm12Offset(getImm(), Scale);
493 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
502 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
511 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
    [all...]
  /external/llvm/lib/Target/X86/InstPrinter/
X86InstComments.cpp 44 DecodeINSERTPSMask(MI->getOperand(3).getImm(), ShuffleMask);
73 MI->getOperand(MI->getNumOperands()-1).getImm(),
84 MI->getOperand(MI->getNumOperands()-1).getImm(),
97 MI->getOperand(MI->getNumOperands()-1).getImm(),
107 MI->getOperand(MI->getNumOperands()-1).getImm(),
121 MI->getOperand(MI->getNumOperands()-1).getImm(),
131 MI->getOperand(MI->getNumOperands()-1).getImm(),
143 MI->getOperand(MI->getNumOperands()-1).getImm(),
153 MI->getOperand(MI->getNumOperands()-1).getImm(),
311 MI->getOperand(MI->getNumOperands()-1).getImm(),
    [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonAsmPrinter.cpp 74 O << MO.getImm();
162 if (Offset.getImm())
163 O << " + #" << Offset.getImm();
HexagonSplitTFRCondSets.cpp 142 addImm(MI->getOperand(3).getImm());
163 addImm(MI->getOperand(2).getImm());
188 int Immed1 = MI->getOperand(2).getImm();
189 int Immed2 = MI->getOperand(3).getImm();
  /external/llvm/lib/Target/R600/MCTargetDesc/
SIMCCodeEmitter.cpp 90 Imm.I = MO.getImm();
159 Imm.I = Op.getImm();
200 return MO.getImm();
  /external/llvm/lib/Target/R600/
R600ExpandSpecialInstrs.cpp 62 uint64_t Val = OldMI->getOperand(OpIdx).getImm();
101 uint64_t Flags = MI.getOperand(3).getImm();
105 MI.getOperand(2).getImm(), // opcode
122 MI.getOperand(2).getImm());
151 MI.getOperand(2).getImm());
181 MI.getOperand(1).getImm());
AMDGPUInstrInfo.cpp 136 unsigned RegIndex = MI->getOperand(RegOpIdx).getImm();
137 unsigned Channel = MI->getOperand(ChanOpIdx).getImm();
151 unsigned RegIndex = MI->getOperand(RegOpIdx).getImm();
152 unsigned Channel = MI->getOperand(ChanOpIdx).getImm();
  /external/llvm/lib/Target/SystemZ/
SystemZElimCompare.cpp 176 if (MI->getOperand(2).getImm() != -1)
184 Branch->getOperand(0).getImm() != SystemZ::CCMASK_ICMP ||
185 Branch->getOperand(1).getImm() != SystemZ::CCMASK_CMP_NE)
269 unsigned CCValid = MI->getOperand(FirstOpNum).getImm();
270 unsigned CCMask = MI->getOperand(FirstOpNum + 1).getImm();
283 unsigned CCMask = AlterMasks[I + 1]->getImm();
313 Compare->getOperand(1).getImm() == 0);
393 assert((CCMask.getImm() & ~SystemZ::CCMASK_ICMP) == 0 &&
  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsMCCodeEmitter.cpp 58 int64_t Shift = Inst.getOperand(2).getImm();
97 int64_t pos = InstIn.getOperand(2).getImm();
99 int64_t size = InstIn.getOperand(3).getImm();
211 if (MO.isImm()) return MO.getImm() >> 2;
233 if (MO.isImm()) return MO.getImm() >> 1;
256 if (MO.isImm()) return MO.getImm() >> 2;
278 if (MO.isImm()) return MO.getImm() >> 2;
299 if (MO.isImm()) return MO.getImm();
318 if (MO.isImm()) return MO.getImm()>>2;
336 if (MO.isImm()) return MO.getImm() >> 1
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
AMDGPUMCInstLower.cpp 48 MCOp = MCOperand::CreateImm(MO.getImm());
  /external/llvm/lib/MC/
MCInst.cpp 25 OS << "Imm:" << getImm();
  /external/llvm/lib/Target/AArch64/
AArch64LoadStoreOptimizer.cpp 297 if (I->getOperand(2).getImm() ==
298 Paired->getOperand(2).getImm() + OffsetStride) {
306 int OffsetImm = RtMI->getOperand(2).getImm();
397 int Offset = FirstMI->getOperand(2).getImm();
438 int MIOffset = MI->getOperand(2).getImm();
532 int Value = Update->getOperand(2).getImm();
533 assert(AArch64_AM::getShiftValue(Update->getOperand(3).getImm()) == 0 &&
575 int Value = Update->getOperand(2).getImm();
576 assert(AArch64_AM::getShiftValue(Update->getOperand(3).getImm()) == 0 &&
621 if (AArch64_AM::getShiftValue(MI->getOperand(3).getImm()))
    [all...]
AArch64InstrInfo.cpp 186 if (Cond[0].getImm() != -1) {
188 AArch64CC::CondCode CC = (AArch64CC::CondCode)(int)Cond[0].getImm();
192 switch (Cond[1].getImm()) {
258 if (Cond[0].getImm() != -1) {
260 BuildMI(&MBB, DL, get(AArch64::Bcc)).addImm(Cond[0].getImm()).addMBB(TBB);
264 BuildMI(&MBB, DL, get(Cond[1].getImm())).addReg(Cond[2].getReg());
266 MIB.addImm(Cond[3].getImm());
325 if (!DefMI->getOperand(2).isImm() || DefMI->getOperand(2).getImm() != 1 ||
326 DefMI->getOperand(3).getImm() != 0)
423 CC = AArch64CC::CondCode(Cond[0].getImm());
    [all...]
AArch64ConditionalCompares.cpp 274 if (Cond[0].getImm() != -1) {
276 CC = (AArch64CC::CondCode)(int)Cond[0].getImm();
280 switch (Cond[1].getImm()) {
330 if (I->getOperand(3).getImm() || !isUInt<5>(I->getOperand(2).getImm())) {
578 if (HeadCond[0].getImm() == -1) {
581 switch (HeadCond[1].getImm()) {
688 if (HeadCond[0].getImm() == -1) {
689 switch (HeadCond[1].getImm()) {
AArch64AsmPrinter.cpp 167 Location.set(MI->getOperand(0).getReg(), MI->getOperand(1).getImm());
223 int64_t Imm = MO.getImm();
286 if (MO.isImm() && MO.getImm() == 0) {
381 unsigned NumNOPBytes = MI.getOperand(1).getImm();
398 int64_t CallTarget = Opers.getMetaOper(PatchPointOpers::TargetPos).getImm();
423 unsigned NumBytes = Opers.getMetaOper(PatchPointOpers::NBytesPos).getImm();
  /external/llvm/lib/Target/NVPTX/
NVPTXInstrInfo.h 71 return MI.getOperand(2).getImm();
NVPTXutil.cpp 27 if (MI->getOperand(2).getImm() != NVPTX::PTXLdStInstCode::PARAM)
  /external/llvm/lib/Target/XCore/InstPrinter/
XCoreInstPrinter.cpp 81 O << Op.getImm();
  /external/mesa3d/src/gallium/drivers/radeon/
AMDGPUMCInstLower.cpp 48 MCOp = MCOperand::CreateImm(MO.getImm());
  /external/llvm/lib/Target/ARM/
ARMCodeEmitter.cpp 254 int32_t Imm12 = MO1.getImm();
292 int32_t Imm12 = MO1.getImm();
424 return static_cast<unsigned>(MO.getImm());
447 return static_cast<unsigned>(MO.getImm());
623 unsigned CPI = MI.getOperand(0).getImm(); // CP instruction index.
724 assert(MO1.isImm() && ARM_AM::isSOImmTwoPartVal(MO1.getImm()) &&
726 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO1.getImm());
727 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO1.getImm());
873 addPCLabel(MI.getOperand(2).getImm());
883 addPCLabel(MI.getOperand(2).getImm());
    [all...]
ARMAsmPrinter.cpp 146 int64_t Imm = MO.getImm();
223 O << MI->getOperand(OpNum).getImm();
247 O << ~(MI->getOperand(OpNum).getImm());
252 O << (MI->getOperand(OpNum).getImm() & 0xffff);
293 unsigned Flags = FlagsOP.getImm();
301 unsigned OpFlags = MI->getOperand(OpNum).getImm();
304 Flags = MI->getOperand(OpNum).getImm();
    [all...]
ARMBaseRegisterInfo.cpp 454 InstrOffs = MI->getOperand(Idx+1).getImm();
460 InstrOffs = ARM_AM::getAM5Offset(OffOp.getImm());
461 if (ARM_AM::getAM5Op(OffOp.getImm()) == ARM_AM::sub)
468 InstrOffs = ARM_AM::getAM2Offset(MI->getOperand(ImmIdx).getImm());
469 if (ARM_AM::getAM2Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub)
475 InstrOffs = ARM_AM::getAM3Offset(MI->getOperand(ImmIdx).getImm());
476 if (ARM_AM::getAM3Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub)
482 InstrOffs = MI->getOperand(ImmIdx).getImm();
759 ? ARMCC::AL : (ARMCC::CondCodes)MI.getOperand(PIdx).getImm();
  /external/llvm/lib/CodeGen/
StackMaps.cpp 42 IsAnyReg(MI->getOperand(getMetaIdx(CCPos)).getImm() == CallingConv::AnyReg)
83 switch (MOI->getImm()) {
90 int64_t Imm = (++MOI)->getImm();
95 int64_t Size = (++MOI)->getImm();
98 int64_t Imm = (++MOI)->getImm();
105 int64_t Imm = MOI->getImm();
246 int64_t ID = MI.getOperand(0).getImm();
255 int64_t ID = opers.getMetaOper(PatchPointOpers::IDPos).getImm();
266 unsigned NArgs = opers.getMetaOper(PatchPointOpers::NArgPos).getImm();
  /external/llvm/lib/Target/X86/
X86AsmPrinter.cpp 191 O << MO.getImm();
221 O << MO.getImm();
252 int DispVal = DispSpec.getImm();
276 unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm();
301 unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm();
332 int64_t DispVal = DispSpec.getImm();
397 O << MO.getImm();
421 O << MO.getImm();
459 O << -MO.getImm();
  /external/llvm/lib/CodeGen/AsmPrinter/
AsmPrinterInlineAsm.cpp 221 unsigned OpFlags = MI->getOperand(OpNo).getImm();
232 unsigned OpFlags = MI->getOperand(OpNo).getImm();
387 unsigned OpFlags = MI->getOperand(OpNo).getImm();
398 unsigned OpFlags = MI->getOperand(OpNo).getImm();
545 O << MO.getImm();
550 O << -MO.getImm();

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