| /external/llvm/test/CodeGen/X86/ |
| bit-test-shift.ll | 7 ; CHECK: sarl $31, %eax
|
| sdiv-exact.ll | 15 ; CHECK: sarl $3
|
| 2008-09-11-CoalescerBug2.ll | 12 ; SOURCE-SCHED: sarl
|
| phys_subreg_coalesce-3.ll | 24 ; CHECK: sarl %cl
|
| bswap.ll | 65 ; CHECK: sarl $16, [[REG]]
69 ; CHECK64: sarl $16, [[REG]]
|
| 2007-10-12-SpillerUnfold2.ll | 1 ; RUN: llc < %s -march=x86 -mcpu=corei7 | grep sarl | not grep esp
|
| divide-by-constant.ll | 60 ; CHECK: sarl $18, %ecx
|
| legalize-shift-64.ll | 54 ; CHECK: sarl %cl, %edx
|
| narrow-shl-load.ll | 37 ; CHECK: sarl
|
| vshift-3.ll | 12 ; CHECK: sarl
|
| fast-isel-x86-64.ll | 75 ; CHECK: sarl %cl, %edi
128 ; CHECK: sarl $3,
|
| /external/compiler-rt/lib/builtins/i386/ |
| ashrdi3.S | 59 sarl %cl, %edx // right shift high by count
63 sarl $31, %edx // clear high
64 sarl %cl, %eax // shift low by count - 32
|
| floatundisf.S | 38 sarl $31, %eax
80 sarl $31, %eax // (big input) ? -1 : 0
|
| divdi3.S | 33 sarl $31, %ecx // (b < 0) ? -1 : 0
45 sarl $31, %ecx // (a < 0) ? -1 : 0
|
| moddi3.S | 33 sarl $31, %ecx // (b < 0) ? -1 : 0
44 sarl $31, %ecx // (a < 0) ? -1 : 0
|
| /prebuilts/tools/common/m2/repository/biz/aQute/bnd/1.50.0/ |
| bnd-1.50.0.pom | 15 <name>aQute SARL</name>
|
| /prebuilts/tools/common/m2/repository/biz/aQute/bndlib/1.50.0/ |
| bndlib-1.50.0.pom | 37 aQute SARL
|
| /bionic/libc/arch-x86/atom/string/ |
| sse2-wcschr-atom.S | 125 sarl %cl, %edx
126 sarl %cl, %eax
|
| sse2-strchr-atom.S | 115 sarl %cl, %edx
116 sarl %cl, %eax
|
| /external/llvm/test/Analysis/CostModel/X86/ |
| testshiftashr.ll | 22 ; SSE2-CODEGEN: sarl %cl
82 ; SSE2-CODEGEN: sarl %cl
94 ; SSE2-CODEGEN: sarl %cl
106 ; SSE2-CODEGEN: sarl %cl
118 ; SSE2-CODEGEN: sarl %cl
202 ; SSE2-CODEGEN: sarl %cl
|
| /external/openssl/crypto/bn/asm/ |
| x86-gf2m.S | 115 sarl $31,%eax
128 sarl $31,%edi
|
| /external/chromium_org/third_party/mesa/src/src/mesa/x86/ |
| read_rgba_span_x86.S | 102 sarl $2, %eax
208 sarl $2, %eax
369 sarl $2, %eax
532 sarl $2, %ecx
|
| /external/mesa3d/src/mesa/x86/ |
| read_rgba_span_x86.S | 102 sarl $2, %eax
208 sarl $2, %eax
369 sarl $2, %eax
532 sarl $2, %ecx
|
| /art/compiler/utils/x86/ |
| assembler_x86.h | 403 void sarl(Register reg, const Immediate& imm);
404 void sarl(Register operand, Register shifter);
|
| /external/valgrind/main/VEX/orig_amd64/ |
| test1.sorted | [all...] |
