1 ; RUN: llc -march=x86-64 < %s | FileCheck %s 2 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 4 target triple = "x86_64-pc-linux-gnu" 5 6 ; DAGCombiner should fold this code in finite time. 7 ; rdar://8606584 8 9 define void @test1() nounwind readnone { 10 bb.nph: 11 br label %while.cond 12 13 while.cond: ; preds = %while.cond, %bb.nph 14 %tmp6 = load i32* undef, align 4 15 %and = or i64 undef, undef 16 %conv11 = zext i32 undef to i64 17 %conv14 = zext i32 %tmp6 to i64 18 %shl15 = shl i64 %conv14, 1 19 %shl15.masked = and i64 %shl15, 4294967294 20 %and17 = or i64 %shl15.masked, %conv11 21 %add = add i64 %and17, 1 22 %xor = xor i64 %add, %and 23 %tmp20 = load i64* undef, align 8 24 %add21 = add i64 %xor, %tmp20 25 %conv22 = trunc i64 %add21 to i32 26 store i32 %conv22, i32* undef, align 4 27 br i1 false, label %while.end, label %while.cond 28 29 while.end: ; preds = %while.cond 30 ret void 31 } 32 33 34 ; DAGCombiner shouldn't fold the sdiv (ashr) away. 35 ; rdar://8636812 36 ; CHECK-LABEL: test2: 37 ; CHECK: sarl 38 39 define i32 @test2() nounwind { 40 entry: 41 %i = alloca i32, align 4 42 %j = alloca i8, align 1 43 store i32 127, i32* %i, align 4 44 store i8 0, i8* %j, align 1 45 %tmp3 = load i32* %i, align 4 46 %mul = mul nsw i32 %tmp3, 2 47 %conv4 = trunc i32 %mul to i8 48 %conv5 = sext i8 %conv4 to i32 49 %div6 = sdiv i32 %conv5, 2 50 %conv7 = trunc i32 %div6 to i8 51 %conv9 = sext i8 %conv7 to i32 52 %cmp = icmp eq i32 %conv9, -1 53 br i1 %cmp, label %if.then, label %if.end 54 55 if.then: ; preds = %entry 56 ret i32 0 57 58 if.end: ; preds = %entry 59 call void @abort() noreturn 60 unreachable 61 } 62 63 declare void @abort() noreturn 64 65 declare void @exit(i32) noreturn 66 67 ; DAG Combiner can't fold this into a load of the 1'th byte. 68 ; PR8757 69 define i32 @test3(i32 *%P) nounwind ssp { 70 store volatile i32 128, i32* %P 71 %tmp4.pre = load i32* %P 72 %phitmp = trunc i32 %tmp4.pre to i16 73 %phitmp13 = shl i16 %phitmp, 8 74 %phitmp14 = ashr i16 %phitmp13, 8 75 %phitmp15 = lshr i16 %phitmp14, 8 76 %phitmp16 = zext i16 %phitmp15 to i32 77 ret i32 %phitmp16 78 79 ; CHECK: movl $128, (%rdi) 80 ; CHECK-NEXT: movsbl (%rdi), %eax 81 ; CHECK-NEXT: movzbl %ah, %eax 82 ; CHECK-NEXT: ret 83 } 84
