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      1 // Copyright 2006-2009 the V8 project authors. All rights reserved.
      2 // Use of this source code is governed by a BSD-style license that can be
      3 // found in the LICENSE file.
      4 
      5 // CPU specific code for arm independent of OS goes here.
      6 #ifdef __arm__
      7 #ifdef __QNXNTO__
      8 #include <sys/mman.h>  // for cache flushing.
      9 #undef MAP_TYPE
     10 #else
     11 #include <sys/syscall.h>  // for cache flushing.
     12 #endif
     13 #endif
     14 
     15 #include "src/v8.h"
     16 
     17 #if V8_TARGET_ARCH_ARM
     18 
     19 #include "src/assembler.h"
     20 #include "src/macro-assembler.h"
     21 #include "src/simulator.h"  // for cache flushing.
     22 
     23 namespace v8 {
     24 namespace internal {
     25 
     26 
     27 void CpuFeatures::FlushICache(void* start, size_t size) {
     28   if (size == 0) return;
     29 
     30 #if defined(USE_SIMULATOR)
     31   // Not generating ARM instructions for C-code. This means that we are
     32   // building an ARM emulator based target.  We should notify the simulator
     33   // that the Icache was flushed.
     34   // None of this code ends up in the snapshot so there are no issues
     35   // around whether or not to generate the code when building snapshots.
     36   Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size);
     37 
     38 #elif V8_OS_QNX
     39   msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE);
     40 
     41 #else
     42   register uint32_t beg asm("r0") = reinterpret_cast<uint32_t>(start);
     43   register uint32_t end asm("r1") = beg + size;
     44   register uint32_t flg asm("r2") = 0;
     45 
     46   asm volatile(
     47     // This assembly works for both ARM and Thumb targets.
     48 
     49     // Preserve r7; it is callee-saved, and GCC uses it as a frame pointer for
     50     // Thumb targets.
     51     "  push {r7}\n"
     52                                   // r0 = beg
     53                                   // r1 = end
     54                                   // r2 = flags (0)
     55     "  ldr r7, =%c[scno]\n"       // r7 = syscall number
     56     "  svc 0\n"
     57 
     58     "  pop {r7}\n"
     59     :
     60     : "r" (beg), "r" (end), "r" (flg), [scno] "i" (__ARM_NR_cacheflush)
     61     : "memory");
     62 #endif
     63 }
     64 
     65 } }  // namespace v8::internal
     66 
     67 #endif  // V8_TARGET_ARCH_ARM
     68