1 // REQUIRES: aarch64-registered-target 2 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \ 3 // RUN: -ffp-contract=fast -S -O3 -o - %s | FileCheck %s 4 5 // Test new aarch64 intrinsics and types 6 7 #include <arm_neon.h> 8 9 int8x8_t test_vext_s8(int8x8_t a, int8x8_t b) { 10 // CHECK-LABEL: test_vext_s8 11 return vext_s8(a, b, 2); 12 // CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #{{(0x)?2}} 13 } 14 15 int16x4_t test_vext_s16(int16x4_t a, int16x4_t b) { 16 // CHECK-LABEL: test_vext_s16 17 return vext_s16(a, b, 3); 18 // CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #{{(0x)?6}} 19 } 20 21 int32x2_t test_vext_s32(int32x2_t a, int32x2_t b) { 22 // CHECK-LABEL: test_vext_s32 23 return vext_s32(a, b, 1); 24 // CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #{{(0x)?4}} 25 } 26 27 int64x1_t test_vext_s64(int64x1_t a, int64x1_t b) { 28 // CHECK-LABEL: test_vext_s64 29 return vext_s64(a, b, 0); 30 } 31 32 int8x16_t test_vextq_s8(int8x16_t a, int8x16_t b) { 33 // CHECK-LABEL: test_vextq_s8 34 return vextq_s8(a, b, 2); 35 // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?2}} 36 } 37 38 int16x8_t test_vextq_s16(int16x8_t a, int16x8_t b) { 39 // CHECK-LABEL: test_vextq_s16 40 return vextq_s16(a, b, 3); 41 // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?6}} 42 } 43 44 int32x4_t test_vextq_s32(int32x4_t a, int32x4_t b) { 45 // CHECK-LABEL: test_vextq_s32 46 return vextq_s32(a, b, 1); 47 // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?4}} 48 } 49 50 int64x2_t test_vextq_s64(int64x2_t a, int64x2_t b) { 51 // CHECK-LABEL: test_vextq_s64 52 return vextq_s64(a, b, 1); 53 // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?8}} 54 } 55 56 uint8x8_t test_vext_u8(uint8x8_t a, uint8x8_t b) { 57 // CHECK-LABEL: test_vext_u8 58 return vext_u8(a, b, 2); 59 // CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #{{(0x)?2}} 60 } 61 62 uint16x4_t test_vext_u16(uint16x4_t a, uint16x4_t b) { 63 // CHECK-LABEL: test_vext_u16 64 return vext_u16(a, b, 3); 65 // CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #{{(0x)?6}} 66 } 67 68 uint32x2_t test_vext_u32(uint32x2_t a, uint32x2_t b) { 69 // CHECK-LABEL: test_vext_u32 70 return vext_u32(a, b, 1); 71 // CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #{{(0x)?4}} 72 } 73 74 uint64x1_t test_vext_u64(uint64x1_t a, uint64x1_t b) { 75 // CHECK-LABEL: test_vext_u64 76 return vext_u64(a, b, 0); 77 } 78 79 uint8x16_t test_vextq_u8(uint8x16_t a, uint8x16_t b) { 80 // CHECK-LABEL: test_vextq_u8 81 return vextq_u8(a, b, 2); 82 // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?2}} 83 } 84 85 uint16x8_t test_vextq_u16(uint16x8_t a, uint16x8_t b) { 86 // CHECK-LABEL: test_vextq_u16 87 return vextq_u16(a, b, 3); 88 // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?6}} 89 } 90 91 uint32x4_t test_vextq_u32(uint32x4_t a, uint32x4_t b) { 92 // CHECK-LABEL: test_vextq_u32 93 return vextq_u32(a, b, 1); 94 // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?4}} 95 } 96 97 uint64x2_t test_vextq_u64(uint64x2_t a, uint64x2_t b) { 98 // CHECK-LABEL: test_vextq_u64 99 return vextq_u64(a, b, 1); 100 // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?8}} 101 } 102 103 float32x2_t test_vext_f32(float32x2_t a, float32x2_t b) { 104 // CHECK-LABEL: test_vext_f32 105 return vext_f32(a, b, 1); 106 // CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #{{(0x)?4}} 107 } 108 109 float64x1_t test_vext_f64(float64x1_t a, float64x1_t b) { 110 // CHECK-LABEL: test_vext_f64 111 return vext_f64(a, b, 0); 112 } 113 114 float32x4_t test_vextq_f32(float32x4_t a, float32x4_t b) { 115 // CHECK-LABEL: test_vextq_f32 116 return vextq_f32(a, b, 1); 117 // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?4}} 118 } 119 120 float64x2_t test_vextq_f64(float64x2_t a, float64x2_t b) { 121 // CHECK-LABEL: test_vextq_f64 122 return vextq_f64(a, b, 1); 123 // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?8}} 124 } 125 126 poly8x8_t test_vext_p8(poly8x8_t a, poly8x8_t b) { 127 // CHECK-LABEL: test_vext_p8 128 return vext_p8(a, b, 2); 129 // CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #{{(0x)?2}} 130 } 131 132 poly16x4_t test_vext_p16(poly16x4_t a, poly16x4_t b) { 133 // CHECK-LABEL: test_vext_p16 134 return vext_p16(a, b, 3); 135 // CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #{{(0x)?6}} 136 } 137 138 poly8x16_t test_vextq_p8(poly8x16_t a, poly8x16_t b) { 139 // CHECK-LABEL: test_vextq_p8 140 return vextq_p8(a, b, 2); 141 // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?2}} 142 } 143 144 poly16x8_t test_vextq_p16(poly16x8_t a, poly16x8_t b) { 145 // CHECK-LABEL: test_vextq_p16 146 return vextq_p16(a, b, 3); 147 // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?6}} 148 } 149
