1 //===---------------------------- libunwind.h -----------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is dual licensed under the MIT and the University of Illinois Open 6 // Source Licenses. See LICENSE.TXT for details. 7 // 8 // 9 // Compatible with libuwind API documented at: 10 // http://www.nongnu.org/libunwind/man/libunwind(3).html 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef __LIBUNWIND__ 15 #define __LIBUNWIND__ 16 17 #include <stdint.h> 18 #include <stddef.h> 19 20 // FIXME: This is also in unwind.h and cxxabi.h, can we consolidate? 21 #if !defined(__USING_SJLJ_EXCEPTIONS__) && defined(__arm__) && \ 22 !defined(__ARM_DWARF_EH__) && !defined(__APPLE__) 23 #define LIBCXXABI_ARM_EHABI 1 24 #else 25 #define LIBCXXABI_ARM_EHABI 0 26 #endif 27 28 #if __APPLE__ 29 #include <Availability.h> 30 #if __arm__ 31 #define LIBUNWIND_AVAIL __attribute__((unavailable)) 32 #else 33 #define LIBUNWIND_AVAIL __OSX_AVAILABLE_STARTING(__MAC_10_6, __IPHONE_5_0) 34 #endif 35 #else 36 #define LIBUNWIND_AVAIL 37 #endif 38 39 /* error codes */ 40 enum { 41 UNW_ESUCCESS = 0, /* no error */ 42 UNW_EUNSPEC = -6540, /* unspecified (general) error */ 43 UNW_ENOMEM = -6541, /* out of memory */ 44 UNW_EBADREG = -6542, /* bad register number */ 45 UNW_EREADONLYREG = -6543, /* attempt to write read-only register */ 46 UNW_ESTOPUNWIND = -6544, /* stop unwinding */ 47 UNW_EINVALIDIP = -6545, /* invalid IP */ 48 UNW_EBADFRAME = -6546, /* bad frame */ 49 UNW_EINVAL = -6547, /* unsupported operation or bad value */ 50 UNW_EBADVERSION = -6548, /* unwind info has unsupported version */ 51 UNW_ENOINFO = -6549 /* no unwind info found */ 52 }; 53 54 struct unw_context_t { 55 uint64_t data[128]; 56 }; 57 typedef struct unw_context_t unw_context_t; 58 59 struct unw_cursor_t { 60 uint64_t data[140]; 61 }; 62 typedef struct unw_cursor_t unw_cursor_t; 63 64 typedef struct unw_addr_space *unw_addr_space_t; 65 66 typedef int unw_regnum_t; 67 #if LIBCXXABI_ARM_EHABI 68 typedef uint32_t unw_word_t; 69 typedef uint64_t unw_fpreg_t; 70 #else 71 typedef uint64_t unw_word_t; 72 typedef double unw_fpreg_t; 73 #endif 74 75 struct unw_proc_info_t { 76 unw_word_t start_ip; /* start address of function */ 77 unw_word_t end_ip; /* address after end of function */ 78 unw_word_t lsda; /* address of language specific data area, */ 79 /* or zero if not used */ 80 unw_word_t handler; /* personality routine, or zero if not used */ 81 unw_word_t gp; /* not used */ 82 unw_word_t flags; /* not used */ 83 uint32_t format; /* compact unwind encoding, or zero if none */ 84 uint32_t unwind_info_size; /* size of dwarf unwind info, or zero if none */ 85 unw_word_t unwind_info; /* address of dwarf unwind info, or zero */ 86 unw_word_t extra; /* mach_header of mach-o image containing func */ 87 }; 88 typedef struct unw_proc_info_t unw_proc_info_t; 89 90 #ifdef __cplusplus 91 extern "C" { 92 #endif 93 94 extern int unw_getcontext(unw_context_t *) LIBUNWIND_AVAIL; 95 extern int unw_init_local(unw_cursor_t *, unw_context_t *) LIBUNWIND_AVAIL; 96 extern int unw_step(unw_cursor_t *) LIBUNWIND_AVAIL; 97 extern int unw_get_reg(unw_cursor_t *, unw_regnum_t, unw_word_t *) LIBUNWIND_AVAIL; 98 extern int unw_get_fpreg(unw_cursor_t *, unw_regnum_t, unw_fpreg_t *) LIBUNWIND_AVAIL; 99 extern int unw_set_reg(unw_cursor_t *, unw_regnum_t, unw_word_t) LIBUNWIND_AVAIL; 100 extern int unw_set_fpreg(unw_cursor_t *, unw_regnum_t, unw_fpreg_t) LIBUNWIND_AVAIL; 101 extern int unw_resume(unw_cursor_t *) LIBUNWIND_AVAIL; 102 103 #if __arm__ 104 /* Save VFP registers in FSTMX format (instead of FSTMD). */ 105 extern void unw_save_vfp_as_X(unw_cursor_t *) LIBUNWIND_AVAIL; 106 #endif 107 108 109 extern const char *unw_regname(unw_cursor_t *, unw_regnum_t) LIBUNWIND_AVAIL; 110 extern int unw_get_proc_info(unw_cursor_t *, unw_proc_info_t *) LIBUNWIND_AVAIL; 111 extern int unw_is_fpreg(unw_cursor_t *, unw_regnum_t) LIBUNWIND_AVAIL; 112 extern int unw_is_signal_frame(unw_cursor_t *) LIBUNWIND_AVAIL; 113 extern int unw_get_proc_name(unw_cursor_t *, char *, size_t, unw_word_t *) LIBUNWIND_AVAIL; 114 //extern int unw_get_save_loc(unw_cursor_t*, int, unw_save_loc_t*); 115 116 #if UNW_REMOTE 117 /* 118 * Mac OS X "remote" API for unwinding other processes on same machine 119 * 120 */ 121 extern unw_addr_space_t unw_local_addr_space; 122 extern unw_addr_space_t unw_create_addr_space_for_task(task_t); 123 extern void unw_destroy_addr_space(unw_addr_space_t); 124 extern int unw_init_remote_thread(unw_cursor_t *, unw_addr_space_t, thread_t *); 125 #endif 126 127 /* 128 * traditional libuwind "remote" API 129 * NOT IMPLEMENTED on Mac OS X 130 * 131 * extern int unw_init_remote(unw_cursor_t*, unw_addr_space_t, 132 * thread_t*); 133 * extern unw_accessors_t unw_get_accessors(unw_addr_space_t); 134 * extern unw_addr_space_t unw_create_addr_space(unw_accessors_t, int); 135 * extern void unw_flush_cache(unw_addr_space_t, unw_word_t, 136 * unw_word_t); 137 * extern int unw_set_caching_policy(unw_addr_space_t, 138 * unw_caching_policy_t); 139 * extern void _U_dyn_register(unw_dyn_info_t*); 140 * extern void _U_dyn_cancel(unw_dyn_info_t*); 141 */ 142 143 #ifdef __cplusplus 144 } 145 #endif 146 147 // architecture independent register numbers 148 enum { 149 UNW_REG_IP = -1, // instruction pointer 150 UNW_REG_SP = -2, // stack pointer 151 }; 152 153 // 32-bit x86 registers 154 enum { 155 UNW_X86_EAX = 0, 156 UNW_X86_ECX = 1, 157 UNW_X86_EDX = 2, 158 UNW_X86_EBX = 3, 159 UNW_X86_EBP = 4, 160 UNW_X86_ESP = 5, 161 UNW_X86_ESI = 6, 162 UNW_X86_EDI = 7 163 }; 164 165 // 64-bit x86_64 registers 166 enum { 167 UNW_X86_64_RAX = 0, 168 UNW_X86_64_RDX = 1, 169 UNW_X86_64_RCX = 2, 170 UNW_X86_64_RBX = 3, 171 UNW_X86_64_RSI = 4, 172 UNW_X86_64_RDI = 5, 173 UNW_X86_64_RBP = 6, 174 UNW_X86_64_RSP = 7, 175 UNW_X86_64_R8 = 8, 176 UNW_X86_64_R9 = 9, 177 UNW_X86_64_R10 = 10, 178 UNW_X86_64_R11 = 11, 179 UNW_X86_64_R12 = 12, 180 UNW_X86_64_R13 = 13, 181 UNW_X86_64_R14 = 14, 182 UNW_X86_64_R15 = 15 183 }; 184 185 186 // 32-bit ppc register numbers 187 enum { 188 UNW_PPC_R0 = 0, 189 UNW_PPC_R1 = 1, 190 UNW_PPC_R2 = 2, 191 UNW_PPC_R3 = 3, 192 UNW_PPC_R4 = 4, 193 UNW_PPC_R5 = 5, 194 UNW_PPC_R6 = 6, 195 UNW_PPC_R7 = 7, 196 UNW_PPC_R8 = 8, 197 UNW_PPC_R9 = 9, 198 UNW_PPC_R10 = 10, 199 UNW_PPC_R11 = 11, 200 UNW_PPC_R12 = 12, 201 UNW_PPC_R13 = 13, 202 UNW_PPC_R14 = 14, 203 UNW_PPC_R15 = 15, 204 UNW_PPC_R16 = 16, 205 UNW_PPC_R17 = 17, 206 UNW_PPC_R18 = 18, 207 UNW_PPC_R19 = 19, 208 UNW_PPC_R20 = 20, 209 UNW_PPC_R21 = 21, 210 UNW_PPC_R22 = 22, 211 UNW_PPC_R23 = 23, 212 UNW_PPC_R24 = 24, 213 UNW_PPC_R25 = 25, 214 UNW_PPC_R26 = 26, 215 UNW_PPC_R27 = 27, 216 UNW_PPC_R28 = 28, 217 UNW_PPC_R29 = 29, 218 UNW_PPC_R30 = 30, 219 UNW_PPC_R31 = 31, 220 UNW_PPC_F0 = 32, 221 UNW_PPC_F1 = 33, 222 UNW_PPC_F2 = 34, 223 UNW_PPC_F3 = 35, 224 UNW_PPC_F4 = 36, 225 UNW_PPC_F5 = 37, 226 UNW_PPC_F6 = 38, 227 UNW_PPC_F7 = 39, 228 UNW_PPC_F8 = 40, 229 UNW_PPC_F9 = 41, 230 UNW_PPC_F10 = 42, 231 UNW_PPC_F11 = 43, 232 UNW_PPC_F12 = 44, 233 UNW_PPC_F13 = 45, 234 UNW_PPC_F14 = 46, 235 UNW_PPC_F15 = 47, 236 UNW_PPC_F16 = 48, 237 UNW_PPC_F17 = 49, 238 UNW_PPC_F18 = 50, 239 UNW_PPC_F19 = 51, 240 UNW_PPC_F20 = 52, 241 UNW_PPC_F21 = 53, 242 UNW_PPC_F22 = 54, 243 UNW_PPC_F23 = 55, 244 UNW_PPC_F24 = 56, 245 UNW_PPC_F25 = 57, 246 UNW_PPC_F26 = 58, 247 UNW_PPC_F27 = 59, 248 UNW_PPC_F28 = 60, 249 UNW_PPC_F29 = 61, 250 UNW_PPC_F30 = 62, 251 UNW_PPC_F31 = 63, 252 UNW_PPC_MQ = 64, 253 UNW_PPC_LR = 65, 254 UNW_PPC_CTR = 66, 255 UNW_PPC_AP = 67, 256 UNW_PPC_CR0 = 68, 257 UNW_PPC_CR1 = 69, 258 UNW_PPC_CR2 = 70, 259 UNW_PPC_CR3 = 71, 260 UNW_PPC_CR4 = 72, 261 UNW_PPC_CR5 = 73, 262 UNW_PPC_CR6 = 74, 263 UNW_PPC_CR7 = 75, 264 UNW_PPC_XER = 76, 265 UNW_PPC_V0 = 77, 266 UNW_PPC_V1 = 78, 267 UNW_PPC_V2 = 79, 268 UNW_PPC_V3 = 80, 269 UNW_PPC_V4 = 81, 270 UNW_PPC_V5 = 82, 271 UNW_PPC_V6 = 83, 272 UNW_PPC_V7 = 84, 273 UNW_PPC_V8 = 85, 274 UNW_PPC_V9 = 86, 275 UNW_PPC_V10 = 87, 276 UNW_PPC_V11 = 88, 277 UNW_PPC_V12 = 89, 278 UNW_PPC_V13 = 90, 279 UNW_PPC_V14 = 91, 280 UNW_PPC_V15 = 92, 281 UNW_PPC_V16 = 93, 282 UNW_PPC_V17 = 94, 283 UNW_PPC_V18 = 95, 284 UNW_PPC_V19 = 96, 285 UNW_PPC_V20 = 97, 286 UNW_PPC_V21 = 98, 287 UNW_PPC_V22 = 99, 288 UNW_PPC_V23 = 100, 289 UNW_PPC_V24 = 101, 290 UNW_PPC_V25 = 102, 291 UNW_PPC_V26 = 103, 292 UNW_PPC_V27 = 104, 293 UNW_PPC_V28 = 105, 294 UNW_PPC_V29 = 106, 295 UNW_PPC_V30 = 107, 296 UNW_PPC_V31 = 108, 297 UNW_PPC_VRSAVE = 109, 298 UNW_PPC_VSCR = 110, 299 UNW_PPC_SPE_ACC = 111, 300 UNW_PPC_SPEFSCR = 112 301 }; 302 303 // 64-bit ARM64 registers 304 enum { 305 UNW_ARM64_X0 = 0, 306 UNW_ARM64_X1 = 1, 307 UNW_ARM64_X2 = 2, 308 UNW_ARM64_X3 = 3, 309 UNW_ARM64_X4 = 4, 310 UNW_ARM64_X5 = 5, 311 UNW_ARM64_X6 = 6, 312 UNW_ARM64_X7 = 7, 313 UNW_ARM64_X8 = 8, 314 UNW_ARM64_X9 = 9, 315 UNW_ARM64_X10 = 10, 316 UNW_ARM64_X11 = 11, 317 UNW_ARM64_X12 = 12, 318 UNW_ARM64_X13 = 13, 319 UNW_ARM64_X14 = 14, 320 UNW_ARM64_X15 = 15, 321 UNW_ARM64_X16 = 16, 322 UNW_ARM64_X17 = 17, 323 UNW_ARM64_X18 = 18, 324 UNW_ARM64_X19 = 19, 325 UNW_ARM64_X20 = 20, 326 UNW_ARM64_X21 = 21, 327 UNW_ARM64_X22 = 22, 328 UNW_ARM64_X23 = 23, 329 UNW_ARM64_X24 = 24, 330 UNW_ARM64_X25 = 25, 331 UNW_ARM64_X26 = 26, 332 UNW_ARM64_X27 = 27, 333 UNW_ARM64_X28 = 28, 334 UNW_ARM64_X29 = 29, 335 UNW_ARM64_FP = 29, 336 UNW_ARM64_X30 = 30, 337 UNW_ARM64_LR = 30, 338 UNW_ARM64_X31 = 31, 339 UNW_ARM64_SP = 31, 340 // reserved block 341 UNW_ARM64_D0 = 64, 342 UNW_ARM64_D1 = 65, 343 UNW_ARM64_D2 = 66, 344 UNW_ARM64_D3 = 67, 345 UNW_ARM64_D4 = 68, 346 UNW_ARM64_D5 = 69, 347 UNW_ARM64_D6 = 70, 348 UNW_ARM64_D7 = 71, 349 UNW_ARM64_D8 = 72, 350 UNW_ARM64_D9 = 73, 351 UNW_ARM64_D10 = 74, 352 UNW_ARM64_D11 = 75, 353 UNW_ARM64_D12 = 76, 354 UNW_ARM64_D13 = 77, 355 UNW_ARM64_D14 = 78, 356 UNW_ARM64_D15 = 79, 357 UNW_ARM64_D16 = 80, 358 UNW_ARM64_D17 = 81, 359 UNW_ARM64_D18 = 82, 360 UNW_ARM64_D19 = 83, 361 UNW_ARM64_D20 = 84, 362 UNW_ARM64_D21 = 85, 363 UNW_ARM64_D22 = 86, 364 UNW_ARM64_D23 = 87, 365 UNW_ARM64_D24 = 88, 366 UNW_ARM64_D25 = 89, 367 UNW_ARM64_D26 = 90, 368 UNW_ARM64_D27 = 91, 369 UNW_ARM64_D28 = 92, 370 UNW_ARM64_D29 = 93, 371 UNW_ARM64_D30 = 94, 372 UNW_ARM64_D31 = 95, 373 }; 374 375 // 32-bit ARM registers. Numbers match DWARF for ARM spec #3.1 Table 1. 376 // Naming scheme uses recommendations given in Note 4 for VFP-v2 and VFP-v3. 377 // In this scheme, even though the 64-bit floating point registers D0-D31 378 // overlap physically with the 32-bit floating pointer registers S0-S31, 379 // they are given a non-overlapping range of register numbers. 380 // 381 // Commented out ranges are not preserved during unwinding. 382 enum { 383 UNW_ARM_R0 = 0, 384 UNW_ARM_R1 = 1, 385 UNW_ARM_R2 = 2, 386 UNW_ARM_R3 = 3, 387 UNW_ARM_R4 = 4, 388 UNW_ARM_R5 = 5, 389 UNW_ARM_R6 = 6, 390 UNW_ARM_R7 = 7, 391 UNW_ARM_R8 = 8, 392 UNW_ARM_R9 = 9, 393 UNW_ARM_R10 = 10, 394 UNW_ARM_R11 = 11, 395 UNW_ARM_R12 = 12, 396 UNW_ARM_SP = 13, // Logical alias for UNW_REG_SP 397 UNW_ARM_R13 = 13, 398 UNW_ARM_LR = 14, 399 UNW_ARM_R14 = 14, 400 UNW_ARM_IP = 15, // Logical alias for UNW_REG_IP 401 UNW_ARM_R15 = 15, 402 // 16-63 -- OBSOLETE. Used in VFP1 to represent both S0-S31 and D0-D31. 403 UNW_ARM_S0 = 64, 404 UNW_ARM_S1 = 65, 405 UNW_ARM_S2 = 66, 406 UNW_ARM_S3 = 67, 407 UNW_ARM_S4 = 68, 408 UNW_ARM_S5 = 69, 409 UNW_ARM_S6 = 70, 410 UNW_ARM_S7 = 71, 411 UNW_ARM_S8 = 72, 412 UNW_ARM_S9 = 73, 413 UNW_ARM_S10 = 74, 414 UNW_ARM_S11 = 75, 415 UNW_ARM_S12 = 76, 416 UNW_ARM_S13 = 77, 417 UNW_ARM_S14 = 78, 418 UNW_ARM_S15 = 79, 419 UNW_ARM_S16 = 80, 420 UNW_ARM_S17 = 81, 421 UNW_ARM_S18 = 82, 422 UNW_ARM_S19 = 83, 423 UNW_ARM_S20 = 84, 424 UNW_ARM_S21 = 85, 425 UNW_ARM_S22 = 86, 426 UNW_ARM_S23 = 87, 427 UNW_ARM_S24 = 88, 428 UNW_ARM_S25 = 89, 429 UNW_ARM_S26 = 90, 430 UNW_ARM_S27 = 91, 431 UNW_ARM_S28 = 92, 432 UNW_ARM_S29 = 93, 433 UNW_ARM_S30 = 94, 434 UNW_ARM_S31 = 95, 435 // 96-103 -- OBSOLETE. F0-F7. Used by the FPA system. Superseded by VFP. 436 // 104-111 -- wCGR0-wCGR7, ACC0-ACC7 (Intel wireless MMX) 437 UNW_ARM_WR0 = 112, 438 UNW_ARM_WR1 = 113, 439 UNW_ARM_WR2 = 114, 440 UNW_ARM_WR3 = 115, 441 UNW_ARM_WR4 = 116, 442 UNW_ARM_WR5 = 117, 443 UNW_ARM_WR6 = 118, 444 UNW_ARM_WR7 = 119, 445 UNW_ARM_WR8 = 120, 446 UNW_ARM_WR9 = 121, 447 UNW_ARM_WR10 = 122, 448 UNW_ARM_WR11 = 123, 449 UNW_ARM_WR12 = 124, 450 UNW_ARM_WR13 = 125, 451 UNW_ARM_WR14 = 126, 452 UNW_ARM_WR15 = 127, 453 // 128-133 -- SPSR, SPSR_{FIQ|IRQ|ABT|UND|SVC} 454 // 134-143 -- Reserved 455 // 144-150 -- R8_USRR14_USR 456 // 151-157 -- R8_FIQR14_FIQ 457 // 158-159 -- R13_IRQR14_IRQ 458 // 160-161 -- R13_ABTR14_ABT 459 // 162-163 -- R13_UNDR14_UND 460 // 164-165 -- R13_SVCR14_SVC 461 // 166-191 -- Reserved 462 UNW_ARM_WC0 = 192, 463 UNW_ARM_WC1 = 193, 464 UNW_ARM_WC2 = 194, 465 UNW_ARM_WC3 = 195, 466 // 196-199 -- wC4-wC7 (Intel wireless MMX control) 467 // 200-255 -- Reserved 468 UNW_ARM_D0 = 256, 469 UNW_ARM_D1 = 257, 470 UNW_ARM_D2 = 258, 471 UNW_ARM_D3 = 259, 472 UNW_ARM_D4 = 260, 473 UNW_ARM_D5 = 261, 474 UNW_ARM_D6 = 262, 475 UNW_ARM_D7 = 263, 476 UNW_ARM_D8 = 264, 477 UNW_ARM_D9 = 265, 478 UNW_ARM_D10 = 266, 479 UNW_ARM_D11 = 267, 480 UNW_ARM_D12 = 268, 481 UNW_ARM_D13 = 269, 482 UNW_ARM_D14 = 270, 483 UNW_ARM_D15 = 271, 484 UNW_ARM_D16 = 272, 485 UNW_ARM_D17 = 273, 486 UNW_ARM_D18 = 274, 487 UNW_ARM_D19 = 275, 488 UNW_ARM_D20 = 276, 489 UNW_ARM_D21 = 277, 490 UNW_ARM_D22 = 278, 491 UNW_ARM_D23 = 279, 492 UNW_ARM_D24 = 280, 493 UNW_ARM_D25 = 281, 494 UNW_ARM_D26 = 282, 495 UNW_ARM_D27 = 283, 496 UNW_ARM_D28 = 284, 497 UNW_ARM_D29 = 285, 498 UNW_ARM_D30 = 286, 499 UNW_ARM_D31 = 287, 500 // 288-319 -- Reserved for VFP/Neon 501 // 320-8191 -- Reserved 502 // 8192-16383 -- Unspecified vendor co-processor register. 503 }; 504 505 #endif 506
