1 set(LLVM_TARGET_DEFINITIONS AArch64.td) 2 3 tablegen(LLVM AArch64GenRegisterInfo.inc -gen-register-info) 4 tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info) 5 tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter -mc-emitter) 6 tablegen(LLVM AArch64GenMCPseudoLowering.inc -gen-pseudo-lowering) 7 tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer) 8 tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1) 9 tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher) 10 tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel) 11 tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel) 12 tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv) 13 tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget) 14 tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler) 15 add_public_tablegen_target(AArch64CommonTableGen) 16 17 add_llvm_target(AArch64CodeGen 18 AArch64A57FPLoadBalancing.cpp 19 AArch64AddressTypePromotion.cpp 20 AArch64AdvSIMDScalarPass.cpp 21 AArch64AsmPrinter.cpp 22 AArch64BranchRelaxation.cpp 23 AArch64CleanupLocalDynamicTLSPass.cpp 24 AArch64CollectLOH.cpp 25 AArch64ConditionalCompares.cpp 26 AArch64DeadRegisterDefinitionsPass.cpp 27 AArch64ExpandPseudoInsts.cpp 28 AArch64FastISel.cpp 29 AArch64A53Fix835769.cpp 30 AArch64FrameLowering.cpp 31 AArch64ISelDAGToDAG.cpp 32 AArch64ISelLowering.cpp 33 AArch64InstrInfo.cpp 34 AArch64LoadStoreOptimizer.cpp 35 AArch64MCInstLower.cpp 36 AArch64PromoteConstant.cpp 37 AArch64RegisterInfo.cpp 38 AArch64SelectionDAGInfo.cpp 39 AArch64StorePairSuppress.cpp 40 AArch64Subtarget.cpp 41 AArch64TargetMachine.cpp 42 AArch64TargetObjectFile.cpp 43 AArch64TargetTransformInfo.cpp 44 ) 45 46 add_dependencies(LLVMAArch64CodeGen intrinsics_gen) 47 48 add_subdirectory(TargetInfo) 49 add_subdirectory(AsmParser) 50 add_subdirectory(Disassembler) 51 add_subdirectory(InstPrinter) 52 add_subdirectory(MCTargetDesc) 53 add_subdirectory(Utils) 54