1 //===-- SparcJITInfo.cpp - Implement the Sparc JIT Interface --------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the JIT interfaces for the Sparc target. 11 // 12 //===----------------------------------------------------------------------===// 13 #include "SparcJITInfo.h" 14 #include "Sparc.h" 15 #include "SparcRelocations.h" 16 #include "llvm/ADT/SmallVector.h" 17 #include "llvm/CodeGen/JITCodeEmitter.h" 18 #include "llvm/Support/Memory.h" 19 20 using namespace llvm; 21 22 #define DEBUG_TYPE "jit" 23 24 /// JITCompilerFunction - This contains the address of the JIT function used to 25 /// compile a function lazily. 26 static TargetJITInfo::JITCompilerFn JITCompilerFunction; 27 28 extern "C" void SparcCompilationCallback(); 29 30 extern "C" { 31 #if defined (__sparc__) 32 33 #if defined(__arch64__) 34 #define FRAME_PTR(X) #X "+2047" 35 #else 36 #define FRAME_PTR(X) #X 37 #endif 38 39 asm( 40 ".text\n" 41 "\t.align 4\n" 42 "\t.global SparcCompilationCallback\n" 43 "\t.type SparcCompilationCallback, #function\n" 44 "SparcCompilationCallback:\n" 45 // Save current register window and create stack. 46 // 128 (save area) + 6*8 (for arguments) + 16*8 (for float regfile) = 304 47 "\tsave %sp, -304, %sp\n" 48 // save float regfile to the stack. 49 "\tstd %f0, [" FRAME_PTR(%fp) "-0]\n" 50 "\tstd %f2, [" FRAME_PTR(%fp) "-8]\n" 51 "\tstd %f4, [" FRAME_PTR(%fp) "-16]\n" 52 "\tstd %f6, [" FRAME_PTR(%fp) "-24]\n" 53 "\tstd %f8, [" FRAME_PTR(%fp) "-32]\n" 54 "\tstd %f10, [" FRAME_PTR(%fp) "-40]\n" 55 "\tstd %f12, [" FRAME_PTR(%fp) "-48]\n" 56 "\tstd %f14, [" FRAME_PTR(%fp) "-56]\n" 57 "\tstd %f16, [" FRAME_PTR(%fp) "-64]\n" 58 "\tstd %f18, [" FRAME_PTR(%fp) "-72]\n" 59 "\tstd %f20, [" FRAME_PTR(%fp) "-80]\n" 60 "\tstd %f22, [" FRAME_PTR(%fp) "-88]\n" 61 "\tstd %f24, [" FRAME_PTR(%fp) "-96]\n" 62 "\tstd %f26, [" FRAME_PTR(%fp) "-104]\n" 63 "\tstd %f28, [" FRAME_PTR(%fp) "-112]\n" 64 "\tstd %f30, [" FRAME_PTR(%fp) "-120]\n" 65 // stubaddr is in %g1. 66 "\tcall SparcCompilationCallbackC\n" 67 "\t mov %g1, %o0\n" 68 // restore float regfile from the stack. 69 "\tldd [" FRAME_PTR(%fp) "-0], %f0\n" 70 "\tldd [" FRAME_PTR(%fp) "-8], %f2\n" 71 "\tldd [" FRAME_PTR(%fp) "-16], %f4\n" 72 "\tldd [" FRAME_PTR(%fp) "-24], %f6\n" 73 "\tldd [" FRAME_PTR(%fp) "-32], %f8\n" 74 "\tldd [" FRAME_PTR(%fp) "-40], %f10\n" 75 "\tldd [" FRAME_PTR(%fp) "-48], %f12\n" 76 "\tldd [" FRAME_PTR(%fp) "-56], %f14\n" 77 "\tldd [" FRAME_PTR(%fp) "-64], %f16\n" 78 "\tldd [" FRAME_PTR(%fp) "-72], %f18\n" 79 "\tldd [" FRAME_PTR(%fp) "-80], %f20\n" 80 "\tldd [" FRAME_PTR(%fp) "-88], %f22\n" 81 "\tldd [" FRAME_PTR(%fp) "-96], %f24\n" 82 "\tldd [" FRAME_PTR(%fp) "-104], %f26\n" 83 "\tldd [" FRAME_PTR(%fp) "-112], %f28\n" 84 "\tldd [" FRAME_PTR(%fp) "-120], %f30\n" 85 // restore original register window and 86 // copy %o0 to %g1 87 "\trestore %o0, 0, %g1\n" 88 // call the new stub 89 "\tjmp %g1\n" 90 "\t nop\n" 91 "\t.size SparcCompilationCallback, .-SparcCompilationCallback" 92 ); 93 #else 94 void SparcCompilationCallback() { 95 llvm_unreachable( 96 "Cannot call SparcCompilationCallback() on a non-sparc arch!"); 97 } 98 #endif 99 } 100 101 102 #define SETHI_INST(imm, rd) (0x01000000 | ((rd) << 25) | ((imm) & 0x3FFFFF)) 103 #define JMP_INST(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x38 << 19) \ 104 | ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF)) 105 #define NOP_INST SETHI_INST(0, 0) 106 #define OR_INST_I(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x02 << 19) \ 107 | ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF)) 108 #define OR_INST_R(rs1, rs2, rd) (0x80000000 | ((rd) << 25) | (0x02 << 19) \ 109 | ((rs1) << 14) | (0 << 13) | ((rs2) & 0x1F)) 110 #define RDPC_INST(rd) (0x80000000 | ((rd) << 25) | (0x28 << 19) \ 111 | (5 << 14)) 112 #define LDX_INST(rs1, imm, rd) (0xC0000000 | ((rd) << 25) | (0x0B << 19) \ 113 | ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF)) 114 #define SLLX_INST(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x25 << 19) \ 115 | ((rs1) << 14) | (3 << 12) | ((imm) & 0x3F)) 116 #define SUB_INST(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x04 << 19) \ 117 | ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF)) 118 #define XOR_INST(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x03 << 19) \ 119 | ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF)) 120 #define BA_INST(tgt) (0x10800000 | ((tgt) & 0x3FFFFF)) 121 122 // Emit instructions to jump to Addr and store the starting address of 123 // the instructions emitted in the scratch register. 124 static void emitInstrForIndirectJump(intptr_t Addr, 125 unsigned scratch, 126 SmallVectorImpl<uint32_t> &Insts) { 127 128 if (isInt<13>(Addr)) { 129 // Emit: jmpl %g0+Addr, <scratch> 130 // nop 131 Insts.push_back(JMP_INST(0, LO10(Addr), scratch)); 132 Insts.push_back(NOP_INST); 133 return; 134 } 135 136 if (isUInt<32>(Addr)) { 137 // Emit: sethi %hi(Addr), scratch 138 // jmpl scratch+%lo(Addr), scratch 139 // sub scratch, 4, scratch 140 Insts.push_back(SETHI_INST(HI22(Addr), scratch)); 141 Insts.push_back(JMP_INST(scratch, LO10(Addr), scratch)); 142 Insts.push_back(SUB_INST(scratch, 4, scratch)); 143 return; 144 } 145 146 if (Addr < 0 && isInt<33>(Addr)) { 147 // Emit: sethi %hix(Addr), scratch) 148 // xor scratch, %lox(Addr), scratch 149 // jmpl scratch+0, scratch 150 // sub scratch, 8, scratch 151 Insts.push_back(SETHI_INST(HIX22(Addr), scratch)); 152 Insts.push_back(XOR_INST(scratch, LOX10(Addr), scratch)); 153 Insts.push_back(JMP_INST(scratch, 0, scratch)); 154 Insts.push_back(SUB_INST(scratch, 8, scratch)); 155 return; 156 } 157 158 // Emit: rd %pc, scratch 159 // ldx [scratch+16], scratch 160 // jmpl scratch+0, scratch 161 // sub scratch, 8, scratch 162 // <Addr: 8 byte> 163 Insts.push_back(RDPC_INST(scratch)); 164 Insts.push_back(LDX_INST(scratch, 16, scratch)); 165 Insts.push_back(JMP_INST(scratch, 0, scratch)); 166 Insts.push_back(SUB_INST(scratch, 8, scratch)); 167 Insts.push_back((uint32_t)(((int64_t)Addr) >> 32) & 0xffffffff); 168 Insts.push_back((uint32_t)(Addr & 0xffffffff)); 169 170 // Instruction sequence without rdpc instruction 171 // 7 instruction and 2 scratch register 172 // Emit: sethi %hh(Addr), scratch 173 // or scratch, %hm(Addr), scratch 174 // sllx scratch, 32, scratch 175 // sethi %hi(Addr), scratch2 176 // or scratch, scratch2, scratch 177 // jmpl scratch+%lo(Addr), scratch 178 // sub scratch, 20, scratch 179 // Insts.push_back(SETHI_INST(HH22(Addr), scratch)); 180 // Insts.push_back(OR_INST_I(scratch, HM10(Addr), scratch)); 181 // Insts.push_back(SLLX_INST(scratch, 32, scratch)); 182 // Insts.push_back(SETHI_INST(HI22(Addr), scratch2)); 183 // Insts.push_back(OR_INST_R(scratch, scratch2, scratch)); 184 // Insts.push_back(JMP_INST(scratch, LO10(Addr), scratch)); 185 // Insts.push_back(SUB_INST(scratch, 20, scratch)); 186 } 187 188 extern "C" void *SparcCompilationCallbackC(intptr_t StubAddr) { 189 // Get the address of the compiled code for this function. 190 intptr_t NewVal = (intptr_t) JITCompilerFunction((void*) StubAddr); 191 192 // Rewrite the function stub so that we don't end up here every time we 193 // execute the call. We're replacing the stub instructions with code 194 // that jumps to the compiled function: 195 196 SmallVector<uint32_t, 8> Insts; 197 intptr_t diff = (NewVal - StubAddr) >> 2; 198 if (isInt<22>(diff)) { 199 // Use branch instruction to jump 200 Insts.push_back(BA_INST(diff)); 201 Insts.push_back(NOP_INST); 202 } else { 203 // Otherwise, use indirect jump to the compiled function 204 emitInstrForIndirectJump(NewVal, 1, Insts); 205 } 206 207 for (unsigned i = 0, e = Insts.size(); i != e; ++i) 208 *(uint32_t *)(StubAddr + i*4) = Insts[i]; 209 210 sys::Memory::InvalidateInstructionCache((void*) StubAddr, Insts.size() * 4); 211 return (void*)StubAddr; 212 } 213 214 215 void SparcJITInfo::replaceMachineCodeForFunction(void *Old, void *New) { 216 llvm_unreachable("FIXME: Implement SparcJITInfo::" 217 "replaceMachineCodeForFunction"); 218 } 219 220 221 TargetJITInfo::StubLayout SparcJITInfo::getStubLayout() { 222 // The stub contains maximum of 4 4-byte instructions and 8 bytes for address, 223 // aligned at 32 bytes. 224 // See emitFunctionStub and emitInstrForIndirectJump for details. 225 StubLayout Result = { 4*4 + 8, 32 }; 226 return Result; 227 } 228 229 void *SparcJITInfo::emitFunctionStub(const Function *F, void *Fn, 230 JITCodeEmitter &JCE) 231 { 232 JCE.emitAlignment(32); 233 void *Addr = (void*) (JCE.getCurrentPCValue()); 234 235 intptr_t CurrentAddr = (intptr_t)Addr; 236 intptr_t EmittedAddr; 237 SmallVector<uint32_t, 8> Insts; 238 if (Fn != (void*)(intptr_t)SparcCompilationCallback) { 239 EmittedAddr = (intptr_t)Fn; 240 intptr_t diff = (EmittedAddr - CurrentAddr) >> 2; 241 if (isInt<22>(diff)) { 242 Insts.push_back(BA_INST(diff)); 243 Insts.push_back(NOP_INST); 244 } 245 } else { 246 EmittedAddr = (intptr_t)SparcCompilationCallback; 247 } 248 249 if (Insts.size() == 0) 250 emitInstrForIndirectJump(EmittedAddr, 1, Insts); 251 252 253 if (!sys::Memory::setRangeWritable(Addr, 4 * Insts.size())) 254 llvm_unreachable("ERROR: Unable to mark stub writable."); 255 256 for (unsigned i = 0, e = Insts.size(); i != e; ++i) 257 JCE.emitWordBE(Insts[i]); 258 259 sys::Memory::InvalidateInstructionCache(Addr, 4 * Insts.size()); 260 if (!sys::Memory::setRangeExecutable(Addr, 4 * Insts.size())) 261 llvm_unreachable("ERROR: Unable to mark stub executable."); 262 263 return Addr; 264 } 265 266 267 TargetJITInfo::LazyResolverFn 268 SparcJITInfo::getLazyResolverFunction(JITCompilerFn F) { 269 JITCompilerFunction = F; 270 return SparcCompilationCallback; 271 } 272 273 /// relocate - Before the JIT can run a block of code that has been emitted, 274 /// it must rewrite the code to contain the actual addresses of any 275 /// referenced global symbols. 276 void SparcJITInfo::relocate(void *Function, MachineRelocation *MR, 277 unsigned NumRelocs, unsigned char *GOTBase) { 278 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) { 279 void *RelocPos = (char*) Function + MR->getMachineCodeOffset(); 280 intptr_t ResultPtr = (intptr_t) MR->getResultPointer(); 281 282 switch ((SP::RelocationType) MR->getRelocationType()) { 283 case SP::reloc_sparc_hi: 284 ResultPtr = (ResultPtr >> 10) & 0x3fffff; 285 break; 286 287 case SP::reloc_sparc_lo: 288 ResultPtr = (ResultPtr & 0x3ff); 289 break; 290 291 case SP::reloc_sparc_pc30: 292 ResultPtr = ((ResultPtr - (intptr_t)RelocPos) >> 2) & 0x3fffffff; 293 break; 294 295 case SP::reloc_sparc_pc22: 296 ResultPtr = ((ResultPtr - (intptr_t)RelocPos) >> 2) & 0x3fffff; 297 break; 298 299 case SP::reloc_sparc_pc19: 300 ResultPtr = ((ResultPtr - (intptr_t)RelocPos) >> 2) & 0x7ffff; 301 break; 302 303 case SP::reloc_sparc_h44: 304 ResultPtr = (ResultPtr >> 22) & 0x3fffff; 305 break; 306 307 case SP::reloc_sparc_m44: 308 ResultPtr = (ResultPtr >> 12) & 0x3ff; 309 break; 310 311 case SP::reloc_sparc_l44: 312 ResultPtr = (ResultPtr & 0xfff); 313 break; 314 315 case SP::reloc_sparc_hh: 316 ResultPtr = (((int64_t)ResultPtr) >> 42) & 0x3fffff; 317 break; 318 319 case SP::reloc_sparc_hm: 320 ResultPtr = (((int64_t)ResultPtr) >> 32) & 0x3ff; 321 break; 322 323 } 324 *((unsigned*) RelocPos) |= (unsigned) ResultPtr; 325 } 326 } 327
