1 //===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the Sparc specific subclass of TargetMachine. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef SPARCTARGETMACHINE_H 15 #define SPARCTARGETMACHINE_H 16 17 #include "SparcInstrInfo.h" 18 #include "SparcSubtarget.h" 19 #include "llvm/Target/TargetMachine.h" 20 21 namespace llvm { 22 23 class SparcTargetMachine : public LLVMTargetMachine { 24 SparcSubtarget Subtarget; 25 public: 26 SparcTargetMachine(const Target &T, StringRef TT, 27 StringRef CPU, StringRef FS, const TargetOptions &Options, 28 Reloc::Model RM, CodeModel::Model CM, 29 CodeGenOpt::Level OL, bool is64bit); 30 31 const SparcInstrInfo *getInstrInfo() const override { 32 return getSubtargetImpl()->getInstrInfo(); 33 } 34 const TargetFrameLowering *getFrameLowering() const override { 35 return getSubtargetImpl()->getFrameLowering(); 36 } 37 const SparcSubtarget *getSubtargetImpl() const override { return &Subtarget; } 38 const SparcRegisterInfo *getRegisterInfo() const override { 39 return getSubtargetImpl()->getRegisterInfo(); 40 } 41 const SparcTargetLowering *getTargetLowering() const override { 42 return getSubtargetImpl()->getTargetLowering(); 43 } 44 const SparcSelectionDAGInfo *getSelectionDAGInfo() const override { 45 return getSubtargetImpl()->getSelectionDAGInfo(); 46 } 47 SparcJITInfo *getJITInfo() override { return Subtarget.getJITInfo(); } 48 const DataLayout *getDataLayout() const override { 49 return getSubtargetImpl()->getDataLayout(); 50 } 51 52 // Pass Pipeline Configuration 53 TargetPassConfig *createPassConfig(PassManagerBase &PM) override; 54 bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override; 55 }; 56 57 /// SparcV8TargetMachine - Sparc 32-bit target machine 58 /// 59 class SparcV8TargetMachine : public SparcTargetMachine { 60 virtual void anchor(); 61 public: 62 SparcV8TargetMachine(const Target &T, StringRef TT, 63 StringRef CPU, StringRef FS, 64 const TargetOptions &Options, 65 Reloc::Model RM, CodeModel::Model CM, 66 CodeGenOpt::Level OL); 67 }; 68 69 /// SparcV9TargetMachine - Sparc 64-bit target machine 70 /// 71 class SparcV9TargetMachine : public SparcTargetMachine { 72 virtual void anchor(); 73 public: 74 SparcV9TargetMachine(const Target &T, StringRef TT, 75 StringRef CPU, StringRef FS, 76 const TargetOptions &Options, 77 Reloc::Model RM, CodeModel::Model CM, 78 CodeGenOpt::Level OL); 79 }; 80 81 } // end namespace llvm 82 83 #endif 84
