1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s 2 ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s 3 4 define void @trunc_i64_to_i32_store(i32 addrspace(1)* %out, i64 %in) { 5 ; SI-LABEL: @trunc_i64_to_i32_store 6 ; SI: S_LOAD_DWORD s0, s[0:1], 0xb 7 ; SI: V_MOV_B32_e32 v0, s0 8 ; SI: BUFFER_STORE_DWORD v0 9 10 ; EG-LABEL: @trunc_i64_to_i32_store 11 ; EG: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1 12 ; EG: LSHR 13 ; EG-NEXT: 2( 14 15 %result = trunc i64 %in to i32 store i32 %result, i32 addrspace(1)* %out, align 4 16 ret void 17 } 18 19 ; SI-LABEL: @trunc_load_shl_i64: 20 ; SI-DAG: S_LOAD_DWORDX2 21 ; SI-DAG: S_LOAD_DWORD [[SREG:s[0-9]+]], 22 ; SI: S_LSHL_B32 [[SHL:s[0-9]+]], [[SREG]], 2 23 ; SI: V_MOV_B32_e32 [[VSHL:v[0-9]+]], [[SHL]] 24 ; SI: BUFFER_STORE_DWORD [[VSHL]], 25 define void @trunc_load_shl_i64(i32 addrspace(1)* %out, i64 %a) { 26 %b = shl i64 %a, 2 27 %result = trunc i64 %b to i32 28 store i32 %result, i32 addrspace(1)* %out, align 4 29 ret void 30 } 31 32 ; SI-LABEL: @trunc_shl_i64: 33 ; SI: S_LOAD_DWORDX2 s{{\[}}[[LO_SREG:[0-9]+]]:{{[0-9]+\]}}, 34 ; SI: S_ADD_I32 s[[LO_ADD:[0-9]+]], s[[LO_SREG]], 35 ; SI: S_LSHL_B64 s{{\[}}[[LO_SREG2:[0-9]+]]:{{[0-9]+\]}}, s{{\[}}[[LO_ADD]]:{{[0-9]+\]}}, 2 36 ; SI: V_MOV_B32_e32 v[[LO_VREG:[0-9]+]], s[[LO_SREG2]] 37 ; SI: BUFFER_STORE_DWORD v[[LO_VREG]], 38 define void @trunc_shl_i64(i64 addrspace(1)* %out2, i32 addrspace(1)* %out, i64 %a) { 39 %aa = add i64 %a, 234 ; Prevent shrinking store. 40 %b = shl i64 %aa, 2 41 %result = trunc i64 %b to i32 42 store i32 %result, i32 addrspace(1)* %out, align 4 43 store i64 %b, i64 addrspace(1)* %out2, align 8 ; Prevent reducing ops to 32-bits 44 ret void 45 } 46 47 ; SI-LABEL: @trunc_i32_to_i1: 48 ; SI: V_AND_B32 49 ; SI: V_CMP_EQ_I32 50 define void @trunc_i32_to_i1(i32 addrspace(1)* %out, i32 %a) { 51 %trunc = trunc i32 %a to i1 52 %result = select i1 %trunc, i32 1, i32 0 53 store i32 %result, i32 addrspace(1)* %out, align 4 54 ret void 55 } 56
