1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s 2 ;RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s 3 4 ;EG-CHECK: @test_select_v2i32 5 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 6 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 7 8 ;SI-CHECK: @test_select_v2i32 9 ;SI-CHECK: V_CNDMASK_B32_e64 10 ;SI-CHECK: V_CNDMASK_B32_e64 11 12 define void @test_select_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in0, <2 x i32> addrspace(1)* %in1) { 13 entry: 14 %0 = load <2 x i32> addrspace(1)* %in0 15 %1 = load <2 x i32> addrspace(1)* %in1 16 %cmp = icmp ne <2 x i32> %0, %1 17 %result = select <2 x i1> %cmp, <2 x i32> %0, <2 x i32> %1 18 store <2 x i32> %result, <2 x i32> addrspace(1)* %out 19 ret void 20 } 21 22 ;EG-CHECK: @test_select_v2f32 23 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 24 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 25 26 ;SI-CHECK: @test_select_v2f32 27 ;SI-CHECK: V_CNDMASK_B32_e64 28 ;SI-CHECK: V_CNDMASK_B32_e64 29 30 define void @test_select_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in0, <2 x float> addrspace(1)* %in1) { 31 entry: 32 %0 = load <2 x float> addrspace(1)* %in0 33 %1 = load <2 x float> addrspace(1)* %in1 34 %cmp = fcmp une <2 x float> %0, %1 35 %result = select <2 x i1> %cmp, <2 x float> %0, <2 x float> %1 36 store <2 x float> %result, <2 x float> addrspace(1)* %out 37 ret void 38 } 39 40 ;EG-CHECK: @test_select_v4i32 41 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 42 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 43 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 44 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 45 46 ;SI-CHECK: @test_select_v4i32 47 ;SI-CHECK: V_CNDMASK_B32_e64 48 ;SI-CHECK: V_CNDMASK_B32_e64 49 ;SI-CHECK: V_CNDMASK_B32_e64 50 ;SI-CHECK: V_CNDMASK_B32_e64 51 52 define void @test_select_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in0, <4 x i32> addrspace(1)* %in1) { 53 entry: 54 %0 = load <4 x i32> addrspace(1)* %in0 55 %1 = load <4 x i32> addrspace(1)* %in1 56 %cmp = icmp ne <4 x i32> %0, %1 57 %result = select <4 x i1> %cmp, <4 x i32> %0, <4 x i32> %1 58 store <4 x i32> %result, <4 x i32> addrspace(1)* %out 59 ret void 60 } 61 62 ;EG-CHECK: @test_select_v4f32 63 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 64 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 65 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 66 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 67 68 define void @test_select_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in0, <4 x float> addrspace(1)* %in1) { 69 entry: 70 %0 = load <4 x float> addrspace(1)* %in0 71 %1 = load <4 x float> addrspace(1)* %in1 72 %cmp = fcmp une <4 x float> %0, %1 73 %result = select <4 x i1> %cmp, <4 x float> %0, <4 x float> %1 74 store <4 x float> %result, <4 x float> addrspace(1)* %out 75 ret void 76 } 77
