1 ; Test explicit register names. 2 ; 3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4 5 ; Test i32 GPRs. 6 define i32 @f1() { 7 ; CHECK-LABEL: f1: 8 ; CHECK: lhi %r4, 1 9 ; CHECK: blah %r4 10 ; CHECK: lr %r2, %r4 11 ; CHECK: br %r14 12 %ret = call i32 asm "blah $0", "={r4},0" (i32 1) 13 ret i32 %ret 14 } 15 16 ; Test i64 GPRs. 17 define i64 @f2() { 18 ; CHECK-LABEL: f2: 19 ; CHECK: lghi %r4, 1 20 ; CHECK: blah %r4 21 ; CHECK: lgr %r2, %r4 22 ; CHECK: br %r14 23 %ret = call i64 asm "blah $0", "={r4},0" (i64 1) 24 ret i64 %ret 25 } 26 27 ; Test i32 FPRs. 28 define float @f3() { 29 ; CHECK-LABEL: f3: 30 ; CHECK: lzer %f4 31 ; CHECK: blah %f4 32 ; CHECK: ler %f0, %f4 33 ; CHECK: br %r14 34 %ret = call float asm "blah $0", "={f4},0" (float 0.0) 35 ret float %ret 36 } 37 38 ; Test i64 FPRs. 39 define double @f4() { 40 ; CHECK-LABEL: f4: 41 ; CHECK: lzdr %f4 42 ; CHECK: blah %f4 43 ; CHECK: ldr %f0, %f4 44 ; CHECK: br %r14 45 %ret = call double asm "blah $0", "={f4},0" (double 0.0) 46 ret double %ret 47 } 48 49 ; Test i128 FPRs. 50 define void @f5(fp128 *%dest) { 51 ; CHECK-LABEL: f5: 52 ; CHECK: lzxr %f4 53 ; CHECK: blah %f4 54 ; CHECK-DAG: std %f4, 0(%r2) 55 ; CHECK-DAG: std %f6, 8(%r2) 56 ; CHECK: br %r14 57 %ret = call fp128 asm "blah $0", "={f4},0" (fp128 0xL00000000000000000000000000000000) 58 store fp128 %ret, fp128 *%dest 59 ret void 60 } 61 62 ; Test clobbers of GPRs and CC. 63 define i32 @f6(i32 %in) { 64 ; CHECK-LABEL: f6: 65 ; CHECK: lr [[REG:%r[01345]]], %r2 66 ; CHECK: blah 67 ; CHECK: lr %r2, [[REG]] 68 ; CHECK: br %r14 69 call void asm sideeffect "blah", "~{r2},~{cc}"() 70 ret i32 %in 71 } 72 73 ; Test clobbers of FPRs and CC. 74 define float @f7(float %in) { 75 ; CHECK-LABEL: f7: 76 ; CHECK: ler [[REG:%f[1-7]]], %f0 77 ; CHECK: blah 78 ; CHECK: ler %f0, [[REG]] 79 ; CHECK: br %r14 80 call void asm sideeffect "blah", "~{f0},~{cc}"() 81 ret float %in 82 } 83 84 ; Test that both registers in a GR128 pair get hoisted. 85 define void @f8(i32 %count) { 86 ; CHECK-LABEL: f8 87 ; CHECK-DAG: lhi %r0, 0 88 ; CHECK-DAG: lhi %r1, 1 89 ; CHECK: %loop 90 ; CHECK-NOT: %r 91 ; CHECK: blah %r0, %r1 92 ; CHECK: br %r14 93 entry: 94 br label %loop 95 96 loop: 97 %this = phi i32 [ %count, %entry ], [ %next, %loop ] 98 call void asm sideeffect "blah $0, $1", "{r0},{r1}" (i32 0, i32 1) 99 %next = sub i32 %this, 1 100 %cmp = icmp ne i32 %next, 0 101 br i1 %cmp, label %loop, label %exit 102 103 exit: 104 ret void 105 } 106
