1 ; Test the handling of base + index + displacement addresses for large frames, 2 ; in cases where both 12-bit and 20-bit displacements are allowed. 3 ; The tests here assume z10 register pressure, without the high words 4 ; being available. 5 ; 6 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | \ 7 ; RUN: FileCheck -check-prefix=CHECK-NOFP %s 8 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 -disable-fp-elim | \ 9 ; RUN: FileCheck -check-prefix=CHECK-FP %s 10 11 ; This file tests what happens when a displacement is converted from 12 ; being relative to the start of a frame object to being relative to 13 ; the frame itself. In some cases the test is only possible if two 14 ; objects are allocated. 15 ; 16 ; Rather than rely on a particular order for those objects, the tests 17 ; instead allocate two objects of the same size and apply the test to 18 ; both of them. For consistency, all tests follow this model, even if 19 ; one object would actually be enough. 20 21 ; First check the highest offset that is in range of the 12-bit form. 22 ; 23 ; The last in-range doubleword offset is 4088. Since the frame has two 24 ; emergency spill slots at 160(%r15), the amount that we need to allocate 25 ; in order to put another object at offset 4088 is 4088 - 176 = 3912 bytes. 26 define void @f1(i8 %byte) { 27 ; CHECK-NOFP-LABEL: f1: 28 ; CHECK-NOFP: stc %r2, 4095(%r15) 29 ; CHECK-NOFP: br %r14 30 ; 31 ; CHECK-FP-LABEL: f1: 32 ; CHECK-FP: stc %r2, 4095(%r11) 33 ; CHECK-FP: br %r14 34 %region1 = alloca [3912 x i8], align 8 35 %region2 = alloca [3912 x i8], align 8 36 %ptr1 = getelementptr inbounds [3912 x i8]* %region1, i64 0, i64 7 37 %ptr2 = getelementptr inbounds [3912 x i8]* %region2, i64 0, i64 7 38 store volatile i8 %byte, i8 *%ptr1 39 store volatile i8 %byte, i8 *%ptr2 40 ret void 41 } 42 43 ; Test the first offset that is out-of-range of the 12-bit form. 44 define void @f2(i8 %byte) { 45 ; CHECK-NOFP-LABEL: f2: 46 ; CHECK-NOFP: stcy %r2, 4096(%r15) 47 ; CHECK-NOFP: br %r14 48 ; 49 ; CHECK-FP-LABEL: f2: 50 ; CHECK-FP: stcy %r2, 4096(%r11) 51 ; CHECK-FP: br %r14 52 %region1 = alloca [3912 x i8], align 8 53 %region2 = alloca [3912 x i8], align 8 54 %ptr1 = getelementptr inbounds [3912 x i8]* %region1, i64 0, i64 8 55 %ptr2 = getelementptr inbounds [3912 x i8]* %region2, i64 0, i64 8 56 store volatile i8 %byte, i8 *%ptr1 57 store volatile i8 %byte, i8 *%ptr2 58 ret void 59 } 60 61 ; Test the last offset that is in range of the 20-bit form. 62 ; 63 ; The last in-range doubleword offset is 524280, so by the same reasoning 64 ; as above, we need to allocate objects of 524280 - 176 = 524104 bytes. 65 define void @f3(i8 %byte) { 66 ; CHECK-NOFP-LABEL: f3: 67 ; CHECK-NOFP: stcy %r2, 524287(%r15) 68 ; CHECK-NOFP: br %r14 69 ; 70 ; CHECK-FP-LABEL: f3: 71 ; CHECK-FP: stcy %r2, 524287(%r11) 72 ; CHECK-FP: br %r14 73 %region1 = alloca [524104 x i8], align 8 74 %region2 = alloca [524104 x i8], align 8 75 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 7 76 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 7 77 store volatile i8 %byte, i8 *%ptr1 78 store volatile i8 %byte, i8 *%ptr2 79 ret void 80 } 81 82 ; Test the first out-of-range offset. We can't use an index register here, 83 ; and the offset is also out of LAY's range, so expect a constant load 84 ; followed by an addition. 85 define void @f4(i8 %byte) { 86 ; CHECK-NOFP-LABEL: f4: 87 ; CHECK-NOFP: llilh %r1, 8 88 ; CHECK-NOFP: stc %r2, 0(%r1,%r15) 89 ; CHECK-NOFP: br %r14 90 ; 91 ; CHECK-FP-LABEL: f4: 92 ; CHECK-FP: llilh %r1, 8 93 ; CHECK-FP: stc %r2, 0(%r1,%r11) 94 ; CHECK-FP: br %r14 95 %region1 = alloca [524104 x i8], align 8 96 %region2 = alloca [524104 x i8], align 8 97 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 8 98 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 8 99 store volatile i8 %byte, i8 *%ptr1 100 store volatile i8 %byte, i8 *%ptr2 101 ret void 102 } 103 104 ; Add 4095 to the previous offset, to test the other end of the STC range. 105 ; The instruction will actually be STCY before frame lowering. 106 define void @f5(i8 %byte) { 107 ; CHECK-NOFP-LABEL: f5: 108 ; CHECK-NOFP: llilh %r1, 8 109 ; CHECK-NOFP: stc %r2, 4095(%r1,%r15) 110 ; CHECK-NOFP: br %r14 111 ; 112 ; CHECK-FP-LABEL: f5: 113 ; CHECK-FP: llilh %r1, 8 114 ; CHECK-FP: stc %r2, 4095(%r1,%r11) 115 ; CHECK-FP: br %r14 116 %region1 = alloca [524104 x i8], align 8 117 %region2 = alloca [524104 x i8], align 8 118 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 4103 119 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 4103 120 store volatile i8 %byte, i8 *%ptr1 121 store volatile i8 %byte, i8 *%ptr2 122 ret void 123 } 124 125 ; Test the next offset after that, which uses STCY instead of STC. 126 define void @f6(i8 %byte) { 127 ; CHECK-NOFP-LABEL: f6: 128 ; CHECK-NOFP: llilh %r1, 8 129 ; CHECK-NOFP: stcy %r2, 4096(%r1,%r15) 130 ; CHECK-NOFP: br %r14 131 ; 132 ; CHECK-FP-LABEL: f6: 133 ; CHECK-FP: llilh %r1, 8 134 ; CHECK-FP: stcy %r2, 4096(%r1,%r11) 135 ; CHECK-FP: br %r14 136 %region1 = alloca [524104 x i8], align 8 137 %region2 = alloca [524104 x i8], align 8 138 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 4104 139 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 4104 140 store volatile i8 %byte, i8 *%ptr1 141 store volatile i8 %byte, i8 *%ptr2 142 ret void 143 } 144 145 ; Now try an offset of 524287 from the start of the object, with the 146 ; object being at offset 1048576 (1 << 20). The backend prefers to create 147 ; anchors 0x10000 bytes apart, so that the high part can be loaded using 148 ; LLILH while still using STC in more cases than 0x40000 anchors would. 149 define void @f7(i8 %byte) { 150 ; CHECK-NOFP-LABEL: f7: 151 ; CHECK-NOFP: llilh %r1, 23 152 ; CHECK-NOFP: stcy %r2, 65535(%r1,%r15) 153 ; CHECK-NOFP: br %r14 154 ; 155 ; CHECK-FP-LABEL: f7: 156 ; CHECK-FP: llilh %r1, 23 157 ; CHECK-FP: stcy %r2, 65535(%r1,%r11) 158 ; CHECK-FP: br %r14 159 %region1 = alloca [1048400 x i8], align 8 160 %region2 = alloca [1048400 x i8], align 8 161 %ptr1 = getelementptr inbounds [1048400 x i8]* %region1, i64 0, i64 524287 162 %ptr2 = getelementptr inbounds [1048400 x i8]* %region2, i64 0, i64 524287 163 store volatile i8 %byte, i8 *%ptr1 164 store volatile i8 %byte, i8 *%ptr2 165 ret void 166 } 167 168 ; Keep the object-relative offset the same but bump the size of the 169 ; objects by one doubleword. 170 define void @f8(i8 %byte) { 171 ; CHECK-NOFP-LABEL: f8: 172 ; CHECK-NOFP: llilh %r1, 24 173 ; CHECK-NOFP: stc %r2, 7(%r1,%r15) 174 ; CHECK-NOFP: br %r14 175 ; 176 ; CHECK-FP-LABEL: f8: 177 ; CHECK-FP: llilh %r1, 24 178 ; CHECK-FP: stc %r2, 7(%r1,%r11) 179 ; CHECK-FP: br %r14 180 %region1 = alloca [1048408 x i8], align 8 181 %region2 = alloca [1048408 x i8], align 8 182 %ptr1 = getelementptr inbounds [1048408 x i8]* %region1, i64 0, i64 524287 183 %ptr2 = getelementptr inbounds [1048408 x i8]* %region2, i64 0, i64 524287 184 store volatile i8 %byte, i8 *%ptr1 185 store volatile i8 %byte, i8 *%ptr2 186 ret void 187 } 188 189 ; Check a case where the original displacement is out of range. The backend 190 ; should force separate address logic from the outset. We don't yet do any 191 ; kind of anchor optimization, so there should be no offset on the STC itself. 192 ; 193 ; Before frame lowering this is an LA followed by the AGFI seen below. 194 ; The LA then gets lowered into the LLILH/LA form. The exact sequence 195 ; isn't that important though. 196 define void @f9(i8 %byte) { 197 ; CHECK-NOFP-LABEL: f9: 198 ; CHECK-NOFP: llilh [[R1:%r[1-5]]], 16 199 ; CHECK-NOFP: la [[R2:%r[1-5]]], 8([[R1]],%r15) 200 ; CHECK-NOFP: agfi [[R2]], 524288 201 ; CHECK-NOFP: stc %r2, 0([[R2]]) 202 ; CHECK-NOFP: br %r14 203 ; 204 ; CHECK-FP-LABEL: f9: 205 ; CHECK-FP: llilh [[R1:%r[1-5]]], 16 206 ; CHECK-FP: la [[R2:%r[1-5]]], 8([[R1]],%r11) 207 ; CHECK-FP: agfi [[R2]], 524288 208 ; CHECK-FP: stc %r2, 0([[R2]]) 209 ; CHECK-FP: br %r14 210 %region1 = alloca [1048408 x i8], align 8 211 %region2 = alloca [1048408 x i8], align 8 212 %ptr1 = getelementptr inbounds [1048408 x i8]* %region1, i64 0, i64 524288 213 %ptr2 = getelementptr inbounds [1048408 x i8]* %region2, i64 0, i64 524288 214 store volatile i8 %byte, i8 *%ptr1 215 store volatile i8 %byte, i8 *%ptr2 216 ret void 217 } 218 219 ; Repeat f4 in a case that needs the emergency spill slots (because all 220 ; call-clobbered registers are live and no call-saved ones have been 221 ; allocated). 222 define void @f10(i32 *%vptr, i8 %byte) { 223 ; CHECK-NOFP-LABEL: f10: 224 ; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15) 225 ; CHECK-NOFP: llilh [[REGISTER]], 8 226 ; CHECK-NOFP: stc %r3, 0([[REGISTER]],%r15) 227 ; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) 228 ; CHECK-NOFP: br %r14 229 ; 230 ; CHECK-FP-LABEL: f10: 231 ; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11) 232 ; CHECK-FP: llilh [[REGISTER]], 8 233 ; CHECK-FP: stc %r3, 0([[REGISTER]],%r11) 234 ; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11) 235 ; CHECK-FP: br %r14 236 %i0 = load volatile i32 *%vptr 237 %i1 = load volatile i32 *%vptr 238 %i4 = load volatile i32 *%vptr 239 %i5 = load volatile i32 *%vptr 240 %region1 = alloca [524104 x i8], align 8 241 %region2 = alloca [524104 x i8], align 8 242 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 8 243 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 8 244 store volatile i8 %byte, i8 *%ptr1 245 store volatile i8 %byte, i8 *%ptr2 246 store volatile i32 %i0, i32 *%vptr 247 store volatile i32 %i1, i32 *%vptr 248 store volatile i32 %i4, i32 *%vptr 249 store volatile i32 %i5, i32 *%vptr 250 ret void 251 } 252 253 ; And again with maximum register pressure. The only spill slots that the 254 ; NOFP case needs are the emergency ones, so the offsets are the same as for f4. 255 ; However, the FP case uses %r11 as the frame pointer and must therefore 256 ; spill a second register. This leads to an extra displacement of 8. 257 define void @f11(i32 *%vptr, i8 %byte) { 258 ; CHECK-NOFP-LABEL: f11: 259 ; CHECK-NOFP: stmg %r6, %r15, 260 ; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15) 261 ; CHECK-NOFP: llilh [[REGISTER]], 8 262 ; CHECK-NOFP: stc %r3, 0([[REGISTER]],%r15) 263 ; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) 264 ; CHECK-NOFP: lmg %r6, %r15, 265 ; CHECK-NOFP: br %r14 266 ; 267 ; CHECK-FP-LABEL: f11: 268 ; CHECK-FP: stmg %r6, %r15, 269 ; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11) 270 ; CHECK-FP: llilh [[REGISTER]], 8 271 ; CHECK-FP: stc %r3, 8([[REGISTER]],%r11) 272 ; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11) 273 ; CHECK-FP: lmg %r6, %r15, 274 ; CHECK-FP: br %r14 275 %i0 = load volatile i32 *%vptr 276 %i1 = load volatile i32 *%vptr 277 %i4 = load volatile i32 *%vptr 278 %i5 = load volatile i32 *%vptr 279 %i6 = load volatile i32 *%vptr 280 %i7 = load volatile i32 *%vptr 281 %i8 = load volatile i32 *%vptr 282 %i9 = load volatile i32 *%vptr 283 %i10 = load volatile i32 *%vptr 284 %i11 = load volatile i32 *%vptr 285 %i12 = load volatile i32 *%vptr 286 %i13 = load volatile i32 *%vptr 287 %i14 = load volatile i32 *%vptr 288 %region1 = alloca [524104 x i8], align 8 289 %region2 = alloca [524104 x i8], align 8 290 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 8 291 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 8 292 store volatile i8 %byte, i8 *%ptr1 293 store volatile i8 %byte, i8 *%ptr2 294 store volatile i32 %i0, i32 *%vptr 295 store volatile i32 %i1, i32 *%vptr 296 store volatile i32 %i4, i32 *%vptr 297 store volatile i32 %i5, i32 *%vptr 298 store volatile i32 %i6, i32 *%vptr 299 store volatile i32 %i7, i32 *%vptr 300 store volatile i32 %i8, i32 *%vptr 301 store volatile i32 %i9, i32 *%vptr 302 store volatile i32 %i10, i32 *%vptr 303 store volatile i32 %i11, i32 *%vptr 304 store volatile i32 %i12, i32 *%vptr 305 store volatile i32 %i13, i32 *%vptr 306 store volatile i32 %i14, i32 *%vptr 307 ret void 308 } 309 310 ; Repeat f4 in a case where the index register is already occupied. 311 define void @f12(i8 %byte, i64 %index) { 312 ; CHECK-NOFP-LABEL: f12: 313 ; CHECK-NOFP: llilh %r1, 8 314 ; CHECK-NOFP: agr %r1, %r15 315 ; CHECK-NOFP: stc %r2, 0(%r3,%r1) 316 ; CHECK-NOFP: br %r14 317 ; 318 ; CHECK-FP-LABEL: f12: 319 ; CHECK-FP: llilh %r1, 8 320 ; CHECK-FP: agr %r1, %r11 321 ; CHECK-FP: stc %r2, 0(%r3,%r1) 322 ; CHECK-FP: br %r14 323 %region1 = alloca [524104 x i8], align 8 324 %region2 = alloca [524104 x i8], align 8 325 %index1 = add i64 %index, 8 326 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 %index1 327 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 %index1 328 store volatile i8 %byte, i8 *%ptr1 329 store volatile i8 %byte, i8 *%ptr2 330 ret void 331 } 332
