1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -disable-fp-elim | FileCheck %s 2 ; 3 ; Note: Print verbose stackmaps using -debug-only=stackmaps. 4 5 ; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps 6 ; CHECK-NEXT: __LLVM_StackMaps: 7 ; Header 8 ; CHECK-NEXT: .byte 1 9 ; CHECK-NEXT: .byte 0 10 ; CHECK-NEXT: .short 0 11 ; Num Functions 12 ; CHECK-NEXT: .long 15 13 ; Num LargeConstants 14 ; CHECK-NEXT: .long 3 15 ; Num Callsites 16 ; CHECK-NEXT: .long 19 17 18 ; Functions and stack size 19 ; CHECK-NEXT: .quad _constantargs 20 ; CHECK-NEXT: .quad 8 21 ; CHECK-NEXT: .quad _osrinline 22 ; CHECK-NEXT: .quad 24 23 ; CHECK-NEXT: .quad _osrcold 24 ; CHECK-NEXT: .quad 8 25 ; CHECK-NEXT: .quad _propertyRead 26 ; CHECK-NEXT: .quad 8 27 ; CHECK-NEXT: .quad _propertyWrite 28 ; CHECK-NEXT: .quad 8 29 ; CHECK-NEXT: .quad _jsVoidCall 30 ; CHECK-NEXT: .quad 8 31 ; CHECK-NEXT: .quad _jsIntCall 32 ; CHECK-NEXT: .quad 8 33 ; CHECK-NEXT: .quad _spilledValue 34 ; CHECK-NEXT: .quad 56 35 ; CHECK-NEXT: .quad _spilledStackMapValue 36 ; CHECK-NEXT: .quad 56 37 ; CHECK-NEXT: .quad _spillSubReg 38 ; CHECK-NEXT: .quad 56 39 ; CHECK-NEXT: .quad _subRegOffset 40 ; CHECK-NEXT: .quad 56 41 ; CHECK-NEXT: .quad _liveConstant 42 ; CHECK-NEXT: .quad 8 43 ; CHECK-NEXT: .quad _directFrameIdx 44 ; CHECK-NEXT: .quad 56 45 ; CHECK-NEXT: .quad _longid 46 ; CHECK-NEXT: .quad 8 47 ; CHECK-NEXT: .quad _clobberScratch 48 ; CHECK-NEXT: .quad 56 49 50 ; Large Constants 51 ; CHECK-NEXT: .quad 2147483648 52 ; CHECK-NEXT: .quad 4294967295 53 ; CHECK-NEXT: .quad 4294967296 54 55 ; Callsites 56 ; Constant arguments 57 ; 58 ; CHECK-NEXT: .quad 1 59 ; CHECK-NEXT: .long L{{.*}}-_constantargs 60 ; CHECK-NEXT: .short 0 61 ; CHECK-NEXT: .short 12 62 ; SmallConstant 63 ; CHECK-NEXT: .byte 4 64 ; CHECK-NEXT: .byte 8 65 ; CHECK-NEXT: .short 0 66 ; CHECK-NEXT: .long -1 67 ; SmallConstant 68 ; CHECK-NEXT: .byte 4 69 ; CHECK-NEXT: .byte 8 70 ; CHECK-NEXT: .short 0 71 ; CHECK-NEXT: .long -1 72 ; SmallConstant 73 ; CHECK-NEXT: .byte 4 74 ; CHECK-NEXT: .byte 8 75 ; CHECK-NEXT: .short 0 76 ; CHECK-NEXT: .long 65536 77 ; SmallConstant 78 ; CHECK-NEXT: .byte 4 79 ; CHECK-NEXT: .byte 8 80 ; CHECK-NEXT: .short 0 81 ; CHECK-NEXT: .long 2000000000 82 ; SmallConstant 83 ; CHECK-NEXT: .byte 4 84 ; CHECK-NEXT: .byte 8 85 ; CHECK-NEXT: .short 0 86 ; CHECK-NEXT: .long 2147483647 87 ; SmallConstant 88 ; CHECK-NEXT: .byte 4 89 ; CHECK-NEXT: .byte 8 90 ; CHECK-NEXT: .short 0 91 ; CHECK-NEXT: .long -1 92 ; SmallConstant 93 ; CHECK-NEXT: .byte 4 94 ; CHECK-NEXT: .byte 8 95 ; CHECK-NEXT: .short 0 96 ; CHECK-NEXT: .long -1 97 ; SmallConstant 98 ; CHECK-NEXT: .byte 4 99 ; CHECK-NEXT: .byte 8 100 ; CHECK-NEXT: .short 0 101 ; CHECK-NEXT: .long 0 102 ; LargeConstant at index 0 103 ; CHECK-NEXT: .byte 5 104 ; CHECK-NEXT: .byte 8 105 ; CHECK-NEXT: .short 0 106 ; CHECK-NEXT: .long 0 107 ; LargeConstant at index 1 108 ; CHECK-NEXT: .byte 5 109 ; CHECK-NEXT: .byte 8 110 ; CHECK-NEXT: .short 0 111 ; CHECK-NEXT: .long 1 112 ; LargeConstant at index 2 113 ; CHECK-NEXT: .byte 5 114 ; CHECK-NEXT: .byte 8 115 ; CHECK-NEXT: .short 0 116 ; CHECK-NEXT: .long 2 117 ; SmallConstant 118 ; CHECK-NEXT: .byte 4 119 ; CHECK-NEXT: .byte 8 120 ; CHECK-NEXT: .short 0 121 ; CHECK-NEXT: .long -1 122 123 define void @constantargs() { 124 entry: 125 %0 = inttoptr i64 12345 to i8* 126 tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 1, i32 15, i8* %0, i32 0, i16 65535, i16 -1, i32 65536, i32 2000000000, i32 2147483647, i32 -1, i32 4294967295, i32 4294967296, i64 2147483648, i64 4294967295, i64 4294967296, i64 -1) 127 ret void 128 } 129 130 ; Inline OSR Exit 131 ; 132 ; CHECK-LABEL: .long L{{.*}}-_osrinline 133 ; CHECK-NEXT: .short 0 134 ; CHECK-NEXT: .short 2 135 ; CHECK-NEXT: .byte 1 136 ; CHECK-NEXT: .byte 8 137 ; CHECK-NEXT: .short {{[0-9]+}} 138 ; CHECK-NEXT: .long 0 139 ; CHECK-NEXT: .byte 1 140 ; CHECK-NEXT: .byte 8 141 ; CHECK-NEXT: .short {{[0-9]+}} 142 ; CHECK-NEXT: .long 0 143 define void @osrinline(i64 %a, i64 %b) { 144 entry: 145 ; Runtime void->void call. 146 call void inttoptr (i64 -559038737 to void ()*)() 147 ; Followed by inline OSR patchpoint with 12-byte shadow and 2 live vars. 148 call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 3, i32 12, i64 %a, i64 %b) 149 ret void 150 } 151 152 ; Cold OSR Exit 153 ; 154 ; 2 live variables in register. 155 ; 156 ; CHECK-LABEL: .long L{{.*}}-_osrcold 157 ; CHECK-NEXT: .short 0 158 ; CHECK-NEXT: .short 2 159 ; CHECK-NEXT: .byte 1 160 ; CHECK-NEXT: .byte 8 161 ; CHECK-NEXT: .short {{[0-9]+}} 162 ; CHECK-NEXT: .long 0 163 ; CHECK-NEXT: .byte 1 164 ; CHECK-NEXT: .byte 8 165 ; CHECK-NEXT: .short {{[0-9]+}} 166 ; CHECK-NEXT: .long 0 167 define void @osrcold(i64 %a, i64 %b) { 168 entry: 169 %test = icmp slt i64 %a, %b 170 br i1 %test, label %ret, label %cold 171 cold: 172 ; OSR patchpoint with 12-byte nop-slide and 2 live vars. 173 %thunk = inttoptr i64 -559038737 to i8* 174 call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 4, i32 15, i8* %thunk, i32 0, i64 %a, i64 %b) 175 unreachable 176 ret: 177 ret void 178 } 179 180 ; Property Read 181 ; CHECK-LABEL: .long L{{.*}}-_propertyRead 182 ; CHECK-NEXT: .short 0 183 ; CHECK-NEXT: .short 2 184 ; CHECK-NEXT: .byte 1 185 ; CHECK-NEXT: .byte 8 186 ; CHECK-NEXT: .short {{[0-9]+}} 187 ; CHECK-NEXT: .long 0 188 ; CHECK-NEXT: .byte 1 189 ; CHECK-NEXT: .byte 8 190 ; CHECK-NEXT: .short {{[0-9]+}} 191 ; CHECK-NEXT: .long 0 192 define i64 @propertyRead(i64* %obj) { 193 entry: 194 %resolveRead = inttoptr i64 -559038737 to i8* 195 %result = call anyregcc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 5, i32 15, i8* %resolveRead, i32 1, i64* %obj) 196 %add = add i64 %result, 3 197 ret i64 %add 198 } 199 200 ; Property Write 201 ; CHECK-LABEL: .long L{{.*}}-_propertyWrite 202 ; CHECK-NEXT: .short 0 203 ; CHECK-NEXT: .short 2 204 ; CHECK-NEXT: .byte 1 205 ; CHECK-NEXT: .byte 8 206 ; CHECK-NEXT: .short {{[0-9]+}} 207 ; CHECK-NEXT: .long 0 208 ; CHECK-NEXT: .byte 1 209 ; CHECK-NEXT: .byte 8 210 ; CHECK-NEXT: .short {{[0-9]+}} 211 ; CHECK-NEXT: .long 0 212 define void @propertyWrite(i64 %dummy1, i64* %obj, i64 %dummy2, i64 %a) { 213 entry: 214 %resolveWrite = inttoptr i64 -559038737 to i8* 215 call anyregcc void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 6, i32 15, i8* %resolveWrite, i32 2, i64* %obj, i64 %a) 216 ret void 217 } 218 219 ; Void JS Call 220 ; 221 ; 2 live variables in registers. 222 ; 223 ; CHECK-LABEL: .long L{{.*}}-_jsVoidCall 224 ; CHECK-NEXT: .short 0 225 ; CHECK-NEXT: .short 2 226 ; CHECK-NEXT: .byte 1 227 ; CHECK-NEXT: .byte 8 228 ; CHECK-NEXT: .short {{[0-9]+}} 229 ; CHECK-NEXT: .long 0 230 ; CHECK-NEXT: .byte 1 231 ; CHECK-NEXT: .byte 8 232 ; CHECK-NEXT: .short {{[0-9]+}} 233 ; CHECK-NEXT: .long 0 234 define void @jsVoidCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) { 235 entry: 236 %resolveCall = inttoptr i64 -559038737 to i8* 237 call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 7, i32 15, i8* %resolveCall, i32 2, i64* %obj, i64 %arg, i64 %l1, i64 %l2) 238 ret void 239 } 240 241 ; i64 JS Call 242 ; 243 ; 2 live variables in registers. 244 ; 245 ; CHECK-LABEL: .long L{{.*}}-_jsIntCall 246 ; CHECK-NEXT: .short 0 247 ; CHECK-NEXT: .short 2 248 ; CHECK-NEXT: .byte 1 249 ; CHECK-NEXT: .byte 8 250 ; CHECK-NEXT: .short {{[0-9]+}} 251 ; CHECK-NEXT: .long 0 252 ; CHECK-NEXT: .byte 1 253 ; CHECK-NEXT: .byte 8 254 ; CHECK-NEXT: .short {{[0-9]+}} 255 ; CHECK-NEXT: .long 0 256 define i64 @jsIntCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) { 257 entry: 258 %resolveCall = inttoptr i64 -559038737 to i8* 259 %result = call i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 8, i32 15, i8* %resolveCall, i32 2, i64* %obj, i64 %arg, i64 %l1, i64 %l2) 260 %add = add i64 %result, 3 261 ret i64 %add 262 } 263 264 ; Spilled stack map values. 265 ; 266 ; Verify 17 stack map entries. 267 ; 268 ; CHECK-LABEL: .long L{{.*}}-_spilledValue 269 ; CHECK-NEXT: .short 0 270 ; CHECK-NEXT: .short 17 271 ; 272 ; Check that at least one is a spilled entry from RBP. 273 ; Location: Indirect RBP + ... 274 ; CHECK: .byte 3 275 ; CHECK-NEXT: .byte 8 276 ; CHECK-NEXT: .short 6 277 define void @spilledValue(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) { 278 entry: 279 call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 11, i32 15, i8* null, i32 5, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) 280 ret void 281 } 282 283 ; Spilled stack map values. 284 ; 285 ; Verify 17 stack map entries. 286 ; 287 ; CHECK-LABEL: .long L{{.*}}-_spilledStackMapValue 288 ; CHECK-NEXT: .short 0 289 ; CHECK-NEXT: .short 17 290 ; 291 ; Check that at least one is a spilled entry from RBP. 292 ; Location: Indirect RBP + ... 293 ; CHECK: .byte 3 294 ; CHECK-NEXT: .byte 8 295 ; CHECK-NEXT: .short 6 296 define webkit_jscc void @spilledStackMapValue(i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) { 297 entry: 298 call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 12, i32 15, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) 299 ret void 300 } 301 302 ; Spill a subregister stackmap operand. 303 ; 304 ; CHECK-LABEL: .long L{{.*}}-_spillSubReg 305 ; CHECK-NEXT: .short 0 306 ; 4 locations 307 ; CHECK-NEXT: .short 1 308 ; 309 ; Check that the subregister operand is a 4-byte spill. 310 ; Location: Indirect, 4-byte, RBP + ... 311 ; CHECK: .byte 3 312 ; CHECK-NEXT: .byte 4 313 ; CHECK-NEXT: .short 6 314 define void @spillSubReg(i64 %arg) #0 { 315 bb: 316 br i1 undef, label %bb1, label %bb2 317 318 bb1: 319 unreachable 320 321 bb2: 322 %tmp = load i64* inttoptr (i64 140685446136880 to i64*) 323 br i1 undef, label %bb16, label %bb17 324 325 bb16: 326 unreachable 327 328 bb17: 329 %tmp32 = trunc i64 %tmp to i32 330 br i1 undef, label %bb60, label %bb61 331 332 bb60: 333 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind 334 tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 13, i32 5, i32 %tmp32) 335 unreachable 336 337 bb61: 338 unreachable 339 } 340 341 ; Map a single byte subregister. There is no DWARF register number, so 342 ; we expect the register to be encoded with the proper size and spill offset. We don't know which 343 ; 344 ; CHECK-LABEL: .long L{{.*}}-_subRegOffset 345 ; CHECK-NEXT: .short 0 346 ; 2 locations 347 ; CHECK-NEXT: .short 2 348 ; 349 ; Check that the subregister operands are 1-byte spills. 350 ; Location 0: Register, 4-byte, AL 351 ; CHECK-NEXT: .byte 1 352 ; CHECK-NEXT: .byte 1 353 ; CHECK-NEXT: .short 0 354 ; CHECK-NEXT: .long 0 355 ; 356 ; Location 1: Register, 4-byte, BL 357 ; CHECK-NEXT: .byte 1 358 ; CHECK-NEXT: .byte 1 359 ; CHECK-NEXT: .short 3 360 ; CHECK-NEXT: .long 0 361 define void @subRegOffset(i16 %arg) { 362 %v = mul i16 %arg, 5 363 %a0 = trunc i16 %v to i8 364 tail call void asm sideeffect "nop", "~{bx}"() nounwind 365 %arghi = lshr i16 %v, 8 366 %a1 = trunc i16 %arghi to i8 367 tail call void asm sideeffect "nop", "~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind 368 tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 14, i32 5, i8 %a0, i8 %a1) 369 ret void 370 } 371 372 ; Map a constant value. 373 ; 374 ; CHECK-LABEL: .long L{{.*}}-_liveConstant 375 ; CHECK-NEXT: .short 0 376 ; 1 location 377 ; CHECK-NEXT: .short 1 378 ; Loc 0: SmallConstant 379 ; CHECK-NEXT: .byte 4 380 ; CHECK-NEXT: .byte 8 381 ; CHECK-NEXT: .short 0 382 ; CHECK-NEXT: .long 33 383 384 define void @liveConstant() { 385 tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 15, i32 5, i32 33) 386 ret void 387 } 388 389 ; Directly map an alloca's address. 390 ; 391 ; Callsite 16 392 ; CHECK-LABEL: .long L{{.*}}-_directFrameIdx 393 ; CHECK-NEXT: .short 0 394 ; 1 location 395 ; CHECK-NEXT: .short 1 396 ; Loc 0: Direct RBP - ofs 397 ; CHECK-NEXT: .byte 2 398 ; CHECK-NEXT: .byte 8 399 ; CHECK-NEXT: .short 6 400 ; CHECK-NEXT: .long 401 402 ; Callsite 17 403 ; CHECK-LABEL: .long L{{.*}}-_directFrameIdx 404 ; CHECK-NEXT: .short 0 405 ; 2 locations 406 ; CHECK-NEXT: .short 2 407 ; Loc 0: Direct RBP - ofs 408 ; CHECK-NEXT: .byte 2 409 ; CHECK-NEXT: .byte 8 410 ; CHECK-NEXT: .short 6 411 ; CHECK-NEXT: .long 412 ; Loc 1: Direct RBP - ofs 413 ; CHECK-NEXT: .byte 2 414 ; CHECK-NEXT: .byte 8 415 ; CHECK-NEXT: .short 6 416 ; CHECK-NEXT: .long 417 define void @directFrameIdx() { 418 entry: 419 %metadata1 = alloca i64, i32 3, align 8 420 store i64 11, i64* %metadata1 421 store i64 12, i64* %metadata1 422 store i64 13, i64* %metadata1 423 call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 16, i32 0, i64* %metadata1) 424 %metadata2 = alloca i8, i32 4, align 8 425 %metadata3 = alloca i16, i32 4, align 8 426 call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 17, i32 5, i8* null, i32 0, i8* %metadata2, i16* %metadata3) 427 ret void 428 } 429 430 ; Test a 64-bit ID. 431 ; 432 ; CHECK: .quad 4294967295 433 ; CHECK-LABEL: .long L{{.*}}-_longid 434 ; CHECK: .quad 4294967296 435 ; CHECK-LABEL: .long L{{.*}}-_longid 436 ; CHECK: .quad 9223372036854775807 437 ; CHECK-LABEL: .long L{{.*}}-_longid 438 ; CHECK: .quad -1 439 ; CHECK-LABEL: .long L{{.*}}-_longid 440 define void @longid() { 441 entry: 442 tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 4294967295, i32 0, i8* null, i32 0) 443 tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 4294967296, i32 0, i8* null, i32 0) 444 tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 9223372036854775807, i32 0, i8* null, i32 0) 445 tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 -1, i32 0, i8* null, i32 0) 446 ret void 447 } 448 449 ; Map a value when R11 is the only free register. 450 ; The scratch register should not be used for a live stackmap value. 451 ; 452 ; CHECK-LABEL: .long L{{.*}}-_clobberScratch 453 ; CHECK-NEXT: .short 0 454 ; 1 location 455 ; CHECK-NEXT: .short 1 456 ; Loc 0: Indirect fp - offset 457 ; CHECK-NEXT: .byte 3 458 ; CHECK-NEXT: .byte 4 459 ; CHECK-NEXT: .short 6 460 ; CHECK-NEXT: .long -{{[0-9]+}} 461 define void @clobberScratch(i32 %a) { 462 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r12},~{r13},~{r14},~{r15}"() nounwind 463 tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 16, i32 8, i32 %a) 464 ret void 465 } 466 467 declare void @llvm.experimental.stackmap(i64, i32, ...) 468 declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...) 469 declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...) 470
