1 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s 2 3 ; Test that we correctly fold a shuffle that performs a swizzle of another 4 ; shuffle node according to the rule 5 ; shuffle (shuffle (x, undef, M0), undef, M1) -> shuffle(x, undef, M2) 6 ; 7 ; We only do this if the resulting mask is legal to avoid introducing an 8 ; illegal shuffle that is expanded into a sub-optimal sequence of instructions 9 ; during lowering stage. 10 11 12 define <4 x i32> @swizzle_1(<4 x i32> %v) { 13 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1> 14 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1> 15 ret <4 x i32> %2 16 } 17 ; CHECK-LABEL: swizzle_1 18 ; Mask: [1,0,3,2] 19 ; CHECK: pshufd $-79 20 ; CHECK-NOT: pshufd 21 ; CHECK-NEXT: ret 22 23 24 define <4 x i32> @swizzle_2(<4 x i32> %v) { 25 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2> 26 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2> 27 ret <4 x i32> %2 28 } 29 ; CHECK-LABEL: swizzle_2 30 ; Mask: [2,1,3,0] 31 ; CHECK: pshufd $54 32 ; CHECK-NOT: pshufd 33 ; CHECK-NEXT: ret 34 35 36 define <4 x i32> @swizzle_3(<4 x i32> %v) { 37 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 38 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 39 ret <4 x i32> %2 40 } 41 ; CHECK-LABEL: swizzle_3 42 ; Mask: [1,0,3,2] 43 ; CHECK: pshufd $-79 44 ; CHECK-NOT: pshufd 45 ; CHECK-NEXT: ret 46 47 48 define <4 x i32> @swizzle_4(<4 x i32> %v) { 49 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0> 50 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0> 51 ret <4 x i32> %2 52 } 53 ; CHECK-LABEL: swizzle_4 54 ; Mask: [3,1,0,2] 55 ; CHECK: pshufd $-121 56 ; CHECK-NOT: pshufd 57 ; CHECK-NEXT: ret 58 59 60 define <4 x i32> @swizzle_5(<4 x i32> %v) { 61 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> 62 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> 63 ret <4 x i32> %2 64 } 65 ; CHECK-LABEL: swizzle_5 66 ; Mask: [2,3,0,1] 67 ; CHECK: pshufd $78 68 ; CHECK-NOT: pshufd 69 ; CHECK-NEXT: ret 70 71 72 define <4 x i32> @swizzle_6(<4 x i32> %v) { 73 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3> 74 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3> 75 ret <4 x i32> %2 76 } 77 ; CHECK-LABEL: swizzle_6 78 ; Mask: [2,0,1,3] 79 ; CHECK: pshufd $-46 80 ; CHECK-NOT: pshufd 81 ; CHECK-NEXT: ret 82 83 84 define <4 x i32> @swizzle_7(<4 x i32> %v) { 85 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2> 86 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2> 87 ret <4 x i32> %2 88 } 89 ; CHECK-LABEL: swizzle_7 90 ; Mask: [0,2,3,1] 91 ; CHECK: pshufd $120 92 ; CHECK-NOT: pshufd 93 ; CHECK-NEXT: ret 94 95 96 define <4 x i32> @swizzle_8(<4 x i32> %v) { 97 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1> 98 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1> 99 ret <4 x i32> %2 100 } 101 ; CHECK-LABEL: swizzle_8 102 ; Mask: [1,3,2,0] 103 ; CHECK: pshufd $45 104 ; CHECK-NOT: pshufd 105 ; CHECK-NEXT: ret 106 107 108 define <4 x i32> @swizzle_9(<4 x i32> %v) { 109 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2> 110 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2> 111 ret <4 x i32> %2 112 } 113 ; CHECK-LABEL: swizzle_9 114 ; Mask: [2,3,0,1] 115 ; CHECK: pshufd $78 116 ; CHECK-NOT: pshufd 117 ; CHECK-NEXT: ret 118 119 120 define <4 x i32> @swizzle_10(<4 x i32> %v) { 121 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3> 122 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3> 123 ret <4 x i32> %2 124 } 125 ; CHECK-LABEL: swizzle_10 126 ; Mask: [1,2,0,3] 127 ; CHECK: pshufd $-55 128 ; CHECK-NOT: pshufd 129 ; CHECK-NEXT: ret 130 131 132 define <4 x i32> @swizzle_11(<4 x i32> %v) { 133 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1> 134 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1> 135 ret <4 x i32> %2 136 } 137 ; CHECK-LABEL: swizzle_11 138 ; Mask: [3,2,1,0] 139 ; CHECK: pshufd $27 140 ; CHECK-NOT: pshufd 141 ; CHECK-NEXT: ret 142 143 144 define <4 x i32> @swizzle_12(<4 x i32> %v) { 145 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1> 146 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1> 147 ret <4 x i32> %2 148 } 149 ; CHECK-LABEL: swizzle_12 150 ; Mask: [0,3,1,2] 151 ; CHECK: pshufd $-100 152 ; CHECK-NOT: pshufd 153 ; CHECK-NEXT: ret 154 155 156 define <4 x i32> @swizzle_13(<4 x i32> %v) { 157 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2> 158 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2> 159 ret <4 x i32> %2 160 } 161 ; CHECK-LABEL: swizzle_13 162 ; Mask: [3,2,1,0] 163 ; CHECK: pshufd $27 164 ; CHECK-NOT: pshufd 165 ; CHECK-NEXT: ret 166 167 168 define <4 x i32> @swizzle_14(<4 x i32> %v) { 169 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0> 170 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0> 171 ret <4 x i32> %2 172 } 173 ; CHECK-LABEL: swizzle_14 174 ; Mask: [3,0,2,1] 175 ; CHECK: pshufd $99 176 ; CHECK-NOT: pshufd 177 ; CHECK-NEXT: ret 178 179 180 define <4 x float> @swizzle_15(<4 x float> %v) { 181 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1> 182 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1> 183 ret <4 x float> %2 184 } 185 ; CHECK-LABEL: swizzle_15 186 ; Mask: [1,0,3,2] 187 ; CHECK: pshufd $-79 188 ; CHECK-NOT: pshufd 189 ; CHECK-NEXT: ret 190 191 192 define <4 x float> @swizzle_16(<4 x float> %v) { 193 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2> 194 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2> 195 ret <4 x float> %2 196 } 197 ; CHECK-LABEL: swizzle_16 198 ; Mask: [2,1,3,0] 199 ; CHECK: pshufd $54 200 ; CHECK-NOT: pshufd 201 ; CHECK-NEXT: ret 202 203 204 define <4 x float> @swizzle_17(<4 x float> %v) { 205 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 206 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 207 ret <4 x float> %2 208 } 209 ; CHECK-LABEL: swizzle_17 210 ; Mask: [1,0,3,2] 211 ; CHECK: pshufd $-79 212 ; CHECK-NOT: pshufd 213 ; CHECK-NEXT: ret 214 215 216 define <4 x float> @swizzle_18(<4 x float> %v) { 217 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0> 218 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0> 219 ret <4 x float> %2 220 } 221 ; CHECK-LABEL: swizzle_18 222 ; Mask: [3,1,0,2] 223 ; CHECK: pshufd $-121 224 ; CHECK-NOT: pshufd 225 ; CHECK-NEXT: ret 226 227 228 define <4 x float> @swizzle_19(<4 x float> %v) { 229 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> 230 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> 231 ret <4 x float> %2 232 } 233 ; CHECK-LABEL: swizzle_19 234 ; Mask: [2,3,0,1] 235 ; CHECK: pshufd $78 236 ; CHECK-NOT: pshufd 237 ; CHECK-NEXT: ret 238 239 240 define <4 x float> @swizzle_20(<4 x float> %v) { 241 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3> 242 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3> 243 ret <4 x float> %2 244 } 245 ; CHECK-LABEL: swizzle_20 246 ; Mask: [2,0,1,3] 247 ; CHECK: pshufd $-46 248 ; CHECK-NOT: pshufd 249 ; CHECK-NEXT: ret 250 251 252 define <4 x float> @swizzle_21(<4 x float> %v) { 253 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2> 254 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2> 255 ret <4 x float> %2 256 } 257 ; CHECK-LABEL: swizzle_21 258 ; Mask: [0,2,3,1] 259 ; CHECK: pshufd $120 260 ; CHECK-NOT: pshufd 261 ; CHECK-NEXT: ret 262 263 264 define <4 x float> @swizzle_22(<4 x float> %v) { 265 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1> 266 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1> 267 ret <4 x float> %2 268 } 269 ; CHECK-LABEL: swizzle_22 270 ; Mask: [1,3,2,0] 271 ; CHECK: pshufd $45 272 ; CHECK-NOT: pshufd 273 ; CHECK-NEXT: ret 274 275 276 define <4 x float> @swizzle_23(<4 x float> %v) { 277 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2> 278 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2> 279 ret <4 x float> %2 280 } 281 ; CHECK-LABEL: swizzle_23 282 ; Mask: [2,3,0,1] 283 ; CHECK: pshufd $78 284 ; CHECK-NOT: pshufd 285 ; CHECK-NEXT: ret 286 287 288 define <4 x float> @swizzle_24(<4 x float> %v) { 289 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3> 290 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3> 291 ret <4 x float> %2 292 } 293 ; CHECK-LABEL: swizzle_24 294 ; Mask: [1,2,0,3] 295 ; CHECK: pshufd $-55 296 ; CHECK-NOT: pshufd 297 ; CHECK-NEXT: ret 298 299 300 define <4 x float> @swizzle_25(<4 x float> %v) { 301 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1> 302 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1> 303 ret <4 x float> %2 304 } 305 ; CHECK-LABEL: swizzle_25 306 ; Mask: [3,2,1,0] 307 ; CHECK: pshufd $27 308 ; CHECK-NOT: pshufd 309 ; CHECK-NEXT: ret 310 311 312 define <4 x float> @swizzle_26(<4 x float> %v) { 313 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1> 314 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1> 315 ret <4 x float> %2 316 } 317 ; CHECK-LABEL: swizzle_26 318 ; Mask: [0,3,1,2] 319 ; CHECK: pshufd $-100 320 ; CHECK-NOT: pshufd 321 ; CHECK-NEXT: ret 322 323 324 define <4 x float> @swizzle_27(<4 x float> %v) { 325 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2> 326 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2> 327 ret <4 x float> %2 328 } 329 ; CHECK-LABEL: swizzle_27 330 ; Mask: [3,2,1,0] 331 ; CHECK: pshufd $27 332 ; CHECK-NOT: pshufd 333 ; CHECK-NEXT: ret 334 335 336 define <4 x float> @swizzle_28(<4 x float> %v) { 337 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0> 338 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0> 339 ret <4 x float> %2 340 } 341 ; CHECK-LABEL: swizzle_28 342 ; Mask: [3,0,2,1] 343 ; CHECK: pshufd $99 344 ; CHECK-NOT: pshufd 345 ; CHECK-NEXT: ret 346 347 348 define <4 x float> @swizzle_29(<4 x float> %v) { 349 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 1, i32 2, i32 0> 350 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 2, i32 3> 351 ret <4 x float> %2 352 } 353 ; CHECK-LABEL: swizzle_29 354 ; Mask: [1,3,2,0] 355 ; CHECK: pshufd $45 356 ; CHECK-NOT: pshufd 357 ; CHECK-NEXT: ret 358 359 ; Make sure that we combine the shuffles from each function below into a single 360 ; legal shuffle (either pshuflw or pshufb depending on the masks). 361 362 define <8 x i16> @swizzle_30(<8 x i16> %v) { 363 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 3, i32 1, i32 2, i32 0, i32 7, i32 5, i32 6, i32 4> 364 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 2, i32 3, i32 7, i32 5, i32 6, i32 4> 365 ret <8 x i16> %2 366 } 367 ; CHECK-LABEL: swizzle_30 368 ; Mask: [1,3,2,0,5,7,6,4] 369 ; CHECK: pshuflw $45 370 ; CHECK-NOT: pshufb 371 ; CHECK-NEXT: ret 372 373 374 define <8 x i16> @swizzle_31(<8 x i16> %v) { 375 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 3, i32 0, i32 2, i32 1, i32 7, i32 5, i32 6, i32 4> 376 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 3, i32 0, i32 2, i32 1, i32 7, i32 5, i32 6, i32 4> 377 ret <8 x i16> %2 378 } 379 ; CHECK-LABEL: swizzle_31 380 ; Mask: [1,3,2,0,4,5,6,7] 381 ; CHECK: pshuflw $45 382 ; CHECK-NOT: pshufb 383 ; CHECK: ret 384 385 386 define <8 x i16> @swizzle_32(<8 x i16> %v) { 387 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 7, i32 5, i32 6, i32 4> 388 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 7, i32 5, i32 6, i32 4> 389 ret <8 x i16> %2 390 } 391 ; CHECK-LABEL: swizzle_32 392 ; Mask: [2,3,0,1,4,5,6,7] --> equivalent to pshufd mask [1,0,2,3] 393 ; CHECK: pshufd $-31 394 ; CHECK-NOT: pshufb 395 ; CHECK: ret 396 397 define <8 x i16> @swizzle_33(<8 x i16> %v) { 398 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 5, i32 7, i32 2, i32 3, i32 1, i32 0> 399 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 5, i32 7, i32 2, i32 3, i32 1, i32 0> 400 ret <8 x i16> %2 401 } 402 ; CHECK-LABEL: swizzle_33 403 ; CHECK: pshufb 404 ; CHECK-NOT: pshufb 405 ; CHECK-NOT: shufpd 406 ; CHECK: ret 407 408 409 define <8 x i16> @swizzle_34(<8 x i16> %v) { 410 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 4, i32 7, i32 6, i32 5, i32 1, i32 2, i32 0, i32 3> 411 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 4, i32 7, i32 6, i32 5, i32 1, i32 2, i32 0, i32 3> 412 ret <8 x i16> %2 413 } 414 ; CHECK-LABEL: swizzle_34 415 ; CHECK: pshufb 416 ; CHECK-NOT: pshufb 417 ; CHECK-NOT: shufpd 418 ; CHECK: ret 419 420 421 define <8 x i16> @swizzle_35(<8 x i16> %v) { 422 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 7, i32 4, i32 6, i32 5, i32 1, i32 3, i32 0, i32 2> 423 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 7, i32 4, i32 6, i32 5, i32 1, i32 3, i32 0, i32 2> 424 ret <8 x i16> %2 425 } 426 ; CHECK-LABEL: swizzle_35 427 ; CHECK: pshufb 428 ; CHECK-NOT: pshufb 429 ; CHECK: ret 430 431 432 define <8 x i16> @swizzle_36(<8 x i16> %v) { 433 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 7, i32 5, i32 0, i32 1, i32 3, i32 2> 434 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 7, i32 5, i32 0, i32 1, i32 3, i32 2> 435 ret <8 x i16> %2 436 } 437 ; CHECK-LABEL: swizzle_36 438 ; CHECK: pshufb 439 ; CHECK-NOT: pshufb 440 ; CHECK-NOT: shufpd 441 ; CHECK: ret 442 443 444 define <8 x i16> @swizzle_37(<8 x i16> %v) { 445 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 7, i32 5, i32 6, i32 4> 446 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 7, i32 4, i32 6, i32 5> 447 ret <8 x i16> %2 448 } 449 ; CHECK-LABEL: swizzle_37 450 ; Mask: [0,1,2,3,4,7,6,5] 451 ; CHECK: pshufhw $108 452 ; CHECK-NOT: pshufb 453 ; CHECK: ret 454 455 456 define <8 x i16> @swizzle_38(<8 x i16> %v) { 457 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 5, i32 6, i32 4, i32 7, i32 0, i32 2, i32 1, i32 3> 458 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 5, i32 6, i32 4, i32 7, i32 0, i32 2, i32 1, i32 3> 459 ret <8 x i16> %2 460 } 461 ; CHECK-LABEL: swizzle_38 462 ; CHECK: pshufb 463 ; CHECK-NOT: pshufb 464 ; CHECK-NOT: shufpd 465 ; CHECK: ret 466 467 468 define <8 x i16> @swizzle_39(<8 x i16> %v) { 469 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 3, i32 2, i32 1, i32 0> 470 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 3, i32 2, i32 1, i32 0> 471 ret <8 x i16> %2 472 } 473 ; CHECK-LABEL: swizzle_39 474 ; CHECK: pshufb 475 ; CHECK-NOT: pshufb 476 ; CHECK-NOT: shufpd 477 ; CHECK: ret 478 479 480 define <8 x i16> @swizzle_40(<8 x i16> %v) { 481 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 6, i32 4, i32 7, i32 5, i32 1, i32 0, i32 3, i32 2> 482 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 6, i32 4, i32 7, i32 5, i32 1, i32 0, i32 3, i32 2> 483 ret <8 x i16> %2 484 } 485 ; CHECK-LABEL: swizzle_40 486 ; CHECK: pshufb 487 ; CHECK-NOT: pshufb 488 ; CHECK-NOT: shufpd 489 ; CHECK: ret 490 491 492 define <8 x i16> @swizzle_41(<8 x i16> %v) { 493 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 6, i32 7, i32 5, i32 4, i32 0, i32 1, i32 3, i32 2> 494 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 6, i32 7, i32 5, i32 4, i32 0, i32 1, i32 3, i32 2> 495 ret <8 x i16> %2 496 } 497 ; CHECK-LABEL: swizzle_41 498 ; CHECK: pshufb 499 ; CHECK-NOT: pshufb 500 ; CHECK-NOT: shufpd 501 ; CHECK: ret 502 503 504 define <8 x i16> @swizzle_42(<8 x i16> %v) { 505 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 7, i32 6, i32 4, i32 5> 506 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 7, i32 6, i32 4, i32 5> 507 ret <8 x i16> %2 508 } 509 ; CHECK-LABEL: swizzle_42 510 ; Mask: [0,1,2,3,5,4,7,6] 511 ; CHECK: pshufhw $-79 512 ; CHECK-NOT: pshufb 513 ; CHECK: ret 514 515 516
