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      1 ; RUN: llc -mcpu=corei7 < %s | FileCheck %s
      2 
      3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
      4 target triple = "x86_64-apple-darwin8"
      5 
      6 ; This should be a single mov, not a load of immediate + andq.
      7 ; CHECK-LABEL: test:
      8 ; CHECK: movl %edi, %eax
      9 
     10 define i64 @test(i64 %x) nounwind {
     11 entry:
     12 	%tmp123 = and i64 %x, 4294967295		; <i64> [#uses=1]
     13 	ret i64 %tmp123
     14 }
     15 
     16 ; This copy can't be coalesced away because it needs the implicit zero-extend.
     17 ; CHECK-LABEL: bbb:
     18 ; CHECK: movl %edi, %edi
     19 
     20 define void @bbb(i64 %x) nounwind {
     21   %t = and i64 %x, 4294967295
     22   call void @foo(i64 %t)
     23   ret void
     24 }
     25 
     26 ; This should use a 32-bit and with implicit zero-extension, not a 64-bit and
     27 ; with a separate mov to materialize the mask.
     28 ; rdar://7527390
     29 ; CHECK-LABEL: ccc:
     30 ; CHECK: andl $-1048593, %edi
     31 
     32 declare void @foo(i64 %x) nounwind
     33 
     34 define void @ccc(i64 %x) nounwind {
     35   %t = and i64 %x, 4293918703
     36   call void @foo(i64 %t)
     37   ret void
     38 }
     39 
     40 ; This requires a mov and a 64-bit and.
     41 ; CHECK-LABEL: ddd:
     42 ; CHECK: movabsq $4294967296, %r
     43 ; CHECK: andq %r{{..}}, %r{{..}}
     44 
     45 define void @ddd(i64 %x) nounwind {
     46   %t = and i64 %x, 4294967296
     47   call void @foo(i64 %t)
     48   ret void
     49 }
     50