1 /* Copyright (C) 2007-2008 The Android Open Source Project 2 ** 3 ** This software is licensed under the terms of the GNU General Public 4 ** License version 2, as published by the Free Software Foundation, and 5 ** may be copied, distributed, and modified under those terms. 6 ** 7 ** This program is distributed in the hope that it will be useful, 8 ** but WITHOUT ANY WARRANTY; without even the implied warranty of 9 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 ** GNU General Public License for more details. 11 */ 12 #include "hw/hw.h" 13 #include "hw/boards.h" 14 #include "hw/devices.h" 15 #include "hw/loader.h" 16 #include "net/net.h" 17 #include "sysemu/sysemu.h" 18 #include "hw/mips/mips.h" 19 #include "hw/android/goldfish/device.h" 20 #include "hw/android/goldfish/pipe.h" 21 #include "android/globals.h" 22 #include "audio/audio.h" 23 #include "sysemu/blockdev.h" 24 25 #include "android/utils/debug.h" 26 27 #define D(...) VERBOSE_PRINT(init,__VA_ARGS__) 28 29 #define MIPS_CPU_SAVE_VERSION 1 30 #define GOLDFISH_IO_SPACE 0x1f000000 31 #define GOLDFISH_INTERRUPT 0x1f000000 32 #define GOLDFISH_DEVICEBUS 0x1f001000 33 #define GOLDFISH_TTY 0x1f002000 34 #define GOLDFISH_RTC 0x1f003000 35 #define GOLDFISH_AUDIO 0x1f004000 36 #define GOLDFISH_MMC 0x1f005000 37 #define GOLDFISH_MEMLOG 0x1f006000 38 #define GOLDFISH_DEVICES 0x1f010000 39 40 char* audio_input_source = NULL; 41 42 static struct goldfish_device event0_device = { 43 .name = "goldfish_events", 44 .id = 0, 45 .size = 0x1000, 46 .irq_count = 1 47 }; 48 49 static struct goldfish_device nand_device = { 50 .name = "goldfish_nand", 51 .id = 0, 52 .size = 0x1000 53 }; 54 55 /* Board init. */ 56 57 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000)) 58 59 #define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff) 60 61 static void android_load_kernel(CPUOldState *env, int ram_size, const char *kernel_filename, 62 const char *kernel_cmdline, const char *initrd_filename) 63 { 64 int initrd_size; 65 ram_addr_t initrd_offset; 66 uint64_t kernel_entry, kernel_low, kernel_high; 67 unsigned int cmdline; 68 69 /* Load the kernel. */ 70 if (!kernel_filename) { 71 fprintf(stderr, "Kernel image must be specified\n"); 72 exit(1); 73 } 74 if (load_elf(kernel_filename, VIRT_TO_PHYS_ADDEND, 75 (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low, 76 (uint64_t *)&kernel_high) < 0) { 77 fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename); 78 exit(1); 79 } 80 env->active_tc.PC = (int32_t)kernel_entry; 81 82 /* load initrd */ 83 initrd_size = 0; 84 initrd_offset = 0; 85 if (initrd_filename) { 86 initrd_size = get_image_size (initrd_filename); 87 if (initrd_size > 0) { 88 initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK; 89 if (initrd_offset + initrd_size > ram_size) { 90 fprintf(stderr, 91 "qemu: memory too small for initial ram disk '%s'\n", 92 initrd_filename); 93 exit(1); 94 } 95 initrd_size = load_image_targphys(initrd_filename, 96 initrd_offset, 97 ram_size - initrd_offset); 98 99 } 100 if (initrd_size == (target_ulong) -1) { 101 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", 102 initrd_filename); 103 exit(1); 104 } 105 } 106 107 /* Store command line in top page of memory 108 * kernel will copy the command line to a loca buffer 109 */ 110 cmdline = ram_size - TARGET_PAGE_SIZE; 111 char kernel_cmd[1024]; 112 if (initrd_size > 0) 113 sprintf (kernel_cmd, "%s rd_start=0x" TARGET_FMT_lx " rd_size=%li", 114 kernel_cmdline, 115 (hwaddr)PHYS_TO_VIRT(initrd_offset), 116 (long int)initrd_size); 117 else 118 strcpy (kernel_cmd, kernel_cmdline); 119 120 cpu_physical_memory_write(ram_size - TARGET_PAGE_SIZE, (void *)kernel_cmd, strlen(kernel_cmd) + 1); 121 122 #if 0 123 if (initrd_size > 0) 124 sprintf (phys_ram_base+cmdline, "%s rd_start=0x" TARGET_FMT_lx " rd_size=%li", 125 kernel_cmdline, 126 PHYS_TO_VIRT(initrd_offset), initrd_size); 127 else 128 strcpy (phys_ram_base+cmdline, kernel_cmdline); 129 #endif 130 131 env->active_tc.gpr[4] = PHYS_TO_VIRT(cmdline);/* a0 */ 132 env->active_tc.gpr[5] = ram_size; /* a1 */ 133 env->active_tc.gpr[6] = 0; /* a2 */ 134 env->active_tc.gpr[7] = 0; /* a3 */ 135 136 } 137 138 139 static void android_mips_init_(ram_addr_t ram_size, 140 const char *boot_device, 141 const char *kernel_filename, 142 const char *kernel_cmdline, 143 const char *initrd_filename, 144 const char *cpu_model) 145 { 146 CPUOldState *env; 147 qemu_irq *goldfish_pic; 148 int i; 149 ram_addr_t ram_offset; 150 151 if (!cpu_model) 152 cpu_model = "24Kf"; 153 154 env = cpu_init(cpu_model); 155 156 register_savevm(NULL, 157 "cpu", 158 0, 159 MIPS_CPU_SAVE_VERSION, 160 cpu_save, 161 cpu_load, 162 env); 163 164 if (ram_size > GOLDFISH_IO_SPACE) 165 ram_size = GOLDFISH_IO_SPACE; /* avoid overlap of ram and IO regs */ 166 ram_offset = qemu_ram_alloc(NULL, "android_mips", ram_size); 167 cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); 168 169 /* Init internal devices */ 170 cpu_mips_irq_init_cpu(env); 171 cpu_mips_clock_init(env); 172 173 goldfish_pic = goldfish_interrupt_init(GOLDFISH_INTERRUPT, 174 env->irq[2], env->irq[3]); 175 goldfish_device_init(goldfish_pic, GOLDFISH_DEVICES, 0x7f0000, 10, 22); 176 177 goldfish_device_bus_init(GOLDFISH_DEVICEBUS, 1); 178 179 goldfish_timer_and_rtc_init(GOLDFISH_RTC, 3); 180 181 goldfish_tty_add(serial_hds[0], 0, GOLDFISH_TTY, 4); 182 for(i = 1; i < MAX_SERIAL_PORTS; i++) { 183 if(serial_hds[i]) { 184 goldfish_tty_add(serial_hds[i], i, 0, 0); 185 } 186 } 187 188 for(i = 0; i < MAX_NICS; i++) { 189 if (nd_table[i].vlan) { 190 if (nd_table[i].model == NULL 191 || strcmp(nd_table[i].model, "smc91c111") == 0) { 192 struct goldfish_device *smc_device; 193 smc_device = g_malloc0(sizeof(*smc_device)); 194 smc_device->name = "smc91x"; 195 smc_device->id = i; 196 smc_device->size = 0x1000; 197 smc_device->irq_count = 1; 198 goldfish_add_device_no_io(smc_device); 199 smc91c111_init(&nd_table[i], smc_device->base, goldfish_pic[smc_device->irq]); 200 } else { 201 fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model); 202 exit (1); 203 } 204 } 205 } 206 207 goldfish_fb_init(0); 208 #ifdef HAS_AUDIO 209 goldfish_audio_init(GOLDFISH_AUDIO, 0, audio_input_source); 210 #endif 211 { 212 DriveInfo* info = drive_get( IF_IDE, 0, 0 ); 213 if (info != NULL) { 214 goldfish_mmc_init(GOLDFISH_MMC, 0, info->bdrv); 215 } 216 } 217 goldfish_battery_init(android_hw->hw_battery); 218 219 goldfish_add_device_no_io(&event0_device); 220 events_dev_init(event0_device.base, goldfish_pic[event0_device.irq]); 221 222 #ifdef CONFIG_NAND 223 goldfish_add_device_no_io(&nand_device); 224 nand_dev_init(nand_device.base); 225 #endif 226 227 bool newDeviceNaming = 228 (androidHwConfig_getKernelDeviceNaming(android_hw) >= 1); 229 pipe_dev_init(newDeviceNaming); 230 231 android_load_kernel(env, ram_size, kernel_filename, kernel_cmdline, initrd_filename); 232 } 233 234 235 QEMUMachine android_mips_machine = { 236 "android_mips", 237 "MIPS Android Emulator", 238 android_mips_init_, 239 0, 240 0, 241 1, 242 NULL 243 }; 244 245 static void android_mips_init(void) 246 { 247 qemu_register_machine(&android_mips_machine); 248 } 249 250 machine_init(android_mips_init); 251
