1 #ifndef _QEMU_ELF_H 2 #define _QEMU_ELF_H 3 4 #include <inttypes.h> 5 6 /* 32-bit ELF base types. */ 7 typedef uint32_t Elf32_Addr; 8 typedef uint16_t Elf32_Half; 9 typedef uint32_t Elf32_Off; 10 typedef int32_t Elf32_Sword; 11 typedef uint32_t Elf32_Word; 12 13 /* 64-bit ELF base types. */ 14 typedef uint64_t Elf64_Addr; 15 typedef uint16_t Elf64_Half; 16 typedef int16_t Elf64_SHalf; 17 typedef uint64_t Elf64_Off; 18 typedef int32_t Elf64_Sword; 19 typedef uint32_t Elf64_Word; 20 typedef uint64_t Elf64_Xword; 21 typedef int64_t Elf64_Sxword; 22 23 /* These constants are for the segment types stored in the image headers */ 24 #define PT_NULL 0 25 #define PT_LOAD 1 26 #define PT_DYNAMIC 2 27 #define PT_INTERP 3 28 #define PT_NOTE 4 29 #define PT_SHLIB 5 30 #define PT_PHDR 6 31 #define PT_LOPROC 0x70000000 32 #define PT_HIPROC 0x7fffffff 33 #define PT_MIPS_REGINFO 0x70000000 34 #define PT_MIPS_OPTIONS 0x70000001 35 36 /* Flags in the e_flags field of the header */ 37 /* MIPS architecture level. */ 38 #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */ 39 #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */ 40 #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */ 41 #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */ 42 #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ 43 #define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */ 44 #define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */ 45 46 /* The ABI of a file. */ 47 #define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */ 48 #define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */ 49 50 #define EF_MIPS_NOREORDER 0x00000001 51 #define EF_MIPS_PIC 0x00000002 52 #define EF_MIPS_CPIC 0x00000004 53 #define EF_MIPS_ABI2 0x00000020 54 #define EF_MIPS_OPTIONS_FIRST 0x00000080 55 #define EF_MIPS_32BITMODE 0x00000100 56 #define EF_MIPS_ABI 0x0000f000 57 #define EF_MIPS_ARCH 0xf0000000 58 59 /* These constants define the different elf file types */ 60 #define ET_NONE 0 61 #define ET_REL 1 62 #define ET_EXEC 2 63 #define ET_DYN 3 64 #define ET_CORE 4 65 #define ET_LOPROC 0xff00 66 #define ET_HIPROC 0xffff 67 68 /* These constants define the various ELF target machines */ 69 #define EM_NONE 0 70 #define EM_M32 1 71 #define EM_SPARC 2 72 #define EM_386 3 73 #define EM_68K 4 74 #define EM_88K 5 75 #define EM_486 6 /* Perhaps disused */ 76 #define EM_860 7 77 78 #define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */ 79 80 #define EM_MIPS_RS4_BE 10 /* MIPS R4000 big-endian */ 81 82 #define EM_PARISC 15 /* HPPA */ 83 84 #define EM_SPARC32PLUS 18 /* Sun's "v8plus" */ 85 86 #define EM_PPC 20 /* PowerPC */ 87 #define EM_PPC64 21 /* PowerPC64 */ 88 89 #define EM_ARM 40 /* ARM */ 90 91 #define EM_SH 42 /* SuperH */ 92 93 #define EM_SPARCV9 43 /* SPARC v9 64-bit */ 94 95 #define EM_IA_64 50 /* HP/Intel IA-64 */ 96 97 #define EM_X86_64 62 /* AMD x86-64 */ 98 99 #define EM_S390 22 /* IBM S/390 */ 100 101 #define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */ 102 103 #define EM_V850 87 /* NEC v850 */ 104 105 #define EM_H8_300H 47 /* Hitachi H8/300H */ 106 #define EM_H8S 48 /* Hitachi H8S */ 107 #define EM_LATTICEMICO32 138 /* LatticeMico32 */ 108 109 #define EM_OPENRISC 92 /* OpenCores OpenRISC */ 110 111 #define EM_UNICORE32 110 /* UniCore32 */ 112 113 /* 114 * This is an interim value that we will use until the committee comes 115 * up with a final number. 116 */ 117 #define EM_ALPHA 0x9026 118 119 /* Bogus old v850 magic number, used by old tools. */ 120 #define EM_CYGNUS_V850 0x9080 121 122 /* 123 * This is the old interim value for S/390 architecture 124 */ 125 #define EM_S390_OLD 0xA390 126 127 #define EM_MICROBLAZE 189 128 #define EM_MICROBLAZE_OLD 0xBAAB 129 130 #define EM_XTENSA 94 /* Tensilica Xtensa */ 131 132 #define EM_AARCH64 183 133 134 /* This is the info that is needed to parse the dynamic section of the file */ 135 #define DT_NULL 0 136 #define DT_NEEDED 1 137 #define DT_PLTRELSZ 2 138 #define DT_PLTGOT 3 139 #define DT_HASH 4 140 #define DT_STRTAB 5 141 #define DT_SYMTAB 6 142 #define DT_RELA 7 143 #define DT_RELASZ 8 144 #define DT_RELAENT 9 145 #define DT_STRSZ 10 146 #define DT_SYMENT 11 147 #define DT_INIT 12 148 #define DT_FINI 13 149 #define DT_SONAME 14 150 #define DT_RPATH 15 151 #define DT_SYMBOLIC 16 152 #define DT_REL 17 153 #define DT_RELSZ 18 154 #define DT_RELENT 19 155 #define DT_PLTREL 20 156 #define DT_DEBUG 21 157 #define DT_TEXTREL 22 158 #define DT_JMPREL 23 159 #define DT_BINDNOW 24 160 #define DT_INIT_ARRAY 25 161 #define DT_FINI_ARRAY 26 162 #define DT_INIT_ARRAYSZ 27 163 #define DT_FINI_ARRAYSZ 28 164 #define DT_RUNPATH 29 165 #define DT_FLAGS 30 166 #define DT_LOOS 0x6000000d 167 #define DT_HIOS 0x6ffff000 168 #define DT_LOPROC 0x70000000 169 #define DT_HIPROC 0x7fffffff 170 171 /* DT_ entries which fall between DT_VALRNGLO and DT_VALRNDHI use 172 the d_val field of the Elf*_Dyn structure. I.e. they contain scalars. */ 173 #define DT_VALRNGLO 0x6ffffd00 174 #define DT_VALRNGHI 0x6ffffdff 175 176 /* DT_ entries which fall between DT_ADDRRNGLO and DT_ADDRRNGHI use 177 the d_ptr field of the Elf*_Dyn structure. I.e. they contain pointers. */ 178 #define DT_ADDRRNGLO 0x6ffffe00 179 #define DT_ADDRRNGHI 0x6ffffeff 180 181 #define DT_VERSYM 0x6ffffff0 182 #define DT_RELACOUNT 0x6ffffff9 183 #define DT_RELCOUNT 0x6ffffffa 184 #define DT_FLAGS_1 0x6ffffffb 185 #define DT_VERDEF 0x6ffffffc 186 #define DT_VERDEFNUM 0x6ffffffd 187 #define DT_VERNEED 0x6ffffffe 188 #define DT_VERNEEDNUM 0x6fffffff 189 190 #define DT_MIPS_RLD_VERSION 0x70000001 191 #define DT_MIPS_TIME_STAMP 0x70000002 192 #define DT_MIPS_ICHECKSUM 0x70000003 193 #define DT_MIPS_IVERSION 0x70000004 194 #define DT_MIPS_FLAGS 0x70000005 195 #define RHF_NONE 0 196 #define RHF_HARDWAY 1 197 #define RHF_NOTPOT 2 198 #define DT_MIPS_BASE_ADDRESS 0x70000006 199 #define DT_MIPS_CONFLICT 0x70000008 200 #define DT_MIPS_LIBLIST 0x70000009 201 #define DT_MIPS_LOCAL_GOTNO 0x7000000a 202 #define DT_MIPS_CONFLICTNO 0x7000000b 203 #define DT_MIPS_LIBLISTNO 0x70000010 204 #define DT_MIPS_SYMTABNO 0x70000011 205 #define DT_MIPS_UNREFEXTNO 0x70000012 206 #define DT_MIPS_GOTSYM 0x70000013 207 #define DT_MIPS_HIPAGENO 0x70000014 208 #define DT_MIPS_RLD_MAP 0x70000016 209 210 /* This info is needed when parsing the symbol table */ 211 #define STB_LOCAL 0 212 #define STB_GLOBAL 1 213 #define STB_WEAK 2 214 215 #define STT_NOTYPE 0 216 #define STT_OBJECT 1 217 #define STT_FUNC 2 218 #define STT_SECTION 3 219 #define STT_FILE 4 220 221 #define ELF_ST_BIND(x) ((x) >> 4) 222 #define ELF_ST_TYPE(x) (((unsigned int) x) & 0xf) 223 #define ELF_ST_INFO(bind, type) (((bind) << 4) | ((type) & 0xf)) 224 #define ELF32_ST_BIND(x) ELF_ST_BIND(x) 225 #define ELF32_ST_TYPE(x) ELF_ST_TYPE(x) 226 #define ELF64_ST_BIND(x) ELF_ST_BIND(x) 227 #define ELF64_ST_TYPE(x) ELF_ST_TYPE(x) 228 229 /* Symbolic values for the entries in the auxiliary table 230 put on the initial stack */ 231 #define AT_NULL 0 /* end of vector */ 232 #define AT_IGNORE 1 /* entry should be ignored */ 233 #define AT_EXECFD 2 /* file descriptor of program */ 234 #define AT_PHDR 3 /* program headers for program */ 235 #define AT_PHENT 4 /* size of program header entry */ 236 #define AT_PHNUM 5 /* number of program headers */ 237 #define AT_PAGESZ 6 /* system page size */ 238 #define AT_BASE 7 /* base address of interpreter */ 239 #define AT_FLAGS 8 /* flags */ 240 #define AT_ENTRY 9 /* entry point of program */ 241 #define AT_NOTELF 10 /* program is not ELF */ 242 #define AT_UID 11 /* real uid */ 243 #define AT_EUID 12 /* effective uid */ 244 #define AT_GID 13 /* real gid */ 245 #define AT_EGID 14 /* effective gid */ 246 #define AT_PLATFORM 15 /* string identifying CPU for optimizations */ 247 #define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */ 248 #define AT_CLKTCK 17 /* frequency at which times() increments */ 249 #define AT_FPUCW 18 /* info about fpu initialization by kernel */ 250 #define AT_DCACHEBSIZE 19 /* data cache block size */ 251 #define AT_ICACHEBSIZE 20 /* instruction cache block size */ 252 #define AT_UCACHEBSIZE 21 /* unified cache block size */ 253 #define AT_IGNOREPPC 22 /* ppc only; entry should be ignored */ 254 #define AT_SECURE 23 /* boolean, was exec suid-like? */ 255 #define AT_BASE_PLATFORM 24 /* string identifying real platforms */ 256 #define AT_RANDOM 25 /* address of 16 random bytes */ 257 #define AT_EXECFN 31 /* filename of the executable */ 258 #define AT_SYSINFO 32 /* address of kernel entry point */ 259 #define AT_SYSINFO_EHDR 33 /* address of kernel vdso */ 260 #define AT_L1I_CACHESHAPE 34 /* shapes of the caches: */ 261 #define AT_L1D_CACHESHAPE 35 /* bits 0-3: cache associativity. */ 262 #define AT_L2_CACHESHAPE 36 /* bits 4-7: log2 of line size. */ 263 #define AT_L3_CACHESHAPE 37 /* val&~255: cache size. */ 264 265 typedef struct dynamic{ 266 Elf32_Sword d_tag; 267 union{ 268 Elf32_Sword d_val; 269 Elf32_Addr d_ptr; 270 } d_un; 271 } Elf32_Dyn; 272 273 typedef struct { 274 Elf64_Sxword d_tag; /* entry tag value */ 275 union { 276 Elf64_Xword d_val; 277 Elf64_Addr d_ptr; 278 } d_un; 279 } Elf64_Dyn; 280 281 /* The following are used with relocations */ 282 #define ELF32_R_SYM(x) ((x) >> 8) 283 #define ELF32_R_TYPE(x) ((x) & 0xff) 284 285 #define ELF64_R_SYM(i) ((i) >> 32) 286 #define ELF64_R_TYPE(i) ((i) & 0xffffffff) 287 #define ELF64_R_TYPE_DATA(i) (((ELF64_R_TYPE(i) >> 8) ^ 0x00800000) - 0x00800000) 288 289 #define R_386_NONE 0 290 #define R_386_32 1 291 #define R_386_PC32 2 292 #define R_386_GOT32 3 293 #define R_386_PLT32 4 294 #define R_386_COPY 5 295 #define R_386_GLOB_DAT 6 296 #define R_386_JMP_SLOT 7 297 #define R_386_RELATIVE 8 298 #define R_386_GOTOFF 9 299 #define R_386_GOTPC 10 300 #define R_386_NUM 11 301 /* Not a dynamic reloc, so not included in R_386_NUM. Used in TCG. */ 302 #define R_386_PC8 23 303 304 #define R_MIPS_NONE 0 305 #define R_MIPS_16 1 306 #define R_MIPS_32 2 307 #define R_MIPS_REL32 3 308 #define R_MIPS_26 4 309 #define R_MIPS_HI16 5 310 #define R_MIPS_LO16 6 311 #define R_MIPS_GPREL16 7 312 #define R_MIPS_LITERAL 8 313 #define R_MIPS_GOT16 9 314 #define R_MIPS_PC16 10 315 #define R_MIPS_CALL16 11 316 #define R_MIPS_GPREL32 12 317 /* The remaining relocs are defined on Irix, although they are not 318 in the MIPS ELF ABI. */ 319 #define R_MIPS_UNUSED1 13 320 #define R_MIPS_UNUSED2 14 321 #define R_MIPS_UNUSED3 15 322 #define R_MIPS_SHIFT5 16 323 #define R_MIPS_SHIFT6 17 324 #define R_MIPS_64 18 325 #define R_MIPS_GOT_DISP 19 326 #define R_MIPS_GOT_PAGE 20 327 #define R_MIPS_GOT_OFST 21 328 /* 329 * The following two relocation types are specified in the MIPS ABI 330 * conformance guide version 1.2 but not yet in the psABI. 331 */ 332 #define R_MIPS_GOTHI16 22 333 #define R_MIPS_GOTLO16 23 334 #define R_MIPS_SUB 24 335 #define R_MIPS_INSERT_A 25 336 #define R_MIPS_INSERT_B 26 337 #define R_MIPS_DELETE 27 338 #define R_MIPS_HIGHER 28 339 #define R_MIPS_HIGHEST 29 340 /* 341 * The following two relocation types are specified in the MIPS ABI 342 * conformance guide version 1.2 but not yet in the psABI. 343 */ 344 #define R_MIPS_CALLHI16 30 345 #define R_MIPS_CALLLO16 31 346 /* 347 * This range is reserved for vendor specific relocations. 348 */ 349 #define R_MIPS_LOVENDOR 100 350 #define R_MIPS_HIVENDOR 127 351 352 353 /* SUN SPARC specific definitions. */ 354 355 /* Values for Elf64_Ehdr.e_flags. */ 356 357 #define EF_SPARCV9_MM 3 358 #define EF_SPARCV9_TSO 0 359 #define EF_SPARCV9_PSO 1 360 #define EF_SPARCV9_RMO 2 361 #define EF_SPARC_LEDATA 0x800000 /* little endian data */ 362 #define EF_SPARC_EXT_MASK 0xFFFF00 363 #define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */ 364 #define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */ 365 #define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */ 366 #define EF_SPARC_SUN_US3 0x000800 /* Sun UltraSPARCIII extensions */ 367 368 /* 369 * Sparc ELF relocation types 370 */ 371 #define R_SPARC_NONE 0 372 #define R_SPARC_8 1 373 #define R_SPARC_16 2 374 #define R_SPARC_32 3 375 #define R_SPARC_DISP8 4 376 #define R_SPARC_DISP16 5 377 #define R_SPARC_DISP32 6 378 #define R_SPARC_WDISP30 7 379 #define R_SPARC_WDISP22 8 380 #define R_SPARC_HI22 9 381 #define R_SPARC_22 10 382 #define R_SPARC_13 11 383 #define R_SPARC_LO10 12 384 #define R_SPARC_GOT10 13 385 #define R_SPARC_GOT13 14 386 #define R_SPARC_GOT22 15 387 #define R_SPARC_PC10 16 388 #define R_SPARC_PC22 17 389 #define R_SPARC_WPLT30 18 390 #define R_SPARC_COPY 19 391 #define R_SPARC_GLOB_DAT 20 392 #define R_SPARC_JMP_SLOT 21 393 #define R_SPARC_RELATIVE 22 394 #define R_SPARC_UA32 23 395 #define R_SPARC_PLT32 24 396 #define R_SPARC_HIPLT22 25 397 #define R_SPARC_LOPLT10 26 398 #define R_SPARC_PCPLT32 27 399 #define R_SPARC_PCPLT22 28 400 #define R_SPARC_PCPLT10 29 401 #define R_SPARC_10 30 402 #define R_SPARC_11 31 403 #define R_SPARC_64 32 404 #define R_SPARC_OLO10 33 405 #define R_SPARC_HH22 34 406 #define R_SPARC_HM10 35 407 #define R_SPARC_LM22 36 408 #define R_SPARC_WDISP16 40 409 #define R_SPARC_WDISP19 41 410 #define R_SPARC_7 43 411 #define R_SPARC_5 44 412 #define R_SPARC_6 45 413 414 /* Bits present in AT_HWCAP for ARM. */ 415 416 #define HWCAP_ARM_SWP (1 << 0) 417 #define HWCAP_ARM_HALF (1 << 1) 418 #define HWCAP_ARM_THUMB (1 << 2) 419 #define HWCAP_ARM_26BIT (1 << 3) 420 #define HWCAP_ARM_FAST_MULT (1 << 4) 421 #define HWCAP_ARM_FPA (1 << 5) 422 #define HWCAP_ARM_VFP (1 << 6) 423 #define HWCAP_ARM_EDSP (1 << 7) 424 #define HWCAP_ARM_JAVA (1 << 8) 425 #define HWCAP_ARM_IWMMXT (1 << 9) 426 #define HWCAP_ARM_CRUNCH (1 << 10) 427 #define HWCAP_ARM_THUMBEE (1 << 11) 428 #define HWCAP_ARM_NEON (1 << 12) 429 #define HWCAP_ARM_VFPv3 (1 << 13) 430 #define HWCAP_ARM_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ 431 #define HWCAP_ARM_TLS (1 << 15) 432 #define HWCAP_ARM_VFPv4 (1 << 16) 433 #define HWCAP_ARM_IDIVA (1 << 17) 434 #define HWCAP_ARM_IDIVT (1 << 18) 435 #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) 436 #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs */ 437 #define HWCAP_LPAE (1 << 20) 438 439 /* Bits present in AT_HWCAP for PowerPC. */ 440 441 #define PPC_FEATURE_32 0x80000000 442 #define PPC_FEATURE_64 0x40000000 443 #define PPC_FEATURE_601_INSTR 0x20000000 444 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000 445 #define PPC_FEATURE_HAS_FPU 0x08000000 446 #define PPC_FEATURE_HAS_MMU 0x04000000 447 #define PPC_FEATURE_HAS_4xxMAC 0x02000000 448 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000 449 #define PPC_FEATURE_HAS_SPE 0x00800000 450 #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 451 #define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 452 #define PPC_FEATURE_NO_TB 0x00100000 453 #define PPC_FEATURE_POWER4 0x00080000 454 #define PPC_FEATURE_POWER5 0x00040000 455 #define PPC_FEATURE_POWER5_PLUS 0x00020000 456 #define PPC_FEATURE_CELL 0x00010000 457 #define PPC_FEATURE_BOOKE 0x00008000 458 #define PPC_FEATURE_SMT 0x00004000 459 #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 460 #define PPC_FEATURE_ARCH_2_05 0x00001000 461 #define PPC_FEATURE_PA6T 0x00000800 462 #define PPC_FEATURE_HAS_DFP 0x00000400 463 #define PPC_FEATURE_POWER6_EXT 0x00000200 464 #define PPC_FEATURE_ARCH_2_06 0x00000100 465 #define PPC_FEATURE_HAS_VSX 0x00000080 466 467 #define PPC_FEATURE_PSERIES_PERFMON_COMPAT \ 468 0x00000040 469 470 #define PPC_FEATURE_TRUE_LE 0x00000002 471 #define PPC_FEATURE_PPC_LE 0x00000001 472 473 /* Bits present in AT_HWCAP, primarily for Sparc32. */ 474 475 #define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ 476 #define HWCAP_SPARC_STBAR 2 477 #define HWCAP_SPARC_SWAP 4 478 #define HWCAP_SPARC_MULDIV 8 479 #define HWCAP_SPARC_V9 16 480 #define HWCAP_SPARC_ULTRA3 32 481 482 /* Bits present in AT_HWCAP for s390. */ 483 484 #define HWCAP_S390_ESAN3 1 485 #define HWCAP_S390_ZARCH 2 486 #define HWCAP_S390_STFLE 4 487 #define HWCAP_S390_MSA 8 488 #define HWCAP_S390_LDISP 16 489 #define HWCAP_S390_EIMM 32 490 #define HWCAP_S390_DFP 64 491 #define HWCAP_S390_HPAGE 128 492 #define HWCAP_S390_ETF3EH 256 493 #define HWCAP_S390_HIGH_GPRS 512 494 #define HWCAP_S390_TE 1024 495 496 /* 497 * 68k ELF relocation types 498 */ 499 #define R_68K_NONE 0 500 #define R_68K_32 1 501 #define R_68K_16 2 502 #define R_68K_8 3 503 #define R_68K_PC32 4 504 #define R_68K_PC16 5 505 #define R_68K_PC8 6 506 #define R_68K_GOT32 7 507 #define R_68K_GOT16 8 508 #define R_68K_GOT8 9 509 #define R_68K_GOT32O 10 510 #define R_68K_GOT16O 11 511 #define R_68K_GOT8O 12 512 #define R_68K_PLT32 13 513 #define R_68K_PLT16 14 514 #define R_68K_PLT8 15 515 #define R_68K_PLT32O 16 516 #define R_68K_PLT16O 17 517 #define R_68K_PLT8O 18 518 #define R_68K_COPY 19 519 #define R_68K_GLOB_DAT 20 520 #define R_68K_JMP_SLOT 21 521 #define R_68K_RELATIVE 22 522 523 /* 524 * Alpha ELF relocation types 525 */ 526 #define R_ALPHA_NONE 0 /* No reloc */ 527 #define R_ALPHA_REFLONG 1 /* Direct 32 bit */ 528 #define R_ALPHA_REFQUAD 2 /* Direct 64 bit */ 529 #define R_ALPHA_GPREL32 3 /* GP relative 32 bit */ 530 #define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */ 531 #define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */ 532 #define R_ALPHA_GPDISP 6 /* Add displacement to GP */ 533 #define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */ 534 #define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */ 535 #define R_ALPHA_SREL16 9 /* PC relative 16 bit */ 536 #define R_ALPHA_SREL32 10 /* PC relative 32 bit */ 537 #define R_ALPHA_SREL64 11 /* PC relative 64 bit */ 538 #define R_ALPHA_GPRELHIGH 17 /* GP relative 32 bit, high 16 bits */ 539 #define R_ALPHA_GPRELLOW 18 /* GP relative 32 bit, low 16 bits */ 540 #define R_ALPHA_GPREL16 19 /* GP relative 16 bit */ 541 #define R_ALPHA_COPY 24 /* Copy symbol at runtime */ 542 #define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */ 543 #define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */ 544 #define R_ALPHA_RELATIVE 27 /* Adjust by program base */ 545 #define R_ALPHA_BRSGP 28 546 #define R_ALPHA_TLSGD 29 547 #define R_ALPHA_TLS_LDM 30 548 #define R_ALPHA_DTPMOD64 31 549 #define R_ALPHA_GOTDTPREL 32 550 #define R_ALPHA_DTPREL64 33 551 #define R_ALPHA_DTPRELHI 34 552 #define R_ALPHA_DTPRELLO 35 553 #define R_ALPHA_DTPREL16 36 554 #define R_ALPHA_GOTTPREL 37 555 #define R_ALPHA_TPREL64 38 556 #define R_ALPHA_TPRELHI 39 557 #define R_ALPHA_TPRELLO 40 558 #define R_ALPHA_TPREL16 41 559 560 #define SHF_ALPHA_GPREL 0x10000000 561 562 563 /* PowerPC relocations defined by the ABIs */ 564 #define R_PPC_NONE 0 565 #define R_PPC_ADDR32 1 /* 32bit absolute address */ 566 #define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */ 567 #define R_PPC_ADDR16 3 /* 16bit absolute address */ 568 #define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */ 569 #define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */ 570 #define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */ 571 #define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */ 572 #define R_PPC_ADDR14_BRTAKEN 8 573 #define R_PPC_ADDR14_BRNTAKEN 9 574 #define R_PPC_REL24 10 /* PC relative 26 bit */ 575 #define R_PPC_REL14 11 /* PC relative 16 bit */ 576 #define R_PPC_REL14_BRTAKEN 12 577 #define R_PPC_REL14_BRNTAKEN 13 578 #define R_PPC_GOT16 14 579 #define R_PPC_GOT16_LO 15 580 #define R_PPC_GOT16_HI 16 581 #define R_PPC_GOT16_HA 17 582 #define R_PPC_PLTREL24 18 583 #define R_PPC_COPY 19 584 #define R_PPC_GLOB_DAT 20 585 #define R_PPC_JMP_SLOT 21 586 #define R_PPC_RELATIVE 22 587 #define R_PPC_LOCAL24PC 23 588 #define R_PPC_UADDR32 24 589 #define R_PPC_UADDR16 25 590 #define R_PPC_REL32 26 591 #define R_PPC_PLT32 27 592 #define R_PPC_PLTREL32 28 593 #define R_PPC_PLT16_LO 29 594 #define R_PPC_PLT16_HI 30 595 #define R_PPC_PLT16_HA 31 596 #define R_PPC_SDAREL16 32 597 #define R_PPC_SECTOFF 33 598 #define R_PPC_SECTOFF_LO 34 599 #define R_PPC_SECTOFF_HI 35 600 #define R_PPC_SECTOFF_HA 36 601 /* Keep this the last entry. */ 602 #ifndef R_PPC_NUM 603 #define R_PPC_NUM 37 604 #endif 605 606 /* ARM specific declarations */ 607 608 /* Processor specific flags for the ELF header e_flags field. */ 609 #define EF_ARM_RELEXEC 0x01 610 #define EF_ARM_HASENTRY 0x02 611 #define EF_ARM_INTERWORK 0x04 612 #define EF_ARM_APCS_26 0x08 613 #define EF_ARM_APCS_FLOAT 0x10 614 #define EF_ARM_PIC 0x20 615 #define EF_ALIGN8 0x40 /* 8-bit structure alignment is in use */ 616 #define EF_NEW_ABI 0x80 617 #define EF_OLD_ABI 0x100 618 #define EF_ARM_SOFT_FLOAT 0x200 619 #define EF_ARM_VFP_FLOAT 0x400 620 #define EF_ARM_MAVERICK_FLOAT 0x800 621 622 /* Other constants defined in the ARM ELF spec. version B-01. */ 623 #define EF_ARM_SYMSARESORTED 0x04 /* NB conflicts with EF_INTERWORK */ 624 #define EF_ARM_DYNSYMSUSESEGIDX 0x08 /* NB conflicts with EF_APCS26 */ 625 #define EF_ARM_MAPSYMSFIRST 0x10 /* NB conflicts with EF_APCS_FLOAT */ 626 #define EF_ARM_EABIMASK 0xFF000000 627 628 /* Constants defined in AAELF. */ 629 #define EF_ARM_BE8 0x00800000 630 #define EF_ARM_LE8 0x00400000 631 632 #define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK) 633 #define EF_ARM_EABI_UNKNOWN 0x00000000 634 #define EF_ARM_EABI_VER1 0x01000000 635 #define EF_ARM_EABI_VER2 0x02000000 636 #define EF_ARM_EABI_VER3 0x03000000 637 #define EF_ARM_EABI_VER4 0x04000000 638 #define EF_ARM_EABI_VER5 0x05000000 639 640 /* Additional symbol types for Thumb */ 641 #define STT_ARM_TFUNC 0xd 642 643 /* ARM-specific values for sh_flags */ 644 #define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */ 645 #define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined 646 in the input to a link step */ 647 648 /* ARM-specific program header flags */ 649 #define PF_ARM_SB 0x10000000 /* Segment contains the location 650 addressed by the static base */ 651 652 /* ARM relocs. */ 653 #define R_ARM_NONE 0 /* No reloc */ 654 #define R_ARM_PC24 1 /* PC relative 26 bit branch */ 655 #define R_ARM_ABS32 2 /* Direct 32 bit */ 656 #define R_ARM_REL32 3 /* PC relative 32 bit */ 657 #define R_ARM_PC13 4 658 #define R_ARM_ABS16 5 /* Direct 16 bit */ 659 #define R_ARM_ABS12 6 /* Direct 12 bit */ 660 #define R_ARM_THM_ABS5 7 661 #define R_ARM_ABS8 8 /* Direct 8 bit */ 662 #define R_ARM_SBREL32 9 663 #define R_ARM_THM_PC22 10 664 #define R_ARM_THM_PC8 11 665 #define R_ARM_AMP_VCALL9 12 666 #define R_ARM_SWI24 13 667 #define R_ARM_THM_SWI8 14 668 #define R_ARM_XPC25 15 669 #define R_ARM_THM_XPC22 16 670 #define R_ARM_COPY 20 /* Copy symbol at runtime */ 671 #define R_ARM_GLOB_DAT 21 /* Create GOT entry */ 672 #define R_ARM_JUMP_SLOT 22 /* Create PLT entry */ 673 #define R_ARM_RELATIVE 23 /* Adjust by program base */ 674 #define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */ 675 #define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */ 676 #define R_ARM_GOT32 26 /* 32 bit GOT entry */ 677 #define R_ARM_PLT32 27 /* 32 bit PLT address */ 678 #define R_ARM_CALL 28 679 #define R_ARM_JUMP24 29 680 #define R_ARM_GNU_VTENTRY 100 681 #define R_ARM_GNU_VTINHERIT 101 682 #define R_ARM_THM_PC11 102 /* thumb unconditional branch */ 683 #define R_ARM_THM_PC9 103 /* thumb conditional branch */ 684 #define R_ARM_RXPC25 249 685 #define R_ARM_RSBREL32 250 686 #define R_ARM_THM_RPC22 251 687 #define R_ARM_RREL32 252 688 #define R_ARM_RABS22 253 689 #define R_ARM_RPC24 254 690 #define R_ARM_RBASE 255 691 /* Keep this the last entry. */ 692 #define R_ARM_NUM 256 693 694 /* ARM Aarch64 relocation types */ 695 #define R_AARCH64_NONE 256 /* also accepts R_ARM_NONE (0) */ 696 /* static data relocations */ 697 #define R_AARCH64_ABS64 257 698 #define R_AARCH64_ABS32 258 699 #define R_AARCH64_ABS16 259 700 #define R_AARCH64_PREL64 260 701 #define R_AARCH64_PREL32 261 702 #define R_AARCH64_PREL16 262 703 /* static aarch64 group relocations */ 704 /* group relocs to create unsigned data value or address inline */ 705 #define R_AARCH64_MOVW_UABS_G0 263 706 #define R_AARCH64_MOVW_UABS_G0_NC 264 707 #define R_AARCH64_MOVW_UABS_G1 265 708 #define R_AARCH64_MOVW_UABS_G1_NC 266 709 #define R_AARCH64_MOVW_UABS_G2 267 710 #define R_AARCH64_MOVW_UABS_G2_NC 268 711 #define R_AARCH64_MOVW_UABS_G3 269 712 /* group relocs to create signed data or offset value inline */ 713 #define R_AARCH64_MOVW_SABS_G0 270 714 #define R_AARCH64_MOVW_SABS_G1 271 715 #define R_AARCH64_MOVW_SABS_G2 272 716 /* relocs to generate 19, 21, and 33 bit PC-relative addresses */ 717 #define R_AARCH64_LD_PREL_LO19 273 718 #define R_AARCH64_ADR_PREL_LO21 274 719 #define R_AARCH64_ADR_PREL_PG_HI21 275 720 #define R_AARCH64_ADR_PREL_PG_HI21_NC 276 721 #define R_AARCH64_ADD_ABS_LO12_NC 277 722 #define R_AARCH64_LDST8_ABS_LO12_NC 278 723 #define R_AARCH64_LDST16_ABS_LO12_NC 284 724 #define R_AARCH64_LDST32_ABS_LO12_NC 285 725 #define R_AARCH64_LDST64_ABS_LO12_NC 286 726 #define R_AARCH64_LDST128_ABS_LO12_NC 299 727 /* relocs for control-flow - all offsets as multiple of 4 */ 728 #define R_AARCH64_TSTBR14 279 729 #define R_AARCH64_CONDBR19 280 730 #define R_AARCH64_JUMP26 282 731 #define R_AARCH64_CALL26 283 732 /* group relocs to create pc-relative offset inline */ 733 #define R_AARCH64_MOVW_PREL_G0 287 734 #define R_AARCH64_MOVW_PREL_G0_NC 288 735 #define R_AARCH64_MOVW_PREL_G1 289 736 #define R_AARCH64_MOVW_PREL_G1_NC 290 737 #define R_AARCH64_MOVW_PREL_G2 291 738 #define R_AARCH64_MOVW_PREL_G2_NC 292 739 #define R_AARCH64_MOVW_PREL_G3 293 740 /* group relocs to create a GOT-relative offset inline */ 741 #define R_AARCH64_MOVW_GOTOFF_G0 300 742 #define R_AARCH64_MOVW_GOTOFF_G0_NC 301 743 #define R_AARCH64_MOVW_GOTOFF_G1 302 744 #define R_AARCH64_MOVW_GOTOFF_G1_NC 303 745 #define R_AARCH64_MOVW_GOTOFF_G2 304 746 #define R_AARCH64_MOVW_GOTOFF_G2_NC 305 747 #define R_AARCH64_MOVW_GOTOFF_G3 306 748 /* GOT-relative data relocs */ 749 #define R_AARCH64_GOTREL64 307 750 #define R_AARCH64_GOTREL32 308 751 /* GOT-relative instr relocs */ 752 #define R_AARCH64_GOT_LD_PREL19 309 753 #define R_AARCH64_LD64_GOTOFF_LO15 310 754 #define R_AARCH64_ADR_GOT_PAGE 311 755 #define R_AARCH64_LD64_GOT_LO12_NC 312 756 #define R_AARCH64_LD64_GOTPAGE_LO15 313 757 /* General Dynamic TLS relocations */ 758 #define R_AARCH64_TLSGD_ADR_PREL21 512 759 #define R_AARCH64_TLSGD_ADR_PAGE21 513 760 #define R_AARCH64_TLSGD_ADD_LO12_NC 514 761 #define R_AARCH64_TLSGD_MOVW_G1 515 762 #define R_AARCH64_TLSGD_MOVW_G0_NC 516 763 /* Local Dynamic TLS relocations */ 764 #define R_AARCH64_TLSLD_ADR_PREL21 517 765 #define R_AARCH64_TLSLD_ADR_PAGE21 518 766 #define R_AARCH64_TLSLD_ADD_LO12_NC 519 767 #define R_AARCH64_TLSLD_MOVW_G1 520 768 #define R_AARCH64_TLSLD_MOVW_G0_NC 521 769 #define R_AARCH64_TLSLD_LD_PREL19 522 770 #define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523 771 #define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524 772 #define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC 525 773 #define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526 774 #define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC 527 775 #define R_AARCH64_TLSLD_ADD_DTPREL_HI12 528 776 #define R_AARCH64_TLSLD_ADD_DTPREL_LO12 529 777 #define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 530 778 #define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531 779 #define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC 532 780 #define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533 781 #define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534 782 #define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535 783 #define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536 784 #define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537 785 #define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538 786 /* initial exec TLS relocations */ 787 #define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539 788 #define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540 789 #define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541 790 #define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542 791 #define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543 792 /* local exec TLS relocations */ 793 #define R_AARCH64_TLSLE_MOVW_TPREL_G2 544 794 #define R_AARCH64_TLSLE_MOVW_TPREL_G1 545 795 #define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC 546 796 #define R_AARCH64_TLSLE_MOVW_TPREL_G0 547 797 #define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC 548 798 #define R_AARCH64_TLSLE_ADD_TPREL_HI12 549 799 #define R_AARCH64_TLSLE_ADD_TPREL_LO12 550 800 #define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC 551 801 #define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552 802 #define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC 553 803 #define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554 804 #define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC 555 805 #define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556 806 #define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC 557 807 #define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558 808 #define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC 559 809 /* Dynamic Relocations */ 810 #define R_AARCH64_COPY 1024 811 #define R_AARCH64_GLOB_DAT 1025 812 #define R_AARCH64_JUMP_SLOT 1026 813 #define R_AARCH64_RELATIVE 1027 814 #define R_AARCH64_TLS_DTPREL64 1028 815 #define R_AARCH64_TLS_DTPMOD64 1029 816 #define R_AARCH64_TLS_TPREL64 1030 817 #define R_AARCH64_TLS_DTPREL32 1031 818 #define R_AARCH64_TLS_DTPMOD32 1032 819 #define R_AARCH64_TLS_TPREL32 1033 820 821 /* s390 relocations defined by the ABIs */ 822 #define R_390_NONE 0 /* No reloc. */ 823 #define R_390_8 1 /* Direct 8 bit. */ 824 #define R_390_12 2 /* Direct 12 bit. */ 825 #define R_390_16 3 /* Direct 16 bit. */ 826 #define R_390_32 4 /* Direct 32 bit. */ 827 #define R_390_PC32 5 /* PC relative 32 bit. */ 828 #define R_390_GOT12 6 /* 12 bit GOT offset. */ 829 #define R_390_GOT32 7 /* 32 bit GOT offset. */ 830 #define R_390_PLT32 8 /* 32 bit PC relative PLT address. */ 831 #define R_390_COPY 9 /* Copy symbol at runtime. */ 832 #define R_390_GLOB_DAT 10 /* Create GOT entry. */ 833 #define R_390_JMP_SLOT 11 /* Create PLT entry. */ 834 #define R_390_RELATIVE 12 /* Adjust by program base. */ 835 #define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */ 836 #define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */ 837 #define R_390_GOT16 15 /* 16 bit GOT offset. */ 838 #define R_390_PC16 16 /* PC relative 16 bit. */ 839 #define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */ 840 #define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */ 841 #define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */ 842 #define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */ 843 #define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */ 844 #define R_390_64 22 /* Direct 64 bit. */ 845 #define R_390_PC64 23 /* PC relative 64 bit. */ 846 #define R_390_GOT64 24 /* 64 bit GOT offset. */ 847 #define R_390_PLT64 25 /* 64 bit PC relative PLT address. */ 848 #define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */ 849 #define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */ 850 #define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */ 851 #define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */ 852 #define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */ 853 #define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */ 854 #define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */ 855 #define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */ 856 #define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */ 857 #define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */ 858 #define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */ 859 #define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */ 860 #define R_390_TLS_GDCALL 38 /* Tag for function call in general 861 dynamic TLS code. */ 862 #define R_390_TLS_LDCALL 39 /* Tag for function call in local 863 dynamic TLS code. */ 864 #define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic 865 thread local data. */ 866 #define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic 867 thread local data. */ 868 #define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS 869 block offset. */ 870 #define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS 871 block offset. */ 872 #define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS 873 block offset. */ 874 #define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic 875 thread local data in LD code. */ 876 #define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic 877 thread local data in LD code. */ 878 #define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for 879 negated static TLS block offset. */ 880 #define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for 881 negated static TLS block offset. */ 882 #define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for 883 negated static TLS block offset. */ 884 #define R_390_TLS_LE32 50 /* 32 bit negated offset relative to 885 static TLS block. */ 886 #define R_390_TLS_LE64 51 /* 64 bit negated offset relative to 887 static TLS block. */ 888 #define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS 889 block. */ 890 #define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS 891 block. */ 892 #define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */ 893 #define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */ 894 #define R_390_TLS_TPOFF 56 /* Negate offset in static TLS 895 block. */ 896 /* Keep this the last entry. */ 897 #define R_390_NUM 57 898 899 /* x86-64 relocation types */ 900 #define R_X86_64_NONE 0 /* No reloc */ 901 #define R_X86_64_64 1 /* Direct 64 bit */ 902 #define R_X86_64_PC32 2 /* PC relative 32 bit signed */ 903 #define R_X86_64_GOT32 3 /* 32 bit GOT entry */ 904 #define R_X86_64_PLT32 4 /* 32 bit PLT address */ 905 #define R_X86_64_COPY 5 /* Copy symbol at runtime */ 906 #define R_X86_64_GLOB_DAT 6 /* Create GOT entry */ 907 #define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */ 908 #define R_X86_64_RELATIVE 8 /* Adjust by program base */ 909 #define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative 910 offset to GOT */ 911 #define R_X86_64_32 10 /* Direct 32 bit zero extended */ 912 #define R_X86_64_32S 11 /* Direct 32 bit sign extended */ 913 #define R_X86_64_16 12 /* Direct 16 bit zero extended */ 914 #define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */ 915 #define R_X86_64_8 14 /* Direct 8 bit sign extended */ 916 #define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */ 917 918 #define R_X86_64_NUM 16 919 920 /* Legal values for e_flags field of Elf64_Ehdr. */ 921 922 #define EF_ALPHA_32BIT 1 /* All addresses are below 2GB */ 923 924 /* HPPA specific definitions. */ 925 926 /* Legal values for e_flags field of Elf32_Ehdr. */ 927 928 #define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */ 929 #define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */ 930 #define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */ 931 #define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */ 932 #define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch 933 prediction. */ 934 #define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */ 935 #define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */ 936 937 /* Defined values for `e_flags & EF_PARISC_ARCH' are: */ 938 939 #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */ 940 #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */ 941 #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */ 942 943 /* Additional section indeces. */ 944 945 #define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared 946 symbols in ANSI C. */ 947 #define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */ 948 949 /* Legal values for sh_type field of Elf32_Shdr. */ 950 951 #define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */ 952 #define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */ 953 #define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */ 954 955 /* Legal values for sh_flags field of Elf32_Shdr. */ 956 957 #define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */ 958 #define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */ 959 #define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */ 960 961 /* Legal values for ST_TYPE subfield of st_info (symbol type). */ 962 963 #define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */ 964 965 #define STT_HP_OPAQUE (STT_LOOS + 0x1) 966 #define STT_HP_STUB (STT_LOOS + 0x2) 967 968 /* HPPA relocs. */ 969 970 #define R_PARISC_NONE 0 /* No reloc. */ 971 #define R_PARISC_DIR32 1 /* Direct 32-bit reference. */ 972 #define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */ 973 #define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */ 974 #define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */ 975 #define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */ 976 #define R_PARISC_PCREL32 9 /* 32-bit rel. address. */ 977 #define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */ 978 #define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */ 979 #define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */ 980 #define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */ 981 #define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */ 982 #define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */ 983 #define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */ 984 #define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */ 985 #define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */ 986 #define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */ 987 #define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */ 988 #define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */ 989 #define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */ 990 #define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */ 991 #define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */ 992 #define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */ 993 #define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */ 994 #define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */ 995 #define R_PARISC_FPTR64 64 /* 64 bits function address. */ 996 #define R_PARISC_PLABEL32 65 /* 32 bits function address. */ 997 #define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */ 998 #define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */ 999 #define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */ 1000 #define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */ 1001 #define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */ 1002 #define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */ 1003 #define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */ 1004 #define R_PARISC_DIR64 80 /* 64 bits of eff. address. */ 1005 #define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */ 1006 #define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */ 1007 #define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */ 1008 #define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */ 1009 #define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */ 1010 #define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */ 1011 #define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */ 1012 #define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */ 1013 #define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */ 1014 #define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */ 1015 #define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */ 1016 #define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */ 1017 #define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */ 1018 #define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */ 1019 #define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */ 1020 #define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */ 1021 #define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */ 1022 #define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */ 1023 #define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */ 1024 #define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */ 1025 #define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */ 1026 #define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */ 1027 #define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */ 1028 #define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */ 1029 #define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */ 1030 #define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */ 1031 #define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */ 1032 #define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */ 1033 #define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */ 1034 #define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */ 1035 #define R_PARISC_LORESERVE 128 1036 #define R_PARISC_COPY 128 /* Copy relocation. */ 1037 #define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */ 1038 #define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */ 1039 #define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */ 1040 #define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */ 1041 #define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */ 1042 #define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */ 1043 #define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/ 1044 #define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */ 1045 #define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */ 1046 #define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */ 1047 #define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */ 1048 #define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */ 1049 #define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */ 1050 #define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */ 1051 #define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */ 1052 #define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/ 1053 #define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/ 1054 #define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */ 1055 #define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */ 1056 #define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */ 1057 #define R_PARISC_HIRESERVE 255 1058 1059 /* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */ 1060 1061 #define PT_HP_TLS (PT_LOOS + 0x0) 1062 #define PT_HP_CORE_NONE (PT_LOOS + 0x1) 1063 #define PT_HP_CORE_VERSION (PT_LOOS + 0x2) 1064 #define PT_HP_CORE_KERNEL (PT_LOOS + 0x3) 1065 #define PT_HP_CORE_COMM (PT_LOOS + 0x4) 1066 #define PT_HP_CORE_PROC (PT_LOOS + 0x5) 1067 #define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6) 1068 #define PT_HP_CORE_STACK (PT_LOOS + 0x7) 1069 #define PT_HP_CORE_SHM (PT_LOOS + 0x8) 1070 #define PT_HP_CORE_MMF (PT_LOOS + 0x9) 1071 #define PT_HP_PARALLEL (PT_LOOS + 0x10) 1072 #define PT_HP_FASTBIND (PT_LOOS + 0x11) 1073 #define PT_HP_OPT_ANNOT (PT_LOOS + 0x12) 1074 #define PT_HP_HSL_ANNOT (PT_LOOS + 0x13) 1075 #define PT_HP_STACK (PT_LOOS + 0x14) 1076 1077 #define PT_PARISC_ARCHEXT 0x70000000 1078 #define PT_PARISC_UNWIND 0x70000001 1079 1080 /* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */ 1081 1082 #define PF_PARISC_SBP 0x08000000 1083 1084 #define PF_HP_PAGE_SIZE 0x00100000 1085 #define PF_HP_FAR_SHARED 0x00200000 1086 #define PF_HP_NEAR_SHARED 0x00400000 1087 #define PF_HP_CODE 0x01000000 1088 #define PF_HP_MODIFY 0x02000000 1089 #define PF_HP_LAZYSWAP 0x04000000 1090 #define PF_HP_SBP 0x08000000 1091 1092 /* IA-64 specific declarations. */ 1093 1094 /* Processor specific flags for the Ehdr e_flags field. */ 1095 #define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */ 1096 #define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */ 1097 #define EF_IA_64_ARCH 0xff000000 /* arch. version mask */ 1098 1099 /* Processor specific values for the Phdr p_type field. */ 1100 #define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* arch extension bits */ 1101 #define PT_IA_64_UNWIND (PT_LOPROC + 1) /* ia64 unwind bits */ 1102 1103 /* Processor specific flags for the Phdr p_flags field. */ 1104 #define PF_IA_64_NORECOV 0x80000000 /* spec insns w/o recovery */ 1105 1106 /* Processor specific values for the Shdr sh_type field. */ 1107 #define SHT_IA_64_EXT (SHT_LOPROC + 0) /* extension bits */ 1108 #define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* unwind bits */ 1109 1110 /* Processor specific flags for the Shdr sh_flags field. */ 1111 #define SHF_IA_64_SHORT 0x10000000 /* section near gp */ 1112 #define SHF_IA_64_NORECOV 0x20000000 /* spec insns w/o recovery */ 1113 1114 /* Processor specific values for the Dyn d_tag field. */ 1115 #define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0) 1116 #define DT_IA_64_NUM 1 1117 1118 /* IA-64 relocations. */ 1119 #define R_IA64_NONE 0x00 /* none */ 1120 #define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */ 1121 #define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */ 1122 #define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */ 1123 #define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */ 1124 #define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */ 1125 #define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */ 1126 #define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */ 1127 #define R_IA64_GPREL22 0x2a /* @gprel(sym + add), add imm22 */ 1128 #define R_IA64_GPREL64I 0x2b /* @gprel(sym + add), mov imm64 */ 1129 #define R_IA64_GPREL32MSB 0x2c /* @gprel(sym + add), data4 MSB */ 1130 #define R_IA64_GPREL32LSB 0x2d /* @gprel(sym + add), data4 LSB */ 1131 #define R_IA64_GPREL64MSB 0x2e /* @gprel(sym + add), data8 MSB */ 1132 #define R_IA64_GPREL64LSB 0x2f /* @gprel(sym + add), data8 LSB */ 1133 #define R_IA64_LTOFF22 0x32 /* @ltoff(sym + add), add imm22 */ 1134 #define R_IA64_LTOFF64I 0x33 /* @ltoff(sym + add), mov imm64 */ 1135 #define R_IA64_PLTOFF22 0x3a /* @pltoff(sym + add), add imm22 */ 1136 #define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym + add), mov imm64 */ 1137 #define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym + add), data8 MSB */ 1138 #define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym + add), data8 LSB */ 1139 #define R_IA64_FPTR64I 0x43 /* @fptr(sym + add), mov imm64 */ 1140 #define R_IA64_FPTR32MSB 0x44 /* @fptr(sym + add), data4 MSB */ 1141 #define R_IA64_FPTR32LSB 0x45 /* @fptr(sym + add), data4 LSB */ 1142 #define R_IA64_FPTR64MSB 0x46 /* @fptr(sym + add), data8 MSB */ 1143 #define R_IA64_FPTR64LSB 0x47 /* @fptr(sym + add), data8 LSB */ 1144 #define R_IA64_PCREL60B 0x48 /* @pcrel(sym + add), brl */ 1145 #define R_IA64_PCREL21B 0x49 /* @pcrel(sym + add), ptb, call */ 1146 #define R_IA64_PCREL21M 0x4a /* @pcrel(sym + add), chk.s */ 1147 #define R_IA64_PCREL21F 0x4b /* @pcrel(sym + add), fchkf */ 1148 #define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym + add), data4 MSB */ 1149 #define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym + add), data4 LSB */ 1150 #define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym + add), data8 MSB */ 1151 #define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym + add), data8 LSB */ 1152 #define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */ 1153 #define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */ 1154 #define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), data4 MSB */ 1155 #define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), data4 LSB */ 1156 #define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), data8 MSB */ 1157 #define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), data8 LSB */ 1158 #define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym + add), data4 MSB */ 1159 #define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym + add), data4 LSB */ 1160 #define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym + add), data8 MSB */ 1161 #define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym + add), data8 LSB */ 1162 #define R_IA64_SECREL32MSB 0x64 /* @secrel(sym + add), data4 MSB */ 1163 #define R_IA64_SECREL32LSB 0x65 /* @secrel(sym + add), data4 LSB */ 1164 #define R_IA64_SECREL64MSB 0x66 /* @secrel(sym + add), data8 MSB */ 1165 #define R_IA64_SECREL64LSB 0x67 /* @secrel(sym + add), data8 LSB */ 1166 #define R_IA64_REL32MSB 0x6c /* data 4 + REL */ 1167 #define R_IA64_REL32LSB 0x6d /* data 4 + REL */ 1168 #define R_IA64_REL64MSB 0x6e /* data 8 + REL */ 1169 #define R_IA64_REL64LSB 0x6f /* data 8 + REL */ 1170 #define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */ 1171 #define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */ 1172 #define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */ 1173 #define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */ 1174 #define R_IA64_PCREL21BI 0x79 /* @pcrel(sym + add), 21bit inst */ 1175 #define R_IA64_PCREL22 0x7a /* @pcrel(sym + add), 22bit inst */ 1176 #define R_IA64_PCREL64I 0x7b /* @pcrel(sym + add), 64bit inst */ 1177 #define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */ 1178 #define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */ 1179 #define R_IA64_COPY 0x84 /* copy relocation */ 1180 #define R_IA64_SUB 0x85 /* Addend and symbol difference */ 1181 #define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */ 1182 #define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */ 1183 #define R_IA64_TPREL14 0x91 /* @tprel(sym + add), imm14 */ 1184 #define R_IA64_TPREL22 0x92 /* @tprel(sym + add), imm22 */ 1185 #define R_IA64_TPREL64I 0x93 /* @tprel(sym + add), imm64 */ 1186 #define R_IA64_TPREL64MSB 0x96 /* @tprel(sym + add), data8 MSB */ 1187 #define R_IA64_TPREL64LSB 0x97 /* @tprel(sym + add), data8 LSB */ 1188 #define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), imm2 */ 1189 #define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym + add), data8 MSB */ 1190 #define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym + add), data8 LSB */ 1191 #define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(sym + add)), imm22 */ 1192 #define R_IA64_DTPREL14 0xb1 /* @dtprel(sym + add), imm14 */ 1193 #define R_IA64_DTPREL22 0xb2 /* @dtprel(sym + add), imm22 */ 1194 #define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym + add), imm64 */ 1195 #define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym + add), data4 MSB */ 1196 #define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym + add), data4 LSB */ 1197 #define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym + add), data8 MSB */ 1198 #define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym + add), data8 LSB */ 1199 #define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */ 1200 1201 typedef struct elf32_rel { 1202 Elf32_Addr r_offset; 1203 Elf32_Word r_info; 1204 } Elf32_Rel; 1205 1206 typedef struct elf64_rel { 1207 Elf64_Addr r_offset; /* Location at which to apply the action */ 1208 Elf64_Xword r_info; /* index and type of relocation */ 1209 } Elf64_Rel; 1210 1211 typedef struct elf32_rela{ 1212 Elf32_Addr r_offset; 1213 Elf32_Word r_info; 1214 Elf32_Sword r_addend; 1215 } Elf32_Rela; 1216 1217 typedef struct elf64_rela { 1218 Elf64_Addr r_offset; /* Location at which to apply the action */ 1219 Elf64_Xword r_info; /* index and type of relocation */ 1220 Elf64_Sxword r_addend; /* Constant addend used to compute value */ 1221 } Elf64_Rela; 1222 1223 typedef struct elf32_sym{ 1224 Elf32_Word st_name; 1225 Elf32_Addr st_value; 1226 Elf32_Word st_size; 1227 unsigned char st_info; 1228 unsigned char st_other; 1229 Elf32_Half st_shndx; 1230 } Elf32_Sym; 1231 1232 typedef struct elf64_sym { 1233 Elf64_Word st_name; /* Symbol name, index in string tbl */ 1234 unsigned char st_info; /* Type and binding attributes */ 1235 unsigned char st_other; /* No defined meaning, 0 */ 1236 Elf64_Half st_shndx; /* Associated section index */ 1237 Elf64_Addr st_value; /* Value of the symbol */ 1238 Elf64_Xword st_size; /* Associated symbol size */ 1239 } Elf64_Sym; 1240 1241 1242 #define EI_NIDENT 16 1243 1244 /* Special value for e_phnum. This indicates that the real number of 1245 program headers is too large to fit into e_phnum. Instead the real 1246 value is in the field sh_info of section 0. */ 1247 #define PN_XNUM 0xffff 1248 1249 typedef struct elf32_hdr{ 1250 unsigned char e_ident[EI_NIDENT]; 1251 Elf32_Half e_type; 1252 Elf32_Half e_machine; 1253 Elf32_Word e_version; 1254 Elf32_Addr e_entry; /* Entry point */ 1255 Elf32_Off e_phoff; 1256 Elf32_Off e_shoff; 1257 Elf32_Word e_flags; 1258 Elf32_Half e_ehsize; 1259 Elf32_Half e_phentsize; 1260 Elf32_Half e_phnum; 1261 Elf32_Half e_shentsize; 1262 Elf32_Half e_shnum; 1263 Elf32_Half e_shstrndx; 1264 } Elf32_Ehdr; 1265 1266 typedef struct elf64_hdr { 1267 unsigned char e_ident[16]; /* ELF "magic number" */ 1268 Elf64_Half e_type; 1269 Elf64_Half e_machine; 1270 Elf64_Word e_version; 1271 Elf64_Addr e_entry; /* Entry point virtual address */ 1272 Elf64_Off e_phoff; /* Program header table file offset */ 1273 Elf64_Off e_shoff; /* Section header table file offset */ 1274 Elf64_Word e_flags; 1275 Elf64_Half e_ehsize; 1276 Elf64_Half e_phentsize; 1277 Elf64_Half e_phnum; 1278 Elf64_Half e_shentsize; 1279 Elf64_Half e_shnum; 1280 Elf64_Half e_shstrndx; 1281 } Elf64_Ehdr; 1282 1283 /* These constants define the permissions on sections in the program 1284 header, p_flags. */ 1285 #define PF_R 0x4 1286 #define PF_W 0x2 1287 #define PF_X 0x1 1288 1289 typedef struct elf32_phdr{ 1290 Elf32_Word p_type; 1291 Elf32_Off p_offset; 1292 Elf32_Addr p_vaddr; 1293 Elf32_Addr p_paddr; 1294 Elf32_Word p_filesz; 1295 Elf32_Word p_memsz; 1296 Elf32_Word p_flags; 1297 Elf32_Word p_align; 1298 } Elf32_Phdr; 1299 1300 typedef struct elf64_phdr { 1301 Elf64_Word p_type; 1302 Elf64_Word p_flags; 1303 Elf64_Off p_offset; /* Segment file offset */ 1304 Elf64_Addr p_vaddr; /* Segment virtual address */ 1305 Elf64_Addr p_paddr; /* Segment physical address */ 1306 Elf64_Xword p_filesz; /* Segment size in file */ 1307 Elf64_Xword p_memsz; /* Segment size in memory */ 1308 Elf64_Xword p_align; /* Segment alignment, file & memory */ 1309 } Elf64_Phdr; 1310 1311 /* sh_type */ 1312 #define SHT_NULL 0 1313 #define SHT_PROGBITS 1 1314 #define SHT_SYMTAB 2 1315 #define SHT_STRTAB 3 1316 #define SHT_RELA 4 1317 #define SHT_HASH 5 1318 #define SHT_DYNAMIC 6 1319 #define SHT_NOTE 7 1320 #define SHT_NOBITS 8 1321 #define SHT_REL 9 1322 #define SHT_SHLIB 10 1323 #define SHT_DYNSYM 11 1324 #define SHT_NUM 12 1325 #define SHT_LOPROC 0x70000000 1326 #define SHT_HIPROC 0x7fffffff 1327 #define SHT_LOUSER 0x80000000 1328 #define SHT_HIUSER 0xffffffff 1329 #define SHT_MIPS_LIST 0x70000000 1330 #define SHT_MIPS_CONFLICT 0x70000002 1331 #define SHT_MIPS_GPTAB 0x70000003 1332 #define SHT_MIPS_UCODE 0x70000004 1333 1334 /* sh_flags */ 1335 #define SHF_WRITE 0x1 1336 #define SHF_ALLOC 0x2 1337 #define SHF_EXECINSTR 0x4 1338 #define SHF_MASKPROC 0xf0000000 1339 #define SHF_MIPS_GPREL 0x10000000 1340 1341 /* special section indexes */ 1342 #define SHN_UNDEF 0 1343 #define SHN_LORESERVE 0xff00 1344 #define SHN_LOPROC 0xff00 1345 #define SHN_HIPROC 0xff1f 1346 #define SHN_ABS 0xfff1 1347 #define SHN_COMMON 0xfff2 1348 #define SHN_HIRESERVE 0xffff 1349 #define SHN_MIPS_ACCOMON 0xff00 1350 1351 typedef struct elf32_shdr { 1352 Elf32_Word sh_name; 1353 Elf32_Word sh_type; 1354 Elf32_Word sh_flags; 1355 Elf32_Addr sh_addr; 1356 Elf32_Off sh_offset; 1357 Elf32_Word sh_size; 1358 Elf32_Word sh_link; 1359 Elf32_Word sh_info; 1360 Elf32_Word sh_addralign; 1361 Elf32_Word sh_entsize; 1362 } Elf32_Shdr; 1363 1364 typedef struct elf64_shdr { 1365 Elf64_Word sh_name; /* Section name, index in string tbl */ 1366 Elf64_Word sh_type; /* Type of section */ 1367 Elf64_Xword sh_flags; /* Miscellaneous section attributes */ 1368 Elf64_Addr sh_addr; /* Section virtual addr at execution */ 1369 Elf64_Off sh_offset; /* Section file offset */ 1370 Elf64_Xword sh_size; /* Size of section in bytes */ 1371 Elf64_Word sh_link; /* Index of another section */ 1372 Elf64_Word sh_info; /* Additional section information */ 1373 Elf64_Xword sh_addralign; /* Section alignment */ 1374 Elf64_Xword sh_entsize; /* Entry size if section holds table */ 1375 } Elf64_Shdr; 1376 1377 #define EI_MAG0 0 /* e_ident[] indexes */ 1378 #define EI_MAG1 1 1379 #define EI_MAG2 2 1380 #define EI_MAG3 3 1381 #define EI_CLASS 4 1382 #define EI_DATA 5 1383 #define EI_VERSION 6 1384 #define EI_OSABI 7 1385 #define EI_PAD 8 1386 1387 #define ELFOSABI_NONE 0 /* UNIX System V ABI */ 1388 #define ELFOSABI_SYSV 0 /* Alias. */ 1389 #define ELFOSABI_HPUX 1 /* HP-UX */ 1390 #define ELFOSABI_NETBSD 2 /* NetBSD. */ 1391 #define ELFOSABI_LINUX 3 /* Linux. */ 1392 #define ELFOSABI_SOLARIS 6 /* Sun Solaris. */ 1393 #define ELFOSABI_AIX 7 /* IBM AIX. */ 1394 #define ELFOSABI_IRIX 8 /* SGI Irix. */ 1395 #define ELFOSABI_FREEBSD 9 /* FreeBSD. */ 1396 #define ELFOSABI_TRU64 10 /* Compaq TRU64 UNIX. */ 1397 #define ELFOSABI_MODESTO 11 /* Novell Modesto. */ 1398 #define ELFOSABI_OPENBSD 12 /* OpenBSD. */ 1399 #define ELFOSABI_ARM 97 /* ARM */ 1400 #define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */ 1401 1402 #define ELFMAG0 0x7f /* EI_MAG */ 1403 #define ELFMAG1 'E' 1404 #define ELFMAG2 'L' 1405 #define ELFMAG3 'F' 1406 #define ELFMAG "\177ELF" 1407 #define SELFMAG 4 1408 1409 #define ELFCLASSNONE 0 /* EI_CLASS */ 1410 #define ELFCLASS32 1 1411 #define ELFCLASS64 2 1412 #define ELFCLASSNUM 3 1413 1414 #define ELFDATANONE 0 /* e_ident[EI_DATA] */ 1415 #define ELFDATA2LSB 1 1416 #define ELFDATA2MSB 2 1417 1418 #define EV_NONE 0 /* e_version, EI_VERSION */ 1419 #define EV_CURRENT 1 1420 #define EV_NUM 2 1421 1422 /* Notes used in ET_CORE */ 1423 #define NT_PRSTATUS 1 1424 #define NT_FPREGSET 2 1425 #define NT_PRFPREG 2 1426 #define NT_PRPSINFO 3 1427 #define NT_TASKSTRUCT 4 1428 #define NT_AUXV 6 1429 #define NT_PRXFPREG 0x46e62b7f /* copied from gdb5.1/include/elf/common.h */ 1430 #define NT_S390_PREFIX 0x305 /* s390 prefix register */ 1431 #define NT_S390_CTRS 0x304 /* s390 control registers */ 1432 #define NT_S390_TODPREG 0x303 /* s390 TOD programmable register */ 1433 #define NT_S390_TODCMP 0x302 /* s390 TOD clock comparator register */ 1434 #define NT_S390_TIMER 0x301 /* s390 timer register */ 1435 #define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */ 1436 #define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */ 1437 #define NT_PPC_VSX 0x102 /* PowerPC VSX registers */ 1438 1439 1440 /* Note header in a PT_NOTE section */ 1441 typedef struct elf32_note { 1442 Elf32_Word n_namesz; /* Name size */ 1443 Elf32_Word n_descsz; /* Content size */ 1444 Elf32_Word n_type; /* Content type */ 1445 } Elf32_Nhdr; 1446 1447 /* Note header in a PT_NOTE section */ 1448 typedef struct elf64_note { 1449 Elf64_Word n_namesz; /* Name size */ 1450 Elf64_Word n_descsz; /* Content size */ 1451 Elf64_Word n_type; /* Content type */ 1452 } Elf64_Nhdr; 1453 1454 1455 /* This data structure represents a PT_LOAD segment. */ 1456 struct elf32_fdpic_loadseg { 1457 /* Core address to which the segment is mapped. */ 1458 Elf32_Addr addr; 1459 /* VMA recorded in the program header. */ 1460 Elf32_Addr p_vaddr; 1461 /* Size of this segment in memory. */ 1462 Elf32_Word p_memsz; 1463 }; 1464 struct elf32_fdpic_loadmap { 1465 /* Protocol version number, must be zero. */ 1466 Elf32_Half version; 1467 /* Number of segments in this map. */ 1468 Elf32_Half nsegs; 1469 /* The actual memory map. */ 1470 struct elf32_fdpic_loadseg segs[/*nsegs*/]; 1471 }; 1472 1473 #ifdef ELF_CLASS 1474 #if ELF_CLASS == ELFCLASS32 1475 1476 #define elfhdr elf32_hdr 1477 #define elf_phdr elf32_phdr 1478 #define elf_note elf32_note 1479 #define elf_shdr elf32_shdr 1480 #define elf_sym elf32_sym 1481 #define elf_addr_t Elf32_Off 1482 1483 #ifdef ELF_USES_RELOCA 1484 # define ELF_RELOC Elf32_Rela 1485 #else 1486 # define ELF_RELOC Elf32_Rel 1487 #endif 1488 1489 #else 1490 1491 #define elfhdr elf64_hdr 1492 #define elf_phdr elf64_phdr 1493 #define elf_note elf64_note 1494 #define elf_shdr elf64_shdr 1495 #define elf_sym elf64_sym 1496 #define elf_addr_t Elf64_Off 1497 1498 #ifdef ELF_USES_RELOCA 1499 # define ELF_RELOC Elf64_Rela 1500 #else 1501 # define ELF_RELOC Elf64_Rel 1502 #endif 1503 1504 #endif /* ELF_CLASS */ 1505 1506 #ifndef ElfW 1507 # if ELF_CLASS == ELFCLASS32 1508 # define ElfW(x) Elf32_ ## x 1509 # define ELFW(x) ELF32_ ## x 1510 # else 1511 # define ElfW(x) Elf64_ ## x 1512 # define ELFW(x) ELF64_ ## x 1513 # endif 1514 #endif 1515 1516 #endif /* ELF_CLASS */ 1517 1518 1519 #endif /* _QEMU_ELF_H */ 1520
