1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "cpu.h" 5 #include "qemu-common.h" 6 #include "exec/hwaddr.h" 7 8 /* PC-style peripherals (also used by other machines). */ 9 10 /* serial.c */ 11 12 SerialState *serial_init(int base, qemu_irq irq, int baudbase, 13 CharDriverState *chr); 14 SerialState *serial_mm_init (hwaddr base, int it_shift, 15 qemu_irq irq, int baudbase, 16 CharDriverState *chr, int ioregister); 17 uint32_t serial_mm_readb (void *opaque, hwaddr addr); 18 void serial_mm_writeb (void *opaque, hwaddr addr, uint32_t value); 19 uint32_t serial_mm_readw (void *opaque, hwaddr addr); 20 void serial_mm_writew (void *opaque, hwaddr addr, uint32_t value); 21 uint32_t serial_mm_readl (void *opaque, hwaddr addr); 22 void serial_mm_writel (void *opaque, hwaddr addr, uint32_t value); 23 24 /* parallel.c */ 25 26 typedef struct ParallelState ParallelState; 27 ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr); 28 ParallelState *parallel_mm_init(hwaddr base, int it_shift, qemu_irq irq, CharDriverState *chr); 29 30 /* i8259.c */ 31 32 typedef struct PicState2 PicState2; 33 extern PicState2 *isa_pic; 34 void pic_set_irq(int irq, int level); 35 void pic_set_irq_new(void *opaque, int irq, int level); 36 qemu_irq *i8259_init(qemu_irq parent_irq); 37 void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func, 38 void *alt_irq_opaque); 39 int pic_read_irq(PicState2 *s); 40 void pic_update_irq(PicState2 *s); 41 uint32_t pic_intack_read(PicState2 *s); 42 void pic_info(Monitor *mon); 43 void irq_info(Monitor *mon); 44 45 /* APIC */ 46 typedef struct IOAPICState IOAPICState; 47 void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, 48 uint8_t delivery_mode, 49 uint8_t vector_num, uint8_t polarity, 50 uint8_t trigger_mode); 51 int apic_init(CPUOldState *env); 52 int apic_accept_pic_intr(CPUOldState *env); 53 void apic_deliver_pic_intr(CPUOldState *env, int level); 54 int apic_get_interrupt(CPUOldState *env); 55 IOAPICState *ioapic_init(void); 56 void ioapic_set_irq(void *opaque, int vector, int level); 57 void apic_reset_irq_delivered(void); 58 int apic_get_irq_delivered(void); 59 60 /* i8254.c */ 61 62 #define PIT_FREQ 1193182 63 64 typedef struct PITState PITState; 65 66 PITState *pit_init(int base, qemu_irq irq); 67 void pit_set_gate(PITState *pit, int channel, int val); 68 int pit_get_gate(PITState *pit, int channel); 69 int pit_get_initial_count(PITState *pit, int channel); 70 int pit_get_mode(PITState *pit, int channel); 71 int pit_get_out(PITState *pit, int channel, int64_t current_time); 72 73 void hpet_pit_disable(void); 74 void hpet_pit_enable(void); 75 76 /* vmport.c */ 77 void vmport_init(void); 78 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque); 79 80 /* vmmouse.c */ 81 void *vmmouse_init(void *m); 82 83 /* pckbd.c */ 84 85 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 86 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 87 hwaddr base, ram_addr_t size, 88 hwaddr mask); 89 90 /* mc146818rtc.c */ 91 92 typedef struct RTCState RTCState; 93 94 RTCState *rtc_init(int base, qemu_irq irq, int base_year); 95 RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year); 96 RTCState *rtc_mm_init(hwaddr base, int it_shift, qemu_irq irq, 97 int base_year); 98 void rtc_set_memory(RTCState *s, int addr, int val); 99 void rtc_set_date(RTCState *s, const struct tm *tm); 100 void cmos_set_s3_resume(void); 101 102 /* pc.c */ 103 extern int fd_bootchk; 104 105 void ioport_set_a20(int enable); 106 int ioport_get_a20(void); 107 108 /* acpi.c */ 109 extern int acpi_enabled; 110 extern char *acpi_tables; 111 extern size_t acpi_tables_len; 112 113 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 114 qemu_irq sci_irq); 115 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 116 void acpi_bios_init(void); 117 int acpi_table_add(const char *table_desc); 118 119 /* hpet.c */ 120 extern int no_hpet; 121 122 /* pcspk.c */ 123 void pcspk_init(PITState *); 124 int pcspk_audio_init(qemu_irq *pic); 125 126 /* piix_pci.c */ 127 PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic); 128 void i440fx_set_smm(PCIDevice *d, int val); 129 int piix3_init(PCIBus *bus, int devfn); 130 void i440fx_init_memory_mappings(PCIDevice *d); 131 132 extern PCIDevice *piix4_dev; 133 int piix4_init(PCIBus *bus, int devfn); 134 135 /* vga.c */ 136 enum vga_retrace_method { 137 VGA_RETRACE_DUMB, 138 VGA_RETRACE_PRECISE 139 }; 140 141 extern enum vga_retrace_method vga_retrace_method; 142 143 int isa_vga_init(void); 144 int pci_vga_init(PCIBus *bus, 145 unsigned long vga_bios_offset, int vga_bios_size); 146 int isa_vga_mm_init(hwaddr vram_base, 147 hwaddr ctrl_base, int it_shift); 148 149 /* cirrus_vga.c */ 150 void pci_cirrus_vga_init(PCIBus *bus); 151 void isa_cirrus_vga_init(void); 152 153 /* ide.c */ 154 void isa_ide_init(int iobase, int iobase2, qemu_irq irq, 155 BlockDriverState *hd0, BlockDriverState *hd1); 156 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, 157 int secondary_ide_enabled); 158 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, 159 qemu_irq *pic); 160 void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, 161 qemu_irq *pic); 162 163 /* ne2000.c */ 164 165 void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd); 166 167 int cpu_is_bsp(CPUOldState *env); 168 #endif 169
