1 /* 2 * Copyright (C) 2008 The Android Open Source Project 3 * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved. 4 * 5 * Not a Contribution, Apache license notifications and license are retained 6 * for attribution purposes only. 7 * 8 * Licensed under the Apache License, Version 2.0 (the "License"); 9 * you may not use this file except in compliance with the License. 10 * You may obtain a copy of the License at 11 * 12 * http://www.apache.org/licenses/LICENSE-2.0 13 * 14 * Unless required by applicable law or agreed to in writing, software 15 * distributed under the License is distributed on an "AS IS" BASIS, 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 17 * See the License for the specific language governing permissions and 18 * limitations under the License. 19 */ 20 #include <cutils/log.h> 21 #include <sys/resource.h> 22 #include <sys/prctl.h> 23 24 #include <stdint.h> 25 #include <string.h> 26 #include <unistd.h> 27 #include <errno.h> 28 #include <fcntl.h> 29 30 #include <sys/ioctl.h> 31 #include <sys/types.h> 32 #include <sys/mman.h> 33 34 #include <linux/msm_kgsl.h> 35 36 #include <EGL/eglplatform.h> 37 #include <cutils/native_handle.h> 38 #include <gralloc_priv.h> 39 40 #include <copybit.h> 41 #include <alloc_controller.h> 42 #include <memalloc.h> 43 44 #include "c2d2.h" 45 #include "software_converter.h" 46 47 #include <dlfcn.h> 48 49 using gralloc::IMemAlloc; 50 using gralloc::IonController; 51 using gralloc::alloc_data; 52 53 C2D_STATUS (*LINK_c2dCreateSurface)( uint32 *surface_id, 54 uint32 surface_bits, 55 C2D_SURFACE_TYPE surface_type, 56 void *surface_definition ); 57 58 C2D_STATUS (*LINK_c2dUpdateSurface)( uint32 surface_id, 59 uint32 surface_bits, 60 C2D_SURFACE_TYPE surface_type, 61 void *surface_definition ); 62 63 C2D_STATUS (*LINK_c2dReadSurface)( uint32 surface_id, 64 C2D_SURFACE_TYPE surface_type, 65 void *surface_definition, 66 int32 x, int32 y ); 67 68 C2D_STATUS (*LINK_c2dDraw)( uint32 target_id, 69 uint32 target_config, C2D_RECT *target_scissor, 70 uint32 target_mask_id, uint32 target_color_key, 71 C2D_OBJECT *objects_list, uint32 num_objects ); 72 73 C2D_STATUS (*LINK_c2dFinish)( uint32 target_id); 74 75 C2D_STATUS (*LINK_c2dFlush)( uint32 target_id, c2d_ts_handle *timestamp); 76 77 C2D_STATUS (*LINK_c2dWaitTimestamp)( c2d_ts_handle timestamp ); 78 79 C2D_STATUS (*LINK_c2dDestroySurface)( uint32 surface_id ); 80 81 C2D_STATUS (*LINK_c2dMapAddr) ( int mem_fd, void * hostptr, size_t len, 82 size_t offset, uint32 flags, void ** gpuaddr); 83 84 C2D_STATUS (*LINK_c2dUnMapAddr) ( void * gpuaddr); 85 86 C2D_STATUS (*LINK_c2dGetDriverCapabilities) ( C2D_DRIVER_INFO * driver_info); 87 88 /* create a fence fd for the timestamp */ 89 C2D_STATUS (*LINK_c2dCreateFenceFD) ( uint32 target_id, c2d_ts_handle timestamp, 90 int32 *fd); 91 92 C2D_STATUS (*LINK_c2dFillSurface) ( uint32 surface_id, uint32 fill_color, 93 C2D_RECT * fill_rect); 94 95 /******************************************************************************/ 96 97 #if defined(COPYBIT_Z180) 98 #define MAX_SCALE_FACTOR (4096) 99 #define MAX_DIMENSION (4096) 100 #else 101 #error "Unsupported HW version" 102 #endif 103 104 // The following defines can be changed as required i.e. as we encounter 105 // complex use cases. 106 #define MAX_RGB_SURFACES 32 // Max. RGB layers currently supported per draw 107 #define MAX_YUV_2_PLANE_SURFACES 4// Max. 2-plane YUV layers currently supported per draw 108 #define MAX_YUV_3_PLANE_SURFACES 1// Max. 3-plane YUV layers currently supported per draw 109 // +1 for the destination surface. We cannot have multiple destination surfaces. 110 #define MAX_SURFACES (MAX_RGB_SURFACES + MAX_YUV_2_PLANE_SURFACES + MAX_YUV_3_PLANE_SURFACES + 1) 111 #define NUM_SURFACE_TYPES 3 // RGB_SURFACE + YUV_SURFACE_2_PLANES + YUV_SURFACE_3_PLANES 112 #define MAX_BLIT_OBJECT_COUNT 50 // Max. blit objects that can be passed per draw 113 114 enum { 115 RGB_SURFACE, 116 YUV_SURFACE_2_PLANES, 117 YUV_SURFACE_3_PLANES 118 }; 119 120 enum eConversionType { 121 CONVERT_TO_ANDROID_FORMAT, 122 CONVERT_TO_C2D_FORMAT 123 }; 124 125 enum eC2DFlags { 126 FLAGS_PREMULTIPLIED_ALPHA = 1<<0, 127 FLAGS_YUV_DESTINATION = 1<<1, 128 FLAGS_TEMP_SRC_DST = 1<<2 129 }; 130 131 static gralloc::IAllocController* sAlloc = 0; 132 /******************************************************************************/ 133 134 /** State information for each device instance */ 135 struct copybit_context_t { 136 struct copybit_device_t device; 137 // Templates for the various source surfaces. These templates are created 138 // to avoid the expensive create/destroy C2D Surfaces 139 C2D_OBJECT_STR blit_rgb_object[MAX_RGB_SURFACES]; 140 C2D_OBJECT_STR blit_yuv_2_plane_object[MAX_YUV_2_PLANE_SURFACES]; 141 C2D_OBJECT_STR blit_yuv_3_plane_object[MAX_YUV_3_PLANE_SURFACES]; 142 C2D_OBJECT_STR blit_list[MAX_BLIT_OBJECT_COUNT]; // Z-ordered list of blit objects 143 C2D_DRIVER_INFO c2d_driver_info; 144 void *libc2d2; 145 alloc_data temp_src_buffer; 146 alloc_data temp_dst_buffer; 147 unsigned int dst[NUM_SURFACE_TYPES]; // dst surfaces 148 uintptr_t mapped_gpu_addr[MAX_SURFACES]; // GPU addresses mapped inside copybit 149 int blit_rgb_count; // Total RGB surfaces being blit 150 int blit_yuv_2_plane_count; // Total 2 plane YUV surfaces being 151 int blit_yuv_3_plane_count; // Total 3 plane YUV surfaces being blit 152 int blit_count; // Total blit objects. 153 unsigned int trg_transform; /* target transform */ 154 int fb_width; 155 int fb_height; 156 int src_global_alpha; 157 int config_mask; 158 int dst_surface_type; 159 bool is_premultiplied_alpha; 160 void* time_stamp; 161 bool dst_surface_mapped; // Set when dst surface is mapped to GPU addr 162 void* dst_surface_base; // Stores the dst surface addr 163 164 // used for signaling the wait thread 165 bool wait_timestamp; 166 pthread_t wait_thread_id; 167 bool stop_thread; 168 pthread_mutex_t wait_cleanup_lock; 169 pthread_cond_t wait_cleanup_cond; 170 171 }; 172 173 struct bufferInfo { 174 int width; 175 int height; 176 int format; 177 }; 178 179 struct yuvPlaneInfo { 180 int yStride; //luma stride 181 int plane1_stride; 182 int plane2_stride; 183 size_t plane1_offset; 184 size_t plane2_offset; 185 }; 186 187 /** 188 * Common hardware methods 189 */ 190 191 static int open_copybit(const struct hw_module_t* module, const char* name, 192 struct hw_device_t** device); 193 194 static struct hw_module_methods_t copybit_module_methods = { 195 open: open_copybit 196 }; 197 198 /* 199 * The COPYBIT Module 200 */ 201 struct copybit_module_t HAL_MODULE_INFO_SYM = { 202 common: { 203 tag: HARDWARE_MODULE_TAG, 204 version_major: 1, 205 version_minor: 0, 206 id: COPYBIT_HARDWARE_MODULE_ID, 207 name: "QCT COPYBIT C2D 2.0 Module", 208 author: "Qualcomm", 209 methods: ©bit_module_methods 210 } 211 }; 212 213 214 /* thread function which waits on the timeStamp and cleans up the surfaces */ 215 static void* c2d_wait_loop(void* ptr) { 216 copybit_context_t* ctx = (copybit_context_t*)(ptr); 217 char thread_name[64] = "copybitWaitThr"; 218 prctl(PR_SET_NAME, (unsigned long) &thread_name, 0, 0, 0); 219 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY); 220 221 while(ctx->stop_thread == false) { 222 pthread_mutex_lock(&ctx->wait_cleanup_lock); 223 while(ctx->wait_timestamp == false && !ctx->stop_thread) { 224 pthread_cond_wait(&(ctx->wait_cleanup_cond), 225 &(ctx->wait_cleanup_lock)); 226 } 227 if(ctx->wait_timestamp) { 228 if(LINK_c2dWaitTimestamp(ctx->time_stamp)) { 229 ALOGE("%s: LINK_c2dWaitTimeStamp ERROR!!", __FUNCTION__); 230 } 231 ctx->wait_timestamp = false; 232 // Unmap any mapped addresses. 233 for (int i = 0; i < MAX_SURFACES; i++) { 234 if (ctx->mapped_gpu_addr[i]) { 235 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[i]); 236 ctx->mapped_gpu_addr[i] = 0; 237 } 238 } 239 // Reset the counts after the draw. 240 ctx->blit_rgb_count = 0; 241 ctx->blit_yuv_2_plane_count = 0; 242 ctx->blit_yuv_3_plane_count = 0; 243 ctx->blit_count = 0; 244 ctx->dst_surface_mapped = false; 245 ctx->dst_surface_base = 0; 246 } 247 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 248 if(ctx->stop_thread) 249 break; 250 } 251 pthread_exit(NULL); 252 return NULL; 253 } 254 255 256 /* convert COPYBIT_FORMAT to C2D format */ 257 static int get_format(int format) { 258 switch (format) { 259 case HAL_PIXEL_FORMAT_RGB_565: return C2D_COLOR_FORMAT_565_RGB; 260 case HAL_PIXEL_FORMAT_RGBX_8888: return C2D_COLOR_FORMAT_8888_ARGB | 261 C2D_FORMAT_SWAP_RB | 262 C2D_FORMAT_DISABLE_ALPHA; 263 case HAL_PIXEL_FORMAT_RGBA_8888: return C2D_COLOR_FORMAT_8888_ARGB | 264 C2D_FORMAT_SWAP_RB; 265 case HAL_PIXEL_FORMAT_BGRA_8888: return C2D_COLOR_FORMAT_8888_ARGB; 266 case HAL_PIXEL_FORMAT_YCbCr_420_SP: return C2D_COLOR_FORMAT_420_NV12; 267 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:return C2D_COLOR_FORMAT_420_NV12; 268 case HAL_PIXEL_FORMAT_YCrCb_420_SP: return C2D_COLOR_FORMAT_420_NV21; 269 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: return C2D_COLOR_FORMAT_420_NV12 | 270 C2D_FORMAT_MACROTILED; 271 default: ALOGE("%s: invalid format (0x%x", 272 __FUNCTION__, format); 273 return -EINVAL; 274 } 275 return -EINVAL; 276 } 277 278 /* Get the C2D formats needed for conversion to YUV */ 279 static int get_c2d_format_for_yuv_destination(int halFormat) { 280 switch (halFormat) { 281 // We do not swap the RB when the target is YUV 282 case HAL_PIXEL_FORMAT_RGBX_8888: return C2D_COLOR_FORMAT_8888_ARGB | 283 C2D_FORMAT_DISABLE_ALPHA; 284 case HAL_PIXEL_FORMAT_RGBA_8888: return C2D_COLOR_FORMAT_8888_ARGB; 285 // The U and V need to be interchanged when the target is YUV 286 case HAL_PIXEL_FORMAT_YCbCr_420_SP: return C2D_COLOR_FORMAT_420_NV21; 287 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:return C2D_COLOR_FORMAT_420_NV21; 288 case HAL_PIXEL_FORMAT_YCrCb_420_SP: return C2D_COLOR_FORMAT_420_NV12; 289 default: return get_format(halFormat); 290 } 291 return -EINVAL; 292 } 293 294 /* ------------------------------------------------------------------- *//*! 295 * \internal 296 * \brief Get the bpp for a particular color format 297 * \param color format 298 * \return bits per pixel 299 *//* ------------------------------------------------------------------- */ 300 int c2diGetBpp(int32 colorformat) 301 { 302 303 int c2dBpp = 0; 304 305 switch(colorformat&0xFF) 306 { 307 case C2D_COLOR_FORMAT_4444_RGBA: 308 case C2D_COLOR_FORMAT_4444_ARGB: 309 case C2D_COLOR_FORMAT_1555_ARGB: 310 case C2D_COLOR_FORMAT_565_RGB: 311 case C2D_COLOR_FORMAT_5551_RGBA: 312 c2dBpp = 16; 313 break; 314 case C2D_COLOR_FORMAT_8888_RGBA: 315 case C2D_COLOR_FORMAT_8888_ARGB: 316 c2dBpp = 32; 317 break; 318 case C2D_COLOR_FORMAT_8_L: 319 case C2D_COLOR_FORMAT_8_A: 320 c2dBpp = 8; 321 break; 322 case C2D_COLOR_FORMAT_4_A: 323 c2dBpp = 4; 324 break; 325 case C2D_COLOR_FORMAT_1: 326 c2dBpp = 1; 327 break; 328 default: 329 ALOGE("%s ERROR", __func__); 330 break; 331 } 332 return c2dBpp; 333 } 334 335 static size_t c2d_get_gpuaddr(copybit_context_t* ctx, 336 struct private_handle_t *handle, int &mapped_idx) 337 { 338 uint32 memtype; 339 size_t *gpuaddr = 0; 340 C2D_STATUS rc; 341 int freeindex = 0; 342 bool mapaddr = false; 343 344 if(!handle) 345 return 0; 346 347 if (handle->flags & (private_handle_t::PRIV_FLAGS_USES_PMEM | 348 private_handle_t::PRIV_FLAGS_USES_PMEM_ADSP)) 349 memtype = KGSL_USER_MEM_TYPE_PMEM; 350 else if (handle->flags & private_handle_t::PRIV_FLAGS_USES_ASHMEM) 351 memtype = KGSL_USER_MEM_TYPE_ASHMEM; 352 else if (handle->flags & private_handle_t::PRIV_FLAGS_USES_ION) 353 memtype = KGSL_USER_MEM_TYPE_ION; 354 else { 355 ALOGE("Invalid handle flags: 0x%x", handle->flags); 356 return 0; 357 } 358 359 // Check for a freeindex in the mapped_gpu_addr list 360 for (freeindex = 0; freeindex < MAX_SURFACES; freeindex++) { 361 if (ctx->mapped_gpu_addr[freeindex] == 0) { 362 // free index is available 363 // map GPU addr and use this as mapped_idx 364 mapaddr = true; 365 break; 366 } 367 } 368 369 if(mapaddr) { 370 rc = LINK_c2dMapAddr(handle->fd, (void*)handle->base, handle->size, 371 handle->offset, memtype, (void**)&gpuaddr); 372 373 if (rc == C2D_STATUS_OK) { 374 // We have mapped the GPU address inside copybit. We need to unmap 375 // this address after the blit. Store this address 376 ctx->mapped_gpu_addr[freeindex] = (size_t)gpuaddr; 377 mapped_idx = freeindex; 378 } 379 } 380 return (size_t)gpuaddr; 381 } 382 383 static void unmap_gpuaddr(copybit_context_t* ctx, int mapped_idx) 384 { 385 if (!ctx || (mapped_idx == -1)) 386 return; 387 388 if (ctx->mapped_gpu_addr[mapped_idx]) { 389 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[mapped_idx]); 390 ctx->mapped_gpu_addr[mapped_idx] = 0; 391 } 392 } 393 394 static int is_supported_rgb_format(int format) 395 { 396 switch(format) { 397 case HAL_PIXEL_FORMAT_RGBA_8888: 398 case HAL_PIXEL_FORMAT_RGBX_8888: 399 case HAL_PIXEL_FORMAT_RGB_565: 400 case HAL_PIXEL_FORMAT_BGRA_8888: { 401 return COPYBIT_SUCCESS; 402 } 403 default: 404 return COPYBIT_FAILURE; 405 } 406 } 407 408 static int get_num_planes(int format) 409 { 410 switch(format) { 411 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 412 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 413 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 414 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 415 return 2; 416 } 417 case HAL_PIXEL_FORMAT_YV12: { 418 return 3; 419 } 420 default: 421 return COPYBIT_FAILURE; 422 } 423 } 424 425 static int is_supported_yuv_format(int format) 426 { 427 switch(format) { 428 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 429 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 430 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 431 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 432 return COPYBIT_SUCCESS; 433 } 434 default: 435 return COPYBIT_FAILURE; 436 } 437 } 438 439 static int is_valid_destination_format(int format) 440 { 441 if (format == HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED) { 442 // C2D does not support NV12Tile as a destination format. 443 return COPYBIT_FAILURE; 444 } 445 return COPYBIT_SUCCESS; 446 } 447 448 static int calculate_yuv_offset_and_stride(const bufferInfo& info, 449 yuvPlaneInfo& yuvInfo) 450 { 451 int width = info.width; 452 int height = info.height; 453 int format = info.format; 454 455 int aligned_height = 0; 456 int aligned_width = 0, size = 0; 457 458 switch (format) { 459 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 460 /* NV12 Tile buffers have their luma height aligned to 32bytes and width 461 * aligned to 128 bytes. The chroma offset starts at an 8K boundary 462 */ 463 aligned_height = ALIGN(height, 32); 464 aligned_width = ALIGN(width, 128); 465 size = aligned_width * aligned_height; 466 yuvInfo.plane1_offset = ALIGN(size,8192); 467 yuvInfo.yStride = aligned_width; 468 yuvInfo.plane1_stride = aligned_width; 469 break; 470 } 471 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 472 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 473 case HAL_PIXEL_FORMAT_YCrCb_420_SP: { 474 aligned_width = ALIGN(width, 32); 475 yuvInfo.yStride = aligned_width; 476 yuvInfo.plane1_stride = aligned_width; 477 if (HAL_PIXEL_FORMAT_NV12_ENCODEABLE == format) { 478 // The encoder requires a 2K aligned chroma offset 479 yuvInfo.plane1_offset = ALIGN(aligned_width * height, 2048); 480 } else 481 yuvInfo.plane1_offset = aligned_width * height; 482 483 break; 484 } 485 default: { 486 return COPYBIT_FAILURE; 487 } 488 } 489 return COPYBIT_SUCCESS; 490 } 491 492 /** create C2D surface from copybit image */ 493 static int set_image(copybit_context_t* ctx, uint32 surfaceId, 494 const struct copybit_image_t *rhs, 495 const eC2DFlags flags, int &mapped_idx) 496 { 497 struct private_handle_t* handle = (struct private_handle_t*)rhs->handle; 498 C2D_SURFACE_TYPE surfaceType; 499 int status = COPYBIT_SUCCESS; 500 uintptr_t gpuaddr = 0; 501 int c2d_format; 502 mapped_idx = -1; 503 504 if (flags & FLAGS_YUV_DESTINATION) { 505 c2d_format = get_c2d_format_for_yuv_destination(rhs->format); 506 } else { 507 c2d_format = get_format(rhs->format); 508 } 509 510 if(c2d_format == -EINVAL) { 511 ALOGE("%s: invalid format", __FUNCTION__); 512 return -EINVAL; 513 } 514 515 if(handle == NULL) { 516 ALOGE("%s: invalid handle", __func__); 517 return -EINVAL; 518 } 519 520 if (handle->gpuaddr == 0) { 521 gpuaddr = c2d_get_gpuaddr(ctx, handle, mapped_idx); 522 if(!gpuaddr) { 523 ALOGE("%s: c2d_get_gpuaddr failed", __FUNCTION__); 524 return COPYBIT_FAILURE; 525 } 526 } else { 527 gpuaddr = handle->gpuaddr; 528 } 529 530 /* create C2D surface */ 531 if(is_supported_rgb_format(rhs->format) == COPYBIT_SUCCESS) { 532 /* RGB */ 533 C2D_RGB_SURFACE_DEF surfaceDef; 534 535 surfaceType = (C2D_SURFACE_TYPE) (C2D_SURFACE_RGB_HOST | C2D_SURFACE_WITH_PHYS); 536 537 surfaceDef.phys = (void*) gpuaddr; 538 surfaceDef.buffer = (void*) (handle->base); 539 540 surfaceDef.format = c2d_format | 541 ((flags & FLAGS_PREMULTIPLIED_ALPHA) ? C2D_FORMAT_PREMULTIPLIED : 0); 542 surfaceDef.width = rhs->w; 543 surfaceDef.height = rhs->h; 544 int aligned_width = ALIGN((int)surfaceDef.width,32); 545 surfaceDef.stride = (aligned_width * c2diGetBpp(surfaceDef.format))>>3; 546 547 if(LINK_c2dUpdateSurface( surfaceId,C2D_TARGET | C2D_SOURCE, surfaceType, 548 &surfaceDef)) { 549 ALOGE("%s: RGB Surface c2dUpdateSurface ERROR", __FUNCTION__); 550 unmap_gpuaddr(ctx, mapped_idx); 551 status = COPYBIT_FAILURE; 552 } 553 } else if (is_supported_yuv_format(rhs->format) == COPYBIT_SUCCESS) { 554 C2D_YUV_SURFACE_DEF surfaceDef; 555 memset(&surfaceDef, 0, sizeof(surfaceDef)); 556 surfaceType = (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | C2D_SURFACE_WITH_PHYS); 557 surfaceDef.format = c2d_format; 558 559 bufferInfo info; 560 info.width = rhs->w; 561 info.height = rhs->h; 562 info.format = rhs->format; 563 564 yuvPlaneInfo yuvInfo = {0}; 565 status = calculate_yuv_offset_and_stride(info, yuvInfo); 566 if(status != COPYBIT_SUCCESS) { 567 ALOGE("%s: calculate_yuv_offset_and_stride error", __FUNCTION__); 568 unmap_gpuaddr(ctx, mapped_idx); 569 } 570 571 surfaceDef.width = rhs->w; 572 surfaceDef.height = rhs->h; 573 surfaceDef.plane0 = (void*) (handle->base); 574 surfaceDef.phys0 = (void*) (gpuaddr); 575 surfaceDef.stride0 = yuvInfo.yStride; 576 577 surfaceDef.plane1 = (void*) (handle->base + yuvInfo.plane1_offset); 578 surfaceDef.phys1 = (void*) (gpuaddr + yuvInfo.plane1_offset); 579 surfaceDef.stride1 = yuvInfo.plane1_stride; 580 if (3 == get_num_planes(rhs->format)) { 581 surfaceDef.plane2 = (void*) (handle->base + yuvInfo.plane2_offset); 582 surfaceDef.phys2 = (void*) (gpuaddr + yuvInfo.plane2_offset); 583 surfaceDef.stride2 = yuvInfo.plane2_stride; 584 } 585 586 if(LINK_c2dUpdateSurface( surfaceId,C2D_TARGET | C2D_SOURCE, surfaceType, 587 &surfaceDef)) { 588 ALOGE("%s: YUV Surface c2dUpdateSurface ERROR", __FUNCTION__); 589 unmap_gpuaddr(ctx, mapped_idx); 590 status = COPYBIT_FAILURE; 591 } 592 } else { 593 ALOGE("%s: invalid format 0x%x", __FUNCTION__, rhs->format); 594 unmap_gpuaddr(ctx, mapped_idx); 595 status = COPYBIT_FAILURE; 596 } 597 598 return status; 599 } 600 601 /** copy the bits */ 602 static int msm_copybit(struct copybit_context_t *ctx, unsigned int target) 603 { 604 if (ctx->blit_count == 0) { 605 return COPYBIT_SUCCESS; 606 } 607 608 for (int i = 0; i < ctx->blit_count; i++) 609 { 610 ctx->blit_list[i].next = &(ctx->blit_list[i+1]); 611 } 612 ctx->blit_list[ctx->blit_count-1].next = NULL; 613 uint32_t target_transform = ctx->trg_transform; 614 if (ctx->c2d_driver_info.capabilities_mask & 615 C2D_DRIVER_SUPPORTS_OVERRIDE_TARGET_ROTATE_OP) { 616 // For A3xx - set 0x0 as the transform is set in the config_mask 617 target_transform = 0x0; 618 } 619 if(LINK_c2dDraw(target, target_transform, 0x0, 0, 0, ctx->blit_list, 620 ctx->blit_count)) { 621 ALOGE("%s: LINK_c2dDraw ERROR", __FUNCTION__); 622 return COPYBIT_FAILURE; 623 } 624 return COPYBIT_SUCCESS; 625 } 626 627 628 629 static int flush_get_fence_copybit (struct copybit_device_t *dev, int* fd) 630 { 631 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 632 int status = COPYBIT_FAILURE; 633 if (!ctx) 634 return COPYBIT_FAILURE; 635 pthread_mutex_lock(&ctx->wait_cleanup_lock); 636 status = msm_copybit(ctx, ctx->dst[ctx->dst_surface_type]); 637 638 if(LINK_c2dFlush(ctx->dst[ctx->dst_surface_type], &ctx->time_stamp)) { 639 ALOGE("%s: LINK_c2dFlush ERROR", __FUNCTION__); 640 // unlock the mutex and return failure 641 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 642 return COPYBIT_FAILURE; 643 } 644 if(LINK_c2dCreateFenceFD(ctx->dst[ctx->dst_surface_type], ctx->time_stamp, 645 fd)) { 646 ALOGE("%s: LINK_c2dCreateFenceFD ERROR", __FUNCTION__); 647 status = COPYBIT_FAILURE; 648 } 649 if(status == COPYBIT_SUCCESS) { 650 //signal the wait_thread 651 ctx->wait_timestamp = true; 652 pthread_cond_signal(&ctx->wait_cleanup_cond); 653 } 654 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 655 return status; 656 } 657 658 static int finish_copybit(struct copybit_device_t *dev) 659 { 660 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 661 if (!ctx) 662 return COPYBIT_FAILURE; 663 664 int status = msm_copybit(ctx, ctx->dst[ctx->dst_surface_type]); 665 666 if(LINK_c2dFinish(ctx->dst[ctx->dst_surface_type])) { 667 ALOGE("%s: LINK_c2dFinish ERROR", __FUNCTION__); 668 return COPYBIT_FAILURE; 669 } 670 671 // Unmap any mapped addresses. 672 for (int i = 0; i < MAX_SURFACES; i++) { 673 if (ctx->mapped_gpu_addr[i]) { 674 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[i]); 675 ctx->mapped_gpu_addr[i] = 0; 676 } 677 } 678 679 // Reset the counts after the draw. 680 ctx->blit_rgb_count = 0; 681 ctx->blit_yuv_2_plane_count = 0; 682 ctx->blit_yuv_3_plane_count = 0; 683 ctx->blit_count = 0; 684 ctx->dst_surface_mapped = false; 685 ctx->dst_surface_base = 0; 686 687 return status; 688 } 689 690 static int clear_copybit(struct copybit_device_t *dev, 691 struct copybit_image_t const *buf, 692 struct copybit_rect_t *rect) 693 { 694 int ret = COPYBIT_SUCCESS; 695 int flags = FLAGS_PREMULTIPLIED_ALPHA; 696 int mapped_dst_idx = -1; 697 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 698 C2D_RECT c2drect = {rect->l, rect->t, rect->r - rect->l, rect->b - rect->t}; 699 pthread_mutex_lock(&ctx->wait_cleanup_lock); 700 if(!ctx->dst_surface_mapped) { 701 ret = set_image(ctx, ctx->dst[RGB_SURFACE], buf, 702 (eC2DFlags)flags, mapped_dst_idx); 703 if(ret) { 704 ALOGE("%s: set_image error", __FUNCTION__); 705 unmap_gpuaddr(ctx, mapped_dst_idx); 706 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 707 return COPYBIT_FAILURE; 708 } 709 //clear_copybit is the first call made by HWC for each composition 710 //with the dest surface, hence set dst_surface_mapped. 711 ctx->dst_surface_mapped = true; 712 ctx->dst_surface_base = buf->base; 713 ret = LINK_c2dFillSurface(ctx->dst[RGB_SURFACE], 0x0, &c2drect); 714 } 715 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 716 return ret; 717 } 718 719 720 /** setup rectangles */ 721 static void set_rects(struct copybit_context_t *ctx, 722 C2D_OBJECT *c2dObject, 723 const struct copybit_rect_t *dst, 724 const struct copybit_rect_t *src, 725 const struct copybit_rect_t *scissor) 726 { 727 // Set the target rect. 728 if((ctx->trg_transform & C2D_TARGET_ROTATE_90) && 729 (ctx->trg_transform & C2D_TARGET_ROTATE_180)) { 730 /* target rotation is 270 */ 731 c2dObject->target_rect.x = (dst->t)<<16; 732 c2dObject->target_rect.y = ctx->fb_width? 733 (ALIGN(ctx->fb_width,32)- dst->r):dst->r; 734 c2dObject->target_rect.y = c2dObject->target_rect.y<<16; 735 c2dObject->target_rect.height = ((dst->r) - (dst->l))<<16; 736 c2dObject->target_rect.width = ((dst->b) - (dst->t))<<16; 737 } else if(ctx->trg_transform & C2D_TARGET_ROTATE_90) { 738 c2dObject->target_rect.x = ctx->fb_height?(ctx->fb_height - dst->b):dst->b; 739 c2dObject->target_rect.x = c2dObject->target_rect.x<<16; 740 c2dObject->target_rect.y = (dst->l)<<16; 741 c2dObject->target_rect.height = ((dst->r) - (dst->l))<<16; 742 c2dObject->target_rect.width = ((dst->b) - (dst->t))<<16; 743 } else if(ctx->trg_transform & C2D_TARGET_ROTATE_180) { 744 c2dObject->target_rect.y = ctx->fb_height?(ctx->fb_height - dst->b):dst->b; 745 c2dObject->target_rect.y = c2dObject->target_rect.y<<16; 746 c2dObject->target_rect.x = ctx->fb_width? 747 (ALIGN(ctx->fb_width,32) - dst->r):dst->r; 748 c2dObject->target_rect.x = c2dObject->target_rect.x<<16; 749 c2dObject->target_rect.height = ((dst->b) - (dst->t))<<16; 750 c2dObject->target_rect.width = ((dst->r) - (dst->l))<<16; 751 } else { 752 c2dObject->target_rect.x = (dst->l)<<16; 753 c2dObject->target_rect.y = (dst->t)<<16; 754 c2dObject->target_rect.height = ((dst->b) - (dst->t))<<16; 755 c2dObject->target_rect.width = ((dst->r) - (dst->l))<<16; 756 } 757 c2dObject->config_mask |= C2D_TARGET_RECT_BIT; 758 759 // Set the source rect 760 c2dObject->source_rect.x = (src->l)<<16; 761 c2dObject->source_rect.y = (src->t)<<16; 762 c2dObject->source_rect.height = ((src->b) - (src->t))<<16; 763 c2dObject->source_rect.width = ((src->r) - (src->l))<<16; 764 c2dObject->config_mask |= C2D_SOURCE_RECT_BIT; 765 766 // Set the scissor rect 767 c2dObject->scissor_rect.x = scissor->l; 768 c2dObject->scissor_rect.y = scissor->t; 769 c2dObject->scissor_rect.height = (scissor->b) - (scissor->t); 770 c2dObject->scissor_rect.width = (scissor->r) - (scissor->l); 771 c2dObject->config_mask |= C2D_SCISSOR_RECT_BIT; 772 } 773 774 /*****************************************************************************/ 775 776 /** Set a parameter to value */ 777 static int set_parameter_copybit( 778 struct copybit_device_t *dev, 779 int name, 780 int value) 781 { 782 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 783 int status = COPYBIT_SUCCESS; 784 if (!ctx) { 785 ALOGE("%s: null context", __FUNCTION__); 786 return -EINVAL; 787 } 788 789 pthread_mutex_lock(&ctx->wait_cleanup_lock); 790 switch(name) { 791 case COPYBIT_PLANE_ALPHA: 792 { 793 if (value < 0) value = 0; 794 if (value >= 256) value = 255; 795 796 ctx->src_global_alpha = value; 797 if (value < 255) 798 ctx->config_mask |= C2D_GLOBAL_ALPHA_BIT; 799 else 800 ctx->config_mask &= ~C2D_GLOBAL_ALPHA_BIT; 801 } 802 break; 803 case COPYBIT_BLEND_MODE: 804 { 805 if (value == COPYBIT_BLENDING_NONE) { 806 ctx->config_mask |= C2D_ALPHA_BLEND_NONE; 807 ctx->is_premultiplied_alpha = true; 808 } else if (value == COPYBIT_BLENDING_PREMULT) { 809 ctx->is_premultiplied_alpha = true; 810 } else { 811 ctx->config_mask &= ~C2D_ALPHA_BLEND_NONE; 812 } 813 } 814 break; 815 case COPYBIT_TRANSFORM: 816 { 817 unsigned int transform = 0; 818 uint32 config_mask = 0; 819 config_mask |= C2D_OVERRIDE_GLOBAL_TARGET_ROTATE_CONFIG; 820 if((value & 0x7) == COPYBIT_TRANSFORM_ROT_180) { 821 transform = C2D_TARGET_ROTATE_180; 822 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_180; 823 } else if((value & 0x7) == COPYBIT_TRANSFORM_ROT_270) { 824 transform = C2D_TARGET_ROTATE_90; 825 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_90; 826 } else if(value == COPYBIT_TRANSFORM_ROT_90) { 827 transform = C2D_TARGET_ROTATE_270; 828 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_270; 829 } else { 830 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_0; 831 if(value & COPYBIT_TRANSFORM_FLIP_H) { 832 config_mask |= C2D_MIRROR_H_BIT; 833 } else if(value & COPYBIT_TRANSFORM_FLIP_V) { 834 config_mask |= C2D_MIRROR_V_BIT; 835 } 836 } 837 838 if (ctx->c2d_driver_info.capabilities_mask & 839 C2D_DRIVER_SUPPORTS_OVERRIDE_TARGET_ROTATE_OP) { 840 ctx->config_mask |= config_mask; 841 } else { 842 // The transform for this surface does not match the current 843 // target transform. Draw all previous surfaces. This will be 844 // changed once we have a new mechanism to send different 845 // target rotations to c2d. 846 finish_copybit(dev); 847 } 848 ctx->trg_transform = transform; 849 } 850 break; 851 case COPYBIT_FRAMEBUFFER_WIDTH: 852 ctx->fb_width = value; 853 break; 854 case COPYBIT_FRAMEBUFFER_HEIGHT: 855 ctx->fb_height = value; 856 break; 857 case COPYBIT_ROTATION_DEG: 858 case COPYBIT_DITHER: 859 case COPYBIT_BLUR: 860 case COPYBIT_BLIT_TO_FRAMEBUFFER: 861 // Do nothing 862 break; 863 default: 864 ALOGE("%s: default case param=0x%x", __FUNCTION__, name); 865 status = -EINVAL; 866 break; 867 } 868 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 869 return status; 870 } 871 872 /** Get a static info value */ 873 static int get(struct copybit_device_t *dev, int name) 874 { 875 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 876 int value; 877 878 if (!ctx) { 879 ALOGE("%s: null context error", __FUNCTION__); 880 return -EINVAL; 881 } 882 883 switch(name) { 884 case COPYBIT_MINIFICATION_LIMIT: 885 value = MAX_SCALE_FACTOR; 886 break; 887 case COPYBIT_MAGNIFICATION_LIMIT: 888 value = MAX_SCALE_FACTOR; 889 break; 890 case COPYBIT_SCALING_FRAC_BITS: 891 value = 32; 892 break; 893 case COPYBIT_ROTATION_STEP_DEG: 894 value = 1; 895 break; 896 default: 897 ALOGE("%s: default case param=0x%x", __FUNCTION__, name); 898 value = -EINVAL; 899 } 900 return value; 901 } 902 903 static int is_alpha(int cformat) 904 { 905 int alpha = 0; 906 switch (cformat & 0xFF) { 907 case C2D_COLOR_FORMAT_8888_ARGB: 908 case C2D_COLOR_FORMAT_8888_RGBA: 909 case C2D_COLOR_FORMAT_5551_RGBA: 910 case C2D_COLOR_FORMAT_4444_ARGB: 911 alpha = 1; 912 break; 913 default: 914 alpha = 0; 915 break; 916 } 917 918 if(alpha && (cformat&C2D_FORMAT_DISABLE_ALPHA)) 919 alpha = 0; 920 921 return alpha; 922 } 923 924 /* Function to check if we need a temporary buffer for the blit. 925 * This would happen if the requested destination stride and the 926 * C2D stride do not match. We ignore RGB buffers, since their 927 * stride is always aligned to 32. 928 */ 929 static bool need_temp_buffer(struct copybit_image_t const *img) 930 { 931 if (COPYBIT_SUCCESS == is_supported_rgb_format(img->format)) 932 return false; 933 934 struct private_handle_t* handle = (struct private_handle_t*)img->handle; 935 936 // The width parameter in the handle contains the aligned_w. We check if we 937 // need to convert based on this param. YUV formats have bpp=1, so checking 938 // if the requested stride is aligned should suffice. 939 if (0 == (handle->width)%32) { 940 return false; 941 } 942 943 return true; 944 } 945 946 /* Function to extract the information from the copybit image and set the corresponding 947 * values in the bufferInfo struct. 948 */ 949 static void populate_buffer_info(struct copybit_image_t const *img, bufferInfo& info) 950 { 951 info.width = img->w; 952 info.height = img->h; 953 info.format = img->format; 954 } 955 956 /* Function to get the required size for a particular format, inorder for C2D to perform 957 * the blit operation. 958 */ 959 static size_t get_size(const bufferInfo& info) 960 { 961 int size = 0; 962 int w = info.width; 963 int h = info.height; 964 int aligned_w = ALIGN(w, 32); 965 switch(info.format) { 966 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 967 { 968 // Chroma for this format is aligned to 2K. 969 size = ALIGN((aligned_w*h), 2048) + 970 ALIGN(aligned_w/2, 32) * (h/2) *2; 971 size = ALIGN(size, 4096); 972 } break; 973 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 974 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 975 { 976 size = aligned_w * h + 977 ALIGN(aligned_w/2, 32) * (h/2) * 2; 978 size = ALIGN(size, 4096); 979 } break; 980 default: break; 981 } 982 return size; 983 } 984 985 /* Function to allocate memory for the temporary buffer. This memory is 986 * allocated from Ashmem. It is the caller's responsibility to free this 987 * memory. 988 */ 989 static int get_temp_buffer(const bufferInfo& info, alloc_data& data) 990 { 991 ALOGD("%s E", __FUNCTION__); 992 // Alloc memory from system heap 993 data.base = 0; 994 data.fd = -1; 995 data.offset = 0; 996 data.size = get_size(info); 997 data.align = getpagesize(); 998 data.uncached = true; 999 int allocFlags = GRALLOC_USAGE_PRIVATE_SYSTEM_HEAP; 1000 1001 if (sAlloc == 0) { 1002 sAlloc = gralloc::IAllocController::getInstance(); 1003 } 1004 1005 if (sAlloc == 0) { 1006 ALOGE("%s: sAlloc is still NULL", __FUNCTION__); 1007 return COPYBIT_FAILURE; 1008 } 1009 1010 int err = sAlloc->allocate(data, allocFlags); 1011 if (0 != err) { 1012 ALOGE("%s: allocate failed", __FUNCTION__); 1013 return COPYBIT_FAILURE; 1014 } 1015 1016 ALOGD("%s X", __FUNCTION__); 1017 return err; 1018 } 1019 1020 /* Function to free the temporary allocated memory.*/ 1021 static void free_temp_buffer(alloc_data &data) 1022 { 1023 if (-1 != data.fd) { 1024 IMemAlloc* memalloc = sAlloc->getAllocator(data.allocType); 1025 memalloc->free_buffer(data.base, data.size, 0, data.fd); 1026 } 1027 } 1028 1029 /* Function to perform the software color conversion. Convert the 1030 * C2D compatible format to the Android compatible format 1031 */ 1032 static int copy_image(private_handle_t *src_handle, 1033 struct copybit_image_t const *rhs, 1034 eConversionType conversionType) 1035 { 1036 if (src_handle->fd == -1) { 1037 ALOGE("%s: src_handle fd is invalid", __FUNCTION__); 1038 return COPYBIT_FAILURE; 1039 } 1040 1041 // Copy the info. 1042 int ret = COPYBIT_SUCCESS; 1043 switch(rhs->format) { 1044 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 1045 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 1046 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 1047 { 1048 if (CONVERT_TO_ANDROID_FORMAT == conversionType) { 1049 return convert_yuv_c2d_to_yuv_android(src_handle, rhs); 1050 } else { 1051 return convert_yuv_android_to_yuv_c2d(src_handle, rhs); 1052 } 1053 1054 } break; 1055 default: { 1056 ALOGE("%s: invalid format 0x%x", __FUNCTION__, rhs->format); 1057 ret = COPYBIT_FAILURE; 1058 } break; 1059 } 1060 return ret; 1061 } 1062 1063 static void delete_handle(private_handle_t *handle) 1064 { 1065 if (handle) { 1066 delete handle; 1067 handle = 0; 1068 } 1069 } 1070 1071 static bool need_to_execute_draw(eC2DFlags flags) 1072 { 1073 if (flags & FLAGS_TEMP_SRC_DST) { 1074 return true; 1075 } 1076 if (flags & FLAGS_YUV_DESTINATION) { 1077 return true; 1078 } 1079 return false; 1080 } 1081 1082 /** do a stretch blit type operation */ 1083 static int stretch_copybit_internal( 1084 struct copybit_device_t *dev, 1085 struct copybit_image_t const *dst, 1086 struct copybit_image_t const *src, 1087 struct copybit_rect_t const *dst_rect, 1088 struct copybit_rect_t const *src_rect, 1089 struct copybit_region_t const *region, 1090 bool enableBlend) 1091 { 1092 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1093 int status = COPYBIT_SUCCESS; 1094 int flags = 0; 1095 int src_surface_type; 1096 int mapped_src_idx = -1, mapped_dst_idx = -1; 1097 C2D_OBJECT_STR src_surface; 1098 1099 if (!ctx) { 1100 ALOGE("%s: null context error", __FUNCTION__); 1101 return -EINVAL; 1102 } 1103 1104 if (src->w > MAX_DIMENSION || src->h > MAX_DIMENSION) { 1105 ALOGE("%s: src dimension error", __FUNCTION__); 1106 return -EINVAL; 1107 } 1108 1109 if (dst->w > MAX_DIMENSION || dst->h > MAX_DIMENSION) { 1110 ALOGE("%s : dst dimension error dst w %d h %d", __FUNCTION__, dst->w, 1111 dst->h); 1112 return -EINVAL; 1113 } 1114 1115 if (is_valid_destination_format(dst->format) == COPYBIT_FAILURE) { 1116 ALOGE("%s: Invalid destination format format = 0x%x", __FUNCTION__, 1117 dst->format); 1118 return COPYBIT_FAILURE; 1119 } 1120 1121 int dst_surface_type; 1122 if (is_supported_rgb_format(dst->format) == COPYBIT_SUCCESS) { 1123 dst_surface_type = RGB_SURFACE; 1124 flags |= FLAGS_PREMULTIPLIED_ALPHA; 1125 } else if (is_supported_yuv_format(dst->format) == COPYBIT_SUCCESS) { 1126 int num_planes = get_num_planes(dst->format); 1127 flags |= FLAGS_YUV_DESTINATION; 1128 if (num_planes == 2) { 1129 dst_surface_type = YUV_SURFACE_2_PLANES; 1130 } else if (num_planes == 3) { 1131 dst_surface_type = YUV_SURFACE_3_PLANES; 1132 } else { 1133 ALOGE("%s: dst number of YUV planes is invalid dst format = 0x%x", 1134 __FUNCTION__, dst->format); 1135 return COPYBIT_FAILURE; 1136 } 1137 } else { 1138 ALOGE("%s: Invalid dst surface format 0x%x", __FUNCTION__, 1139 dst->format); 1140 return COPYBIT_FAILURE; 1141 } 1142 1143 if (ctx->blit_rgb_count == MAX_RGB_SURFACES || 1144 ctx->blit_yuv_2_plane_count == MAX_YUV_2_PLANE_SURFACES || 1145 ctx->blit_yuv_3_plane_count == MAX_YUV_2_PLANE_SURFACES || 1146 ctx->blit_count == MAX_BLIT_OBJECT_COUNT || 1147 ctx->dst_surface_type != dst_surface_type) { 1148 // we have reached the max. limits of our internal structures or 1149 // changed the target. 1150 // Draw the remaining surfaces. We need to do the finish here since 1151 // we need to free up the surface templates. 1152 finish_copybit(dev); 1153 } 1154 1155 ctx->dst_surface_type = dst_surface_type; 1156 1157 // Update the destination 1158 copybit_image_t dst_image; 1159 dst_image.w = dst->w; 1160 dst_image.h = dst->h; 1161 dst_image.format = dst->format; 1162 dst_image.handle = dst->handle; 1163 // Check if we need a temp. copy for the destination. We'd need this the destination 1164 // width is not aligned to 32. This case occurs for YUV formats. RGB formats are 1165 // aligned to 32. 1166 bool need_temp_dst = need_temp_buffer(dst); 1167 bufferInfo dst_info; 1168 populate_buffer_info(dst, dst_info); 1169 private_handle_t* dst_hnd = new private_handle_t(-1, 0, 0, 0, dst_info.format, 1170 dst_info.width, dst_info.height); 1171 if (dst_hnd == NULL) { 1172 ALOGE("%s: dst_hnd is null", __FUNCTION__); 1173 return COPYBIT_FAILURE; 1174 } 1175 if (need_temp_dst) { 1176 if (get_size(dst_info) != ctx->temp_dst_buffer.size) { 1177 free_temp_buffer(ctx->temp_dst_buffer); 1178 // Create a temp buffer and set that as the destination. 1179 if (COPYBIT_FAILURE == get_temp_buffer(dst_info, ctx->temp_dst_buffer)) { 1180 ALOGE("%s: get_temp_buffer(dst) failed", __FUNCTION__); 1181 delete_handle(dst_hnd); 1182 return COPYBIT_FAILURE; 1183 } 1184 } 1185 dst_hnd->fd = ctx->temp_dst_buffer.fd; 1186 dst_hnd->size = ctx->temp_dst_buffer.size; 1187 dst_hnd->flags = ctx->temp_dst_buffer.allocType; 1188 dst_hnd->base = (uintptr_t)(ctx->temp_dst_buffer.base); 1189 dst_hnd->offset = ctx->temp_dst_buffer.offset; 1190 dst_hnd->gpuaddr = 0; 1191 dst_image.handle = dst_hnd; 1192 } 1193 if(!ctx->dst_surface_mapped) { 1194 //map the destination surface to GPU address 1195 status = set_image(ctx, ctx->dst[ctx->dst_surface_type], &dst_image, 1196 (eC2DFlags)flags, mapped_dst_idx); 1197 if(status) { 1198 ALOGE("%s: dst: set_image error", __FUNCTION__); 1199 delete_handle(dst_hnd); 1200 unmap_gpuaddr(ctx, mapped_dst_idx); 1201 return COPYBIT_FAILURE; 1202 } 1203 ctx->dst_surface_mapped = true; 1204 ctx->dst_surface_base = dst->base; 1205 } else if(ctx->dst_surface_mapped && ctx->dst_surface_base != dst->base) { 1206 // Destination surface for the operation should be same for multiple 1207 // requests, this check is catch if there is any case when the 1208 // destination changes 1209 ALOGE("%s: a different destination surface!!", __FUNCTION__); 1210 } 1211 1212 // Update the source 1213 flags = 0; 1214 if(is_supported_rgb_format(src->format) == COPYBIT_SUCCESS) { 1215 src_surface_type = RGB_SURFACE; 1216 src_surface = ctx->blit_rgb_object[ctx->blit_rgb_count]; 1217 } else if (is_supported_yuv_format(src->format) == COPYBIT_SUCCESS) { 1218 int num_planes = get_num_planes(src->format); 1219 if (num_planes == 2) { 1220 src_surface_type = YUV_SURFACE_2_PLANES; 1221 src_surface = ctx->blit_yuv_2_plane_object[ctx->blit_yuv_2_plane_count]; 1222 } else if (num_planes == 3) { 1223 src_surface_type = YUV_SURFACE_3_PLANES; 1224 src_surface = ctx->blit_yuv_3_plane_object[ctx->blit_yuv_2_plane_count]; 1225 } else { 1226 ALOGE("%s: src number of YUV planes is invalid src format = 0x%x", 1227 __FUNCTION__, src->format); 1228 delete_handle(dst_hnd); 1229 unmap_gpuaddr(ctx, mapped_dst_idx); 1230 return -EINVAL; 1231 } 1232 } else { 1233 ALOGE("%s: Invalid source surface format 0x%x", __FUNCTION__, 1234 src->format); 1235 delete_handle(dst_hnd); 1236 unmap_gpuaddr(ctx, mapped_dst_idx); 1237 return -EINVAL; 1238 } 1239 1240 copybit_image_t src_image; 1241 src_image.w = src->w; 1242 src_image.h = src->h; 1243 src_image.format = src->format; 1244 src_image.handle = src->handle; 1245 1246 bool need_temp_src = need_temp_buffer(src); 1247 bufferInfo src_info; 1248 populate_buffer_info(src, src_info); 1249 private_handle_t* src_hnd = new private_handle_t(-1, 0, 0, 0, src_info.format, 1250 src_info.width, src_info.height); 1251 if (NULL == src_hnd) { 1252 ALOGE("%s: src_hnd is null", __FUNCTION__); 1253 delete_handle(dst_hnd); 1254 unmap_gpuaddr(ctx, mapped_dst_idx); 1255 return COPYBIT_FAILURE; 1256 } 1257 if (need_temp_src) { 1258 if (get_size(src_info) != ctx->temp_src_buffer.size) { 1259 free_temp_buffer(ctx->temp_src_buffer); 1260 // Create a temp buffer and set that as the destination. 1261 if (COPYBIT_SUCCESS != get_temp_buffer(src_info, 1262 ctx->temp_src_buffer)) { 1263 ALOGE("%s: get_temp_buffer(src) failed", __FUNCTION__); 1264 delete_handle(dst_hnd); 1265 delete_handle(src_hnd); 1266 unmap_gpuaddr(ctx, mapped_dst_idx); 1267 return COPYBIT_FAILURE; 1268 } 1269 } 1270 src_hnd->fd = ctx->temp_src_buffer.fd; 1271 src_hnd->size = ctx->temp_src_buffer.size; 1272 src_hnd->flags = ctx->temp_src_buffer.allocType; 1273 src_hnd->base = (uintptr_t)(ctx->temp_src_buffer.base); 1274 src_hnd->offset = ctx->temp_src_buffer.offset; 1275 src_hnd->gpuaddr = 0; 1276 src_image.handle = src_hnd; 1277 1278 // Copy the source. 1279 status = copy_image((private_handle_t *)src->handle, &src_image, 1280 CONVERT_TO_C2D_FORMAT); 1281 if (status == COPYBIT_FAILURE) { 1282 ALOGE("%s:copy_image failed in temp source",__FUNCTION__); 1283 delete_handle(dst_hnd); 1284 delete_handle(src_hnd); 1285 unmap_gpuaddr(ctx, mapped_dst_idx); 1286 return status; 1287 } 1288 1289 // Clean the cache 1290 IMemAlloc* memalloc = sAlloc->getAllocator(src_hnd->flags); 1291 if (memalloc->clean_buffer((void *)(src_hnd->base), src_hnd->size, 1292 src_hnd->offset, src_hnd->fd, 1293 gralloc::CACHE_CLEAN)) { 1294 ALOGE("%s: clean_buffer failed", __FUNCTION__); 1295 delete_handle(dst_hnd); 1296 delete_handle(src_hnd); 1297 unmap_gpuaddr(ctx, mapped_dst_idx); 1298 return COPYBIT_FAILURE; 1299 } 1300 } 1301 1302 flags |= (ctx->is_premultiplied_alpha) ? FLAGS_PREMULTIPLIED_ALPHA : 0; 1303 flags |= (ctx->dst_surface_type != RGB_SURFACE) ? FLAGS_YUV_DESTINATION : 0; 1304 status = set_image(ctx, src_surface.surface_id, &src_image, 1305 (eC2DFlags)flags, mapped_src_idx); 1306 if(status) { 1307 ALOGE("%s: set_image (src) error", __FUNCTION__); 1308 delete_handle(dst_hnd); 1309 delete_handle(src_hnd); 1310 unmap_gpuaddr(ctx, mapped_dst_idx); 1311 unmap_gpuaddr(ctx, mapped_src_idx); 1312 return COPYBIT_FAILURE; 1313 } 1314 1315 src_surface.config_mask = C2D_NO_ANTIALIASING_BIT | ctx->config_mask; 1316 src_surface.global_alpha = ctx->src_global_alpha; 1317 if (enableBlend) { 1318 if(src_surface.config_mask & C2D_GLOBAL_ALPHA_BIT) { 1319 src_surface.config_mask &= ~C2D_ALPHA_BLEND_NONE; 1320 if(!(src_surface.global_alpha)) { 1321 // src alpha is zero 1322 delete_handle(dst_hnd); 1323 delete_handle(src_hnd); 1324 unmap_gpuaddr(ctx, mapped_dst_idx); 1325 unmap_gpuaddr(ctx, mapped_src_idx); 1326 return COPYBIT_FAILURE; 1327 } 1328 } 1329 } else { 1330 src_surface.config_mask |= C2D_ALPHA_BLEND_NONE; 1331 } 1332 1333 if (src_surface_type == RGB_SURFACE) { 1334 ctx->blit_rgb_object[ctx->blit_rgb_count] = src_surface; 1335 ctx->blit_rgb_count++; 1336 } else if (src_surface_type == YUV_SURFACE_2_PLANES) { 1337 ctx->blit_yuv_2_plane_object[ctx->blit_yuv_2_plane_count] = src_surface; 1338 ctx->blit_yuv_2_plane_count++; 1339 } else { 1340 ctx->blit_yuv_3_plane_object[ctx->blit_yuv_3_plane_count] = src_surface; 1341 ctx->blit_yuv_3_plane_count++; 1342 } 1343 1344 struct copybit_rect_t clip; 1345 while ((status == 0) && region->next(region, &clip)) { 1346 set_rects(ctx, &(src_surface), dst_rect, src_rect, &clip); 1347 if (ctx->blit_count == MAX_BLIT_OBJECT_COUNT) { 1348 ALOGW("Reached end of blit count"); 1349 finish_copybit(dev); 1350 } 1351 ctx->blit_list[ctx->blit_count] = src_surface; 1352 ctx->blit_count++; 1353 } 1354 1355 // Check if we need to perform an early draw-finish. 1356 flags |= (need_temp_dst || need_temp_src) ? FLAGS_TEMP_SRC_DST : 0; 1357 if (need_to_execute_draw((eC2DFlags)flags)) 1358 { 1359 finish_copybit(dev); 1360 } 1361 1362 if (need_temp_dst) { 1363 // copy the temp. destination without the alignment to the actual 1364 // destination. 1365 status = copy_image(dst_hnd, dst, CONVERT_TO_ANDROID_FORMAT); 1366 if (status == COPYBIT_FAILURE) { 1367 ALOGE("%s:copy_image failed in temp Dest",__FUNCTION__); 1368 delete_handle(dst_hnd); 1369 delete_handle(src_hnd); 1370 unmap_gpuaddr(ctx, mapped_dst_idx); 1371 unmap_gpuaddr(ctx, mapped_src_idx); 1372 return status; 1373 } 1374 // Clean the cache. 1375 IMemAlloc* memalloc = sAlloc->getAllocator(dst_hnd->flags); 1376 memalloc->clean_buffer((void *)(dst_hnd->base), dst_hnd->size, 1377 dst_hnd->offset, dst_hnd->fd, 1378 gralloc::CACHE_CLEAN); 1379 } 1380 delete_handle(dst_hnd); 1381 delete_handle(src_hnd); 1382 1383 ctx->is_premultiplied_alpha = false; 1384 ctx->fb_width = 0; 1385 ctx->fb_height = 0; 1386 ctx->config_mask = 0; 1387 return status; 1388 } 1389 1390 static int set_sync_copybit(struct copybit_device_t *dev, 1391 int /*acquireFenceFd*/) 1392 { 1393 if(!dev) 1394 return -EINVAL; 1395 1396 return 0; 1397 } 1398 1399 static int stretch_copybit( 1400 struct copybit_device_t *dev, 1401 struct copybit_image_t const *dst, 1402 struct copybit_image_t const *src, 1403 struct copybit_rect_t const *dst_rect, 1404 struct copybit_rect_t const *src_rect, 1405 struct copybit_region_t const *region) 1406 { 1407 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1408 int status = COPYBIT_SUCCESS; 1409 bool needsBlending = (ctx->src_global_alpha != 0); 1410 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1411 status = stretch_copybit_internal(dev, dst, src, dst_rect, src_rect, 1412 region, needsBlending); 1413 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1414 return status; 1415 } 1416 1417 /** Perform a blit type operation */ 1418 static int blit_copybit( 1419 struct copybit_device_t *dev, 1420 struct copybit_image_t const *dst, 1421 struct copybit_image_t const *src, 1422 struct copybit_region_t const *region) 1423 { 1424 int status = COPYBIT_SUCCESS; 1425 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1426 struct copybit_rect_t dr = { 0, 0, (int)dst->w, (int)dst->h }; 1427 struct copybit_rect_t sr = { 0, 0, (int)src->w, (int)src->h }; 1428 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1429 status = stretch_copybit_internal(dev, dst, src, &dr, &sr, region, false); 1430 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1431 return status; 1432 } 1433 1434 /** Fill the rect on dst with RGBA color **/ 1435 static int fill_color(struct copybit_device_t *dev, 1436 struct copybit_image_t const *dst, 1437 struct copybit_rect_t const *rect, 1438 uint32_t /*color*/) 1439 { 1440 // TODO: Implement once c2d driver supports color fill 1441 if(!dev || !dst || !rect) 1442 return -EINVAL; 1443 1444 return -EINVAL; 1445 } 1446 1447 /*****************************************************************************/ 1448 1449 static void clean_up(copybit_context_t* ctx) 1450 { 1451 void* ret; 1452 if (!ctx) 1453 return; 1454 1455 // stop the wait_cleanup_thread 1456 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1457 ctx->stop_thread = true; 1458 // Signal waiting thread 1459 pthread_cond_signal(&ctx->wait_cleanup_cond); 1460 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1461 // waits for the cleanup thread to exit 1462 pthread_join(ctx->wait_thread_id, &ret); 1463 pthread_mutex_destroy(&ctx->wait_cleanup_lock); 1464 pthread_cond_destroy (&ctx->wait_cleanup_cond); 1465 1466 for (int i = 0; i < NUM_SURFACE_TYPES; i++) { 1467 if (ctx->dst[i]) 1468 LINK_c2dDestroySurface(ctx->dst[i]); 1469 } 1470 1471 for (int i = 0; i < MAX_RGB_SURFACES; i++) { 1472 if (ctx->blit_rgb_object[i].surface_id) 1473 LINK_c2dDestroySurface(ctx->blit_rgb_object[i].surface_id); 1474 } 1475 1476 for (int i = 0; i < MAX_YUV_2_PLANE_SURFACES; i++) { 1477 if (ctx->blit_yuv_2_plane_object[i].surface_id) 1478 LINK_c2dDestroySurface(ctx->blit_yuv_2_plane_object[i].surface_id); 1479 } 1480 1481 for (int i = 0; i < MAX_YUV_3_PLANE_SURFACES; i++) { 1482 if (ctx->blit_yuv_3_plane_object[i].surface_id) 1483 LINK_c2dDestroySurface(ctx->blit_yuv_3_plane_object[i].surface_id); 1484 } 1485 1486 if (ctx->libc2d2) { 1487 ::dlclose(ctx->libc2d2); 1488 ALOGV("dlclose(libc2d2)"); 1489 } 1490 1491 free(ctx); 1492 } 1493 1494 /** Close the copybit device */ 1495 static int close_copybit(struct hw_device_t *dev) 1496 { 1497 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1498 if (ctx) { 1499 free_temp_buffer(ctx->temp_src_buffer); 1500 free_temp_buffer(ctx->temp_dst_buffer); 1501 } 1502 clean_up(ctx); 1503 return 0; 1504 } 1505 1506 /** Open a new instance of a copybit device using name */ 1507 static int open_copybit(const struct hw_module_t* module, const char* name, 1508 struct hw_device_t** device) 1509 { 1510 int status = COPYBIT_SUCCESS; 1511 if (strcmp(name, COPYBIT_HARDWARE_COPYBIT0)) { 1512 return COPYBIT_FAILURE; 1513 } 1514 1515 C2D_RGB_SURFACE_DEF surfDefinition = {0}; 1516 C2D_YUV_SURFACE_DEF yuvSurfaceDef = {0} ; 1517 struct copybit_context_t *ctx; 1518 1519 ctx = (struct copybit_context_t *)malloc(sizeof(struct copybit_context_t)); 1520 if(!ctx) { 1521 ALOGE("%s: malloc failed", __FUNCTION__); 1522 return COPYBIT_FAILURE; 1523 } 1524 1525 /* initialize drawstate */ 1526 memset(ctx, 0, sizeof(*ctx)); 1527 ctx->libc2d2 = ::dlopen("libC2D2.so", RTLD_NOW); 1528 if (!ctx->libc2d2) { 1529 ALOGE("FATAL ERROR: could not dlopen libc2d2.so: %s", dlerror()); 1530 clean_up(ctx); 1531 status = COPYBIT_FAILURE; 1532 *device = NULL; 1533 return status; 1534 } 1535 *(void **)&LINK_c2dCreateSurface = ::dlsym(ctx->libc2d2, 1536 "c2dCreateSurface"); 1537 *(void **)&LINK_c2dUpdateSurface = ::dlsym(ctx->libc2d2, 1538 "c2dUpdateSurface"); 1539 *(void **)&LINK_c2dReadSurface = ::dlsym(ctx->libc2d2, 1540 "c2dReadSurface"); 1541 *(void **)&LINK_c2dDraw = ::dlsym(ctx->libc2d2, "c2dDraw"); 1542 *(void **)&LINK_c2dFlush = ::dlsym(ctx->libc2d2, "c2dFlush"); 1543 *(void **)&LINK_c2dFinish = ::dlsym(ctx->libc2d2, "c2dFinish"); 1544 *(void **)&LINK_c2dWaitTimestamp = ::dlsym(ctx->libc2d2, 1545 "c2dWaitTimestamp"); 1546 *(void **)&LINK_c2dDestroySurface = ::dlsym(ctx->libc2d2, 1547 "c2dDestroySurface"); 1548 *(void **)&LINK_c2dMapAddr = ::dlsym(ctx->libc2d2, 1549 "c2dMapAddr"); 1550 *(void **)&LINK_c2dUnMapAddr = ::dlsym(ctx->libc2d2, 1551 "c2dUnMapAddr"); 1552 *(void **)&LINK_c2dGetDriverCapabilities = ::dlsym(ctx->libc2d2, 1553 "c2dGetDriverCapabilities"); 1554 *(void **)&LINK_c2dCreateFenceFD = ::dlsym(ctx->libc2d2, 1555 "c2dCreateFenceFD"); 1556 *(void **)&LINK_c2dFillSurface = ::dlsym(ctx->libc2d2, 1557 "c2dFillSurface"); 1558 1559 if (!LINK_c2dCreateSurface || !LINK_c2dUpdateSurface || !LINK_c2dReadSurface 1560 || !LINK_c2dDraw || !LINK_c2dFlush || !LINK_c2dWaitTimestamp || 1561 !LINK_c2dFinish || !LINK_c2dDestroySurface || 1562 !LINK_c2dGetDriverCapabilities || !LINK_c2dCreateFenceFD || 1563 !LINK_c2dFillSurface) { 1564 ALOGE("%s: dlsym ERROR", __FUNCTION__); 1565 clean_up(ctx); 1566 status = COPYBIT_FAILURE; 1567 *device = NULL; 1568 return status; 1569 } 1570 1571 ctx->device.common.tag = HARDWARE_DEVICE_TAG; 1572 ctx->device.common.version = 1; 1573 ctx->device.common.module = (hw_module_t*)(module); 1574 ctx->device.common.close = close_copybit; 1575 ctx->device.set_parameter = set_parameter_copybit; 1576 ctx->device.get = get; 1577 ctx->device.blit = blit_copybit; 1578 ctx->device.set_sync = set_sync_copybit; 1579 ctx->device.stretch = stretch_copybit; 1580 ctx->device.finish = finish_copybit; 1581 ctx->device.flush_get_fence = flush_get_fence_copybit; 1582 ctx->device.clear = clear_copybit; 1583 ctx->device.fill_color = fill_color; 1584 1585 /* Create RGB Surface */ 1586 surfDefinition.buffer = (void*)0xdddddddd; 1587 surfDefinition.phys = (void*)0xdddddddd; 1588 surfDefinition.stride = 1 * 4; 1589 surfDefinition.width = 1; 1590 surfDefinition.height = 1; 1591 surfDefinition.format = C2D_COLOR_FORMAT_8888_ARGB; 1592 if (LINK_c2dCreateSurface(&(ctx->dst[RGB_SURFACE]), C2D_TARGET | C2D_SOURCE, 1593 (C2D_SURFACE_TYPE)(C2D_SURFACE_RGB_HOST | 1594 C2D_SURFACE_WITH_PHYS | 1595 C2D_SURFACE_WITH_PHYS_DUMMY ), 1596 &surfDefinition)) { 1597 ALOGE("%s: create ctx->dst_surface[RGB_SURFACE] failed", __FUNCTION__); 1598 ctx->dst[RGB_SURFACE] = 0; 1599 clean_up(ctx); 1600 status = COPYBIT_FAILURE; 1601 *device = NULL; 1602 return status; 1603 } 1604 1605 unsigned int surface_id = 0; 1606 for (int i = 0; i < MAX_RGB_SURFACES; i++) 1607 { 1608 if (LINK_c2dCreateSurface(&surface_id, C2D_TARGET | C2D_SOURCE, 1609 (C2D_SURFACE_TYPE)(C2D_SURFACE_RGB_HOST | 1610 C2D_SURFACE_WITH_PHYS | 1611 C2D_SURFACE_WITH_PHYS_DUMMY ), 1612 &surfDefinition)) { 1613 ALOGE("%s: create RGB source surface %d failed", __FUNCTION__, i); 1614 ctx->blit_rgb_object[i].surface_id = 0; 1615 status = COPYBIT_FAILURE; 1616 break; 1617 } else { 1618 ctx->blit_rgb_object[i].surface_id = surface_id; 1619 ALOGW("%s i = %d surface_id=%d", __FUNCTION__, i, 1620 ctx->blit_rgb_object[i].surface_id); 1621 } 1622 } 1623 1624 if (status == COPYBIT_FAILURE) { 1625 clean_up(ctx); 1626 status = COPYBIT_FAILURE; 1627 *device = NULL; 1628 return status; 1629 } 1630 1631 // Create 2 plane YUV surfaces 1632 yuvSurfaceDef.format = C2D_COLOR_FORMAT_420_NV12; 1633 yuvSurfaceDef.width = 4; 1634 yuvSurfaceDef.height = 4; 1635 yuvSurfaceDef.plane0 = (void*)0xaaaaaaaa; 1636 yuvSurfaceDef.phys0 = (void*) 0xaaaaaaaa; 1637 yuvSurfaceDef.stride0 = 4; 1638 1639 yuvSurfaceDef.plane1 = (void*)0xaaaaaaaa; 1640 yuvSurfaceDef.phys1 = (void*) 0xaaaaaaaa; 1641 yuvSurfaceDef.stride1 = 4; 1642 if (LINK_c2dCreateSurface(&(ctx->dst[YUV_SURFACE_2_PLANES]), 1643 C2D_TARGET | C2D_SOURCE, 1644 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1645 C2D_SURFACE_WITH_PHYS | 1646 C2D_SURFACE_WITH_PHYS_DUMMY), 1647 &yuvSurfaceDef)) { 1648 ALOGE("%s: create ctx->dst[YUV_SURFACE_2_PLANES] failed", __FUNCTION__); 1649 ctx->dst[YUV_SURFACE_2_PLANES] = 0; 1650 clean_up(ctx); 1651 status = COPYBIT_FAILURE; 1652 *device = NULL; 1653 return status; 1654 } 1655 1656 for (int i=0; i < MAX_YUV_2_PLANE_SURFACES; i++) 1657 { 1658 if (LINK_c2dCreateSurface(&surface_id, C2D_TARGET | C2D_SOURCE, 1659 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1660 C2D_SURFACE_WITH_PHYS | 1661 C2D_SURFACE_WITH_PHYS_DUMMY ), 1662 &yuvSurfaceDef)) { 1663 ALOGE("%s: create YUV source %d failed", __FUNCTION__, i); 1664 ctx->blit_yuv_2_plane_object[i].surface_id = 0; 1665 status = COPYBIT_FAILURE; 1666 break; 1667 } else { 1668 ctx->blit_yuv_2_plane_object[i].surface_id = surface_id; 1669 ALOGW("%s: 2 Plane YUV i=%d surface_id=%d", __FUNCTION__, i, 1670 ctx->blit_yuv_2_plane_object[i].surface_id); 1671 } 1672 } 1673 1674 if (status == COPYBIT_FAILURE) { 1675 clean_up(ctx); 1676 status = COPYBIT_FAILURE; 1677 *device = NULL; 1678 return status; 1679 } 1680 1681 // Create YUV 3 plane surfaces 1682 yuvSurfaceDef.format = C2D_COLOR_FORMAT_420_YV12; 1683 yuvSurfaceDef.plane2 = (void*)0xaaaaaaaa; 1684 yuvSurfaceDef.phys2 = (void*) 0xaaaaaaaa; 1685 yuvSurfaceDef.stride2 = 4; 1686 1687 if (LINK_c2dCreateSurface(&(ctx->dst[YUV_SURFACE_3_PLANES]), 1688 C2D_TARGET | C2D_SOURCE, 1689 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1690 C2D_SURFACE_WITH_PHYS | 1691 C2D_SURFACE_WITH_PHYS_DUMMY), 1692 &yuvSurfaceDef)) { 1693 ALOGE("%s: create ctx->dst[YUV_SURFACE_3_PLANES] failed", __FUNCTION__); 1694 ctx->dst[YUV_SURFACE_3_PLANES] = 0; 1695 clean_up(ctx); 1696 status = COPYBIT_FAILURE; 1697 *device = NULL; 1698 return status; 1699 } 1700 1701 for (int i=0; i < MAX_YUV_3_PLANE_SURFACES; i++) 1702 { 1703 if (LINK_c2dCreateSurface(&(surface_id), 1704 C2D_TARGET | C2D_SOURCE, 1705 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1706 C2D_SURFACE_WITH_PHYS | 1707 C2D_SURFACE_WITH_PHYS_DUMMY), 1708 &yuvSurfaceDef)) { 1709 ALOGE("%s: create 3 plane YUV surface %d failed", __FUNCTION__, i); 1710 ctx->blit_yuv_3_plane_object[i].surface_id = 0; 1711 status = COPYBIT_FAILURE; 1712 break; 1713 } else { 1714 ctx->blit_yuv_3_plane_object[i].surface_id = surface_id; 1715 ALOGW("%s: 3 Plane YUV i=%d surface_id=%d", __FUNCTION__, i, 1716 ctx->blit_yuv_3_plane_object[i].surface_id); 1717 } 1718 } 1719 1720 if (status == COPYBIT_FAILURE) { 1721 clean_up(ctx); 1722 status = COPYBIT_FAILURE; 1723 *device = NULL; 1724 return status; 1725 } 1726 1727 if (LINK_c2dGetDriverCapabilities(&(ctx->c2d_driver_info))) { 1728 ALOGE("%s: LINK_c2dGetDriverCapabilities failed", __FUNCTION__); 1729 clean_up(ctx); 1730 status = COPYBIT_FAILURE; 1731 *device = NULL; 1732 return status; 1733 } 1734 // Initialize context variables. 1735 ctx->trg_transform = C2D_TARGET_ROTATE_0; 1736 1737 ctx->temp_src_buffer.fd = -1; 1738 ctx->temp_src_buffer.base = 0; 1739 ctx->temp_src_buffer.size = 0; 1740 1741 ctx->temp_dst_buffer.fd = -1; 1742 ctx->temp_dst_buffer.base = 0; 1743 ctx->temp_dst_buffer.size = 0; 1744 1745 ctx->fb_width = 0; 1746 ctx->fb_height = 0; 1747 1748 ctx->blit_rgb_count = 0; 1749 ctx->blit_yuv_2_plane_count = 0; 1750 ctx->blit_yuv_3_plane_count = 0; 1751 ctx->blit_count = 0; 1752 1753 ctx->wait_timestamp = false; 1754 ctx->stop_thread = false; 1755 pthread_mutex_init(&(ctx->wait_cleanup_lock), NULL); 1756 pthread_cond_init(&(ctx->wait_cleanup_cond), NULL); 1757 /* Start the wait thread */ 1758 pthread_attr_t attr; 1759 pthread_attr_init(&attr); 1760 pthread_attr_setdetachstate(&attr, PTHREAD_CREATE_JOINABLE); 1761 1762 pthread_create(&ctx->wait_thread_id, &attr, &c2d_wait_loop, 1763 (void *)ctx); 1764 pthread_attr_destroy(&attr); 1765 1766 *device = &ctx->device.common; 1767 return status; 1768 } 1769
