| /external/llvm/unittests/Option/ |
| OptionParsingTest.cpp | 70 std::unique_ptr<InputArgList> AL(
74 EXPECT_TRUE(AL->hasArg(OPT_A));
75 EXPECT_TRUE(AL->hasArg(OPT_B));
76 EXPECT_TRUE(AL->hasArg(OPT_C));
77 EXPECT_TRUE(AL->hasArg(OPT_D));
78 EXPECT_TRUE(AL->hasArg(OPT_E));
79 EXPECT_TRUE(AL->hasArg(OPT_F));
80 EXPECT_TRUE(AL->hasArg(OPT_G));
83 EXPECT_EQ(AL->getLastArgValue(OPT_B), "hi");
84 EXPECT_EQ(AL->getLastArgValue(OPT_C), "bye")
[all...] |
| /external/chromium_org/third_party/WebKit/Source/core/rendering/ |
| break_lines.cpp | 63 #define AL { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
97 AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, AL, // A-
[all...] |
| /system/core/libpixelflinger/tests/arch-arm64/assembler/ |
| arm64_assembler_test.cpp | 120 EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, AL, NV,
128 "HI", "LS","GE","LT", "GT", "LE", "AL", "NV"
181 {0xA000,INSTR_ADD,AL,AL,0,1,NA,1,MAX_32BIT ,NA,NA,NA,NA,1,0,0,0},
182 {0xA001,INSTR_ADD,AL,AL,0,1,NA,1,MAX_32BIT -1,NA,NA,NA,NA,1,MAX_32BIT,0,0},
183 {0xA002,INSTR_ADD,AL,AL,0,1,NA,0,NA,MAX_32BIT ,NA,NA,NA,1,0,0,0},
184 {0xA003,INSTR_ADD,AL,AL,0,1,NA,0,NA,MAX_32BIT -1,NA,NA,NA,1,MAX_32BIT,0,0}
[all...] |
| /art/compiler/utils/arm/ |
| assembler_thumb2.h | 38 next_condition_(AL) {
65 void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
67 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
69 void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
70 void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
72 void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
73 void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
75 void add(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
77 void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
79 void adc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE
[all...] |
| assembler_arm.h | 363 virtual void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
365 virtual void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
367 virtual void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
368 virtual void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
370 virtual void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
371 virtual void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
373 virtual void add(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
375 virtual void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
377 virtual void adc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
379 virtual void sbc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0
[all...] |
| assembler_arm32.h | 43 void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
45 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
47 void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
48 void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
50 void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
51 void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
53 void add(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
55 void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
57 void adc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
59 void sbc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE
[all...] |
| /system/core/libpixelflinger/codeflinger/ |
| texturing.cpp | 94 MLA(AL, 0, c, x.reg, dvdx, c);
102 MOV(AL, 0, end, reg_imm(parts.count.reg, LSR, 16));
103 MLA(AL, 1, end, dvdx, end, c);
105 BIC(AL, 0, c, c, reg_imm(c, ASR, 31));
162 AND(AL, 0, parts.iterated.reg,
165 MOV(AL, 0, parts.iterated.reg,
206 ADD(AL, 0, dx, fragment.reg, dx);
223 BIC(AL, 0, fragment.reg, fragment.reg,
353 ADD(AL, 0, Rx, Rx, reg_imm(txPtr.reg, ASR, 16)); // x += (s>>16)
355 ADD(AL, 0, Ry, Ry, reg_imm(txPtr.reg, ASR, 16)); // y += (t>>16
[all...] |
| load_store.cpp | 37 if (inc) STR(AL, s.reg, addr.reg, immed12_post(4));
38 else STR(AL, s.reg, addr.reg);
43 STRB(AL, s.reg, addr.reg, immed12_pre(0));
44 MOV(AL, 0, s.reg, reg_imm(s.reg, ROR, 8));
45 STRB(AL, s.reg, addr.reg, immed12_pre(1));
46 MOV(AL, 0, s.reg, reg_imm(s.reg, ROR, 8));
47 STRB(AL, s.reg, addr.reg, immed12_pre(2));
49 MOV(AL, 0, s.reg, reg_imm(s.reg, ROR, 16));
52 ADD(AL, 0, addr.reg, addr.reg, imm(3));
55 if (inc) STRH(AL, s.reg, addr.reg, immed8_post(2))
[all...] |
| GGLAssembler.cpp | 208 MOV(AL, 0, parts.count.reg,
210 ADD(AL, 0, parts.count.reg, parts.count.reg,
212 MOV(AL, 0, parts.count.reg,
265 AND(AL, 0, parts.dither.reg, parts.count.reg, imm(mask));
266 ADDR_ADD(AL, 0, parts.dither.reg, ctxtReg, parts.dither.reg);
267 LDRB(AL, parts.dither.reg, parts.dither.reg,
324 SUB(AL, S, parts.count.reg, parts.count.reg, imm(1<<16));
339 ADDR_ADD(AL, 0, parts.cbPtr.reg, parts.cbPtr.reg, imm(parts.cbPtr.size>>3));
341 SUB(AL, S, parts.count.reg, parts.count.reg, imm(1<<16));
367 SUB(AL, 0, parts.count.reg, parts.count.reg, Rx)
[all...] |
| blending.cpp | 47 LDRB(AL, fogColor.reg, mBuilderContext.Rctx,
55 BIC(AL, 0, factor.reg, factor.reg, reg_imm(factor.reg, ASR, 31));
56 CMP(AL, factor.reg, imm( 0x10000 ));
138 MOV(AL, 0, temp.reg, reg_imm(temp.reg, LSR, temp.l));
148 MOV(AL, 0, fragment.reg, reg_imm(temp.reg, LSR, temp.l));
298 RSB(AL, 0, factor.reg, factor.reg, imm((1<<factor.s)));
331 ADD(AL, 0, factor.reg, fb.reg, reg_imm(fb.reg, LSR, fb.s-1));
336 ADD(AL, 0, factor.reg, fragment.reg,
342 ADD(AL, 0, factor.reg, src_alpha.reg,
349 ADD(AL, 0, factor.reg, factor.reg
[all...] |
| Arm64Assembler.cpp | 163 "GE", "LT", "GT", "LE", "AL", "NV"
413 if(cc != AL)
454 if(cc != AL)
466 if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required
501 if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required
521 if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required
529 if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required
606 if(cc != AL)
616 if(cc != AL)
623 if(cc != AL)
[all...] |
| /prebuilts/python/darwin-x86/2.7.5/lib/python2.7/ |
| audiodev.py | 21 import AL
23 (48000, AL.RATE_48000),
24 (44100, AL.RATE_44100),
25 (32000, AL.RATE_32000),
26 (22050, AL.RATE_22050),
27 (16000, AL.RATE_16000),
28 (11025, AL.RATE_11025),
29 ( 8000, AL.RATE_8000),
32 (1, AL.MONO),
33 (2, AL.STEREO)
44 import al, AL namespace
61 import al, AL namespace
78 import al, AL namespace
119 import al, AL namespace
223 import al namespace
[all...] |
| /prebuilts/python/linux-x86/2.7.5/lib/python2.7/ |
| audiodev.py | 21 import AL
23 (48000, AL.RATE_48000),
24 (44100, AL.RATE_44100),
25 (32000, AL.RATE_32000),
26 (22050, AL.RATE_22050),
27 (16000, AL.RATE_16000),
28 (11025, AL.RATE_11025),
29 ( 8000, AL.RATE_8000),
32 (1, AL.MONO),
33 (2, AL.STEREO)
44 import al, AL namespace
61 import al, AL namespace
78 import al, AL namespace
119 import al, AL namespace
223 import al namespace
[all...] |
| /external/eigen/test/ |
| unalignedcount.cpp | 20 #define VERIFY_ALIGNED_UNALIGNED_COUNT(XPR,AL,UL,AS,US) {\
23 if(!(nb_load==AL && nb_loadu==UL && nb_store==AS && nb_storeu==US)) \
25 VERIFY( (#XPR) && nb_load==AL && nb_loadu==UL && nb_store==AS && nb_storeu==US ); \
|
| /external/chromium_org/third_party/icu/source/test/cintltst/ |
| cbididat.c | 23 "LRE", "LRO", "AL", "RLE", "RLO", "PDF", "NSM", "BN",
31 /* LRE LRO AL RLE RLO PDF NSM BN */
54 R, AL, WS, R, AL, WS, R
84 L, AL, AL, AL, L, AL, AL, L, WS, EN, CS, WS, EN, CS, EN, WS, L, L
99 AL, R, AL, WS, EN, CS, WS, EN, CS, EN, WS, R, R, WS, L,
[all...] |
| cbiditst.h | 48 #define AL U_RIGHT_TO_LEFT_ARABIC
|
| /external/icu/icu4c/source/test/cintltst/ |
| cbididat.c | 23 "LRE", "LRO", "AL", "RLE", "RLO", "PDF", "NSM", "BN",
31 /* LRE LRO AL RLE RLO PDF NSM BN */
54 R, AL, WS, R, AL, WS, R
84 L, AL, AL, AL, L, AL, AL, L, WS, EN, CS, WS, EN, CS, EN, WS, L, L
99 AL, R, AL, WS, EN, CS, WS, EN, CS, EN, WS, R, R, WS, L,
[all...] |
| cbiditst.h | 48 #define AL U_RIGHT_TO_LEFT_ARABIC
|
| /external/llvm/lib/Target/ARM/ |
| Thumb2RegisterInfo.h | 33 ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0,
|
| Thumb1RegisterInfo.h | 41 ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0,
|
| Thumb2RegisterInfo.cpp | 51 .addConstantPoolIndex(Idx).addImm((int64_t)ARMCC::AL).addReg(0)
|
| ARMAsmPrinter.cpp | [all...] |
| /art/compiler/utils/x86/ |
| constants_x86.h | 31 AL = 0,
|
| /external/chromium_org/third_party/mesa/src/src/mesa/x86/ |
| x86_cliptest.S | 88 * AL: ormask
157 MOV_B( REGIND(EBX), AL )
206 OR_B( CL, AL )
255 MOV_B( AL, REGIND(ECX) )
326 MOV_B( REGIND(EBX), AL )
372 OR_B( CL, AL )
389 MOV_B( AL, REGIND(ECX) )
|
| /external/mesa3d/src/mesa/x86/ |
| x86_cliptest.S | 88 * AL: ormask
157 MOV_B( REGIND(EBX), AL )
206 OR_B( CL, AL )
255 MOV_B( AL, REGIND(ECX) )
326 MOV_B( REGIND(EBX), AL )
372 OR_B( CL, AL )
389 MOV_B( AL, REGIND(ECX) )
|
