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      1 //===- Thumb1RegisterInfo.h - Thumb-1 Register Information Impl -*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file contains the Thumb-1 implementation of the TargetRegisterInfo
     11 // class.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #ifndef THUMB1REGISTERINFO_H
     16 #define THUMB1REGISTERINFO_H
     17 
     18 #include "ARMBaseRegisterInfo.h"
     19 #include "llvm/Target/TargetRegisterInfo.h"
     20 
     21 namespace llvm {
     22   class ARMSubtarget;
     23   class ARMBaseInstrInfo;
     24 
     25 struct Thumb1RegisterInfo : public ARMBaseRegisterInfo {
     26 public:
     27   Thumb1RegisterInfo(const ARMSubtarget &STI);
     28 
     29   const TargetRegisterClass *
     30   getLargestLegalSuperClass(const TargetRegisterClass *RC) const override;
     31 
     32   const TargetRegisterClass *
     33   getPointerRegClass(const MachineFunction &MF,
     34                      unsigned Kind = 0) const override;
     35 
     36   /// emitLoadConstPool - Emits a load from constpool to materialize the
     37   /// specified immediate.
     38   void
     39   emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
     40                     DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val,
     41                     ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0,
     42                     unsigned MIFlags = MachineInstr::NoFlags) const override;
     43 
     44   // rewrite MI to access 'Offset' bytes from the FP. Update Offset to be
     45   // however much remains to be handled. Return 'true' if no further
     46   // work is required.
     47   bool rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx,
     48                          unsigned FrameReg, int &Offset,
     49                          const ARMBaseInstrInfo &TII) const;
     50   void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
     51                          int64_t Offset) const override;
     52   bool saveScavengerRegister(MachineBasicBlock &MBB,
     53                              MachineBasicBlock::iterator I,
     54                              MachineBasicBlock::iterator &UseMI,
     55                              const TargetRegisterClass *RC,
     56                              unsigned Reg) const override;
     57   void eliminateFrameIndex(MachineBasicBlock::iterator II,
     58                            int SPAdj, unsigned FIOperandNum,
     59                            RegScavenger *RS = nullptr) const override;
     60 };
     61 }
     62 
     63 #endif // THUMB1REGISTERINFO_H
     64