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    Searched refs:ImplicitDefs (Results 1 - 13 of 13) sorted by null

  /external/llvm/include/llvm/MC/
MCInstrDesc.h 147 const uint16_t *ImplicitDefs; // Registers implicitly defined by this instr
530 return ImplicitDefs;
535 if (!ImplicitDefs) return 0;
537 for (; ImplicitDefs[i]; ++i) /*empty*/;
554 if (const uint16_t *ImpDefs = ImplicitDefs)
  /external/llvm/lib/CodeGen/SelectionDAG/
FastISel.cpp     [all...]
ScheduleDAGFast.cpp 437 assert(MCID.ImplicitDefs && "Physical reg def must be in implicit def list!");
515 if (!MCID.ImplicitDefs)
ScheduleDAGSDNodes.cpp 126 II.ImplicitDefs[ResNo - II.getNumDefs()] == Reg) {
    [all...]
ScheduleDAGRRList.cpp     [all...]
  /external/llvm/utils/TableGen/
CodeGenInstruction.h 219 /// ImplicitDefs/ImplicitUses - These are lists of registers that are
221 std::vector<Record*> ImplicitDefs, ImplicitUses;
CodeGenInstruction.cpp 332 ImplicitDefs = R->getValueAsListOfDefs("Defs");
364 if (ImplicitDefs.empty()) return MVT::Other;
367 Record *FirstImplicitDef = ImplicitDefs[0];
DAGISelMatcherGen.cpp     [all...]
CodeGenDAGPatterns.cpp     [all...]
  /external/llvm/lib/Target/ARM/
ARMFastISel.cpp 303 .addReg(II.ImplicitDefs[0]));
331 .addReg(II.ImplicitDefs[0]));
363 .addReg(II.ImplicitDefs[0]));
389 .addReg(II.ImplicitDefs[0]));
419 .addReg(II.ImplicitDefs[0]));
438 .addReg(II.ImplicitDefs[0]));
    [all...]
  /external/llvm/lib/Target/R600/
SIInstrInfo.cpp     [all...]
  /external/llvm/lib/CodeGen/
MachineInstr.cpp 538 if (MCID->ImplicitDefs)
    [all...]
  /external/llvm/lib/Target/PowerPC/
PPCInstrInfo.cpp     [all...]

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