| /art/compiler/dex/quick/ |
| dex_file_method_inliner.cc | 110 DCHECK_LT(arg, invoke->dalvikInsn.vA);
111 DCHECK(!MIR::DecodedInstruction::IsPseudoMirOp(invoke->dalvikInsn.opcode));
112 if (Instruction::FormatOf(invoke->dalvikInsn.opcode) == Instruction::k3rc) {
113 return invoke->dalvikInsn.vC + arg; // Non-range invoke.
115 DCHECK_EQ(Instruction::FormatOf(invoke->dalvikInsn.opcode), Instruction::k35c);
116 return invoke->dalvikInsn.arg[arg]; // Range invoke.
121 DCHECK_LT(arg + 1, invoke->dalvikInsn.vA);
122 DCHECK(!MIR::DecodedInstruction::IsPseudoMirOp(invoke->dalvikInsn.opcode));
123 return Instruction::FormatOf(invoke->dalvikInsn.opcode) == Instruction::k3rc ||
124 invoke->dalvikInsn.arg[arg + 1u] == invoke->dalvikInsn.arg[arg] + 1u
[all...] |
| mir_to_lir.cc | 328 DCHECK_EQ(mir->dalvikInsn.opcode, Instruction::RETURN_VOID);
393 Instruction::Code opcode = mir->dalvikInsn.opcode;
395 uint32_t vB = mir->dalvikInsn.vB;
396 uint32_t vC = mir->dalvikInsn.vC;
521 GenConstWide(rl_dest, mir->dalvikInsn.vB_wide);
[all...] |
| /art/compiler/dex/ |
| mir_optimization.cc | 56 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn;
135 if ((mir->dalvikInsn.opcode == Instruction::MOVE_RESULT) ||
136 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) ||
137 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_WIDE)) {
141 if (MIR::DecodedInstruction::IsPseudoMirOp(mir->dalvikInsn.opcode)) {
175 if (static_cast<int>(mir->dalvikInsn.opcode) == kMirOpPhi) {
187 switch (mir->dalvikInsn.opcode) {
342 Instruction::Code opcode = mir->dalvikInsn.opcode;
356 if (IsInstructionIfCcZ(mir_next->dalvikInsn.opcode) &&
359 mir_next->meta.ccode = ConditionCodeForIfCcZ(mir_next->dalvikInsn.opcode)
[all...] |
| global_value_numbering.cc | 111 (bb->last_mir_insn->dalvikInsn.opcode == Instruction::RETURN_VOID ||
112 bb->last_mir_insn->dalvikInsn.opcode == Instruction::RETURN ||
113 bb->last_mir_insn->dalvikInsn.opcode == Instruction::RETURN_OBJECT ||
114 bb->last_mir_insn->dalvikInsn.opcode == Instruction::RETURN_WIDE) &&
116 (static_cast<int>(bb->first_mir_insn->dalvikInsn.opcode) == kMirOpPhi &&
118 (static_cast<int>(bb->first_mir_insn->next->dalvikInsn.opcode) == kMirOpPhi &&
187 Instruction::Code last_opcode = pred_bb->last_mir_insn->dalvikInsn.opcode;
|
| mir_analysis.cc | 875 uint32_t ending_flags = analysis_attributes_[ending_bb->last_mir_insn->dalvikInsn.opcode];
878 ending_flags = analysis_attributes_[ending_bb->last_mir_insn->dalvikInsn.opcode];
905 if (MIR::DecodedInstruction::IsPseudoMirOp(mir->dalvikInsn.opcode)) {
909 uint32_t flags = analysis_attributes_[mir->dalvikInsn.opcode];
1125 if (mir->dalvikInsn.opcode >= Instruction::IGET &&
1126 mir->dalvikInsn.opcode <= Instruction::SPUT_SHORT) {
1131 if (mir->dalvikInsn.opcode <= Instruction::IPUT_SHORT) {
1241 if (mir->dalvikInsn.opcode >= Instruction::INVOKE_VIRTUAL &&
1242 mir->dalvikInsn.opcode <= Instruction::INVOKE_INTERFACE_RANGE &&
1243 mir->dalvikInsn.opcode != Instruction::RETURN_VOID_BARRIER)
[all...] |
| vreg_analysis.cc | 218 if ((mir->dalvikInsn.opcode == Instruction::RETURN) ||
219 (mir->dalvikInsn.opcode == Instruction::RETURN_WIDE) ||
220 (mir->dalvikInsn.opcode == Instruction::RETURN_OBJECT)) {
253 Instruction::Code opcode = mir->dalvikInsn.opcode;
255 0 : Instruction::FlagsOf(mir->dalvikInsn.opcode);
259 int target_idx = mir->dalvikInsn.vB;
265 if (move_result_mir && (move_result_mir->dalvikInsn.opcode !=
277 int num_uses = mir->dalvikInsn.vA;
279 if (((mir->dalvikInsn.opcode != Instruction::INVOKE_STATIC) &&
280 (mir->dalvikInsn.opcode != Instruction::INVOKE_STATIC_RANGE)))
[all...] |
| mir_graph.cc | 233 DCHECK(static_cast<int>(insn->dalvikInsn.opcode) == kMirOpCheck ||
234 !MIR::DecodedInstruction::IsPseudoMirOp(insn->dalvikInsn.opcode));
242 int opcode = p->dalvikInsn.opcode;
403 switch (insn->dalvikInsn.opcode) {
407 target += insn->dalvikInsn.vA;
416 target += insn->dalvikInsn.vC;
425 target += insn->dalvikInsn.vB;
428 LOG(FATAL) << "Unexpected opcode(" << insn->dalvikInsn.opcode << ") with kBranch set";
469 reinterpret_cast<const uint16_t*>(GetCurrentInsns() + cur_offset + insn->dalvikInsn.vB);
485 if (insn->dalvikInsn.opcode == Instruction::PACKED_SWITCH)
[all...] |
| post_opt_passes.cc | 64 Instruction::Code opcode = mir->dalvikInsn.opcode;
|
| mir_dataflow.cc | 941 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn;
980 HandleExtended(use_v, def_v, live_in_v, mir->dalvikInsn);
1040 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn;
1053 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn;
1065 switch (static_cast<int>(mir->dalvikInsn.opcode)) {
1067 LOG(ERROR) << "Missing case for extended MIR: " << mir->dalvikInsn.opcode;
1087 if (!MIR::DecodedInstruction::IsPseudoMirOp(mir->dalvikInsn.opcode)) {
1088 int flags = Instruction::FlagsOf(mir->dalvikInsn.opcode);
1146 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn;
[all...] |
| local_value_numbering.cc | 467 if ((Instruction::FlagsOf(mir->dalvikInsn.opcode) & Instruction::kInvoke) != 0) {
[all...] |
| ssa_transformation.cc | 534 phi->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpPhi);
535 phi->dalvikInsn.vA = dalvik_reg;
550 if (mir->dalvikInsn.opcode != static_cast<Instruction::Code>(kMirOpPhi))
|
| local_value_numbering_test.cc | 139 mir->dalvikInsn.opcode = def->opcode;
140 mir->dalvikInsn.vB = static_cast<int32_t>(def->value);
141 mir->dalvikInsn.vB_wide = def->value;
156 mir->dalvikInsn.opcode = def->opcode;
|
| frontend.cc | 584 int opcode = mir->dalvikInsn.opcode;
590 << mir->dalvikInsn.opcode;
603 uint32_t invoke_method_idx = mir->dalvikInsn.vB;
|
| mir_graph.h | 346 } dalvikInsn;
377 return SSARepresentation::GetStartUseIndex(dalvikInsn.opcode);
[all...] |
| mir_optimization_test.cc | 163 mir->dalvikInsn.opcode = def->opcode;
|
| global_value_numbering_test.cc | 241 mir->dalvikInsn.opcode = def->opcode;
242 mir->dalvikInsn.vB = static_cast<int32_t>(def->value);
243 mir->dalvikInsn.vB_wide = def->value;
264 mir->dalvikInsn.opcode = def->opcode;
[all...] |
| /art/compiler/dex/quick/x86/ |
| target_x86.cc | [all...] |
| utility_x86.cc | [all...] |
| int_x86.cc | 283 int true_val = mir->dalvikInsn.vB;
284 int false_val = mir->dalvikInsn.vC;
[all...] |
| /art/compiler/dex/portable/ |
| mir_to_gbc.cc | 708 Instruction::Code opcode = mir->dalvikInsn.opcode;
710 uint32_t vB = mir->dalvikInsn.vB;
711 uint32_t vC = mir->dalvikInsn.vC;
814 irb_->getJLong(mir->dalvikInsn.vB_wide);
[all...] |
| /art/compiler/dex/quick/arm/ |
| int_arm.cc | 241 int true_val = mir->dalvikInsn.vB;
242 int false_val = mir->dalvikInsn.vC;
[all...] |
| /art/compiler/dex/quick/arm64/ |
| int_arm64.cc | 194 GenSelect(mir->dalvikInsn.vB, mir->dalvikInsn.vC, mir->meta.ccode, rl_result.reg,
[all...] |
