| /external/llvm/include/llvm/MC/ |
| MCSubtargetInfo.h | 87 /// getSchedModel - Get the machine model for this subtarget's CPU.
89 const MCSchedModel *getSchedModel() const { return CPUSchedModel; }
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| /external/llvm/lib/Target/AArch64/ |
| AArch64StorePairSuppress.cpp | 126 SchedModel.init(*ST.getSchedModel(), &ST, TII);
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| AArch64ConditionalCompares.cpp | 897 MF.getTarget().getSubtarget<TargetSubtargetInfo>().getSchedModel();
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| /external/llvm/include/llvm/CodeGen/ |
| ScheduleDAGInstrs.h | 171 const TargetSchedModel *getSchedModel() const { return &SchedModel; }
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonMachineScheduler.cpp | 200 SchedModel = DAG->getSchedModel();
207 const InstrItineraryData *Itin = DAG->getSchedModel()->getInstrItineraries();
216 Top.ResourceModel = new VLIWResourceModel(TM, DAG->getSchedModel());
217 Bot.ResourceModel = new VLIWResourceModel(TM, DAG->getSchedModel());
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| /external/llvm/lib/CodeGen/ |
| BasicTargetTransformInfo.cpp | 229 else if (ST->getSchedModel()->LoopMicroOpBufferSize > 0)
230 MaxOps = ST->getSchedModel()->LoopMicroOpBufferSize;
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| EarlyIfConversion.cpp | 788 MF.getTarget().getSubtarget<TargetSubtargetInfo>().getSchedModel();
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| MachineTraceMetrics.cpp | 61 SchedModel.init(*ST.getSchedModel(), &ST, TII);
[all...] |
| IfConversion.cpp | 280 SchedModel.init(*ST.getSchedModel(), &ST, TII);
[all...] |
| ScheduleDAGInstrs.cpp | 67 SchedModel.init(*ST.getSchedModel(), &ST, TII);
[all...] |
| MachineScheduler.cpp | [all...] |
| /external/llvm/lib/MC/MCDisassembler/ |
| Disassembler.cpp | 205 const MCSchedModel *SCModel = STI->getSchedModel();
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