OpenGrok
Home
Sort by relevance
Sort by last modified time
Full Search
Definition
Symbol
File Path
History
|
|
Help
Searched
refs:pp_txfilter
(Results
1 - 15
of
15
) sorted by null
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/
radeon_tex.c
67
t->
pp_txfilter
&= ~(RADEON_CLAMP_S_MASK | RADEON_CLAMP_T_MASK | RADEON_BORDER_MODE_D3D);
71
t->
pp_txfilter
|= RADEON_CLAMP_S_WRAP;
74
t->
pp_txfilter
|= RADEON_CLAMP_S_CLAMP_GL;
78
t->
pp_txfilter
|= RADEON_CLAMP_S_CLAMP_LAST;
81
t->
pp_txfilter
|= RADEON_CLAMP_S_CLAMP_GL;
85
t->
pp_txfilter
|= RADEON_CLAMP_S_MIRROR;
88
t->
pp_txfilter
|= RADEON_CLAMP_S_MIRROR_CLAMP_GL;
92
t->
pp_txfilter
|= RADEON_CLAMP_S_MIRROR_CLAMP_LAST;
95
t->
pp_txfilter
|= RADEON_CLAMP_S_MIRROR_CLAMP_GL;
105
t->
pp_txfilter
|= RADEON_CLAMP_T_WRAP
[
all
...]
radeon_texstate.c
669
t->
pp_txfilter
|= tx_table[MESA_FORMAT_ARGB8888].filter;
675
t->
pp_txfilter
|= tx_table[MESA_FORMAT_RGB888].filter;
680
t->
pp_txfilter
|= tx_table[MESA_FORMAT_RGB565].filter;
792
cmd[TEX_PP_TXFILTER] |= texobj->
pp_txfilter
& TEXOBJ_TXFILTER_MASK;
997
t->
pp_txfilter
&= ~RADEON_YUV_TO_RGB;
1000
t->
pp_txfilter
|= table[ firstImage->TexFormat ].filter;
1008
t->
pp_txfilter
&= ~RADEON_MAX_MIP_LEVEL_MASK;
1009
t->
pp_txfilter
|= (t->maxLod - t->minLod) << RADEON_MAX_MIP_LEVEL_SHIFT;
[
all
...]
radeon_common_context.h
205
GLuint
pp_txfilter
; /* hardware register values */
member in struct:radeon_tex_obj
/external/mesa3d/src/mesa/drivers/dri/radeon/
radeon_tex.c
67
t->
pp_txfilter
&= ~(RADEON_CLAMP_S_MASK | RADEON_CLAMP_T_MASK | RADEON_BORDER_MODE_D3D);
71
t->
pp_txfilter
|= RADEON_CLAMP_S_WRAP;
74
t->
pp_txfilter
|= RADEON_CLAMP_S_CLAMP_GL;
78
t->
pp_txfilter
|= RADEON_CLAMP_S_CLAMP_LAST;
81
t->
pp_txfilter
|= RADEON_CLAMP_S_CLAMP_GL;
85
t->
pp_txfilter
|= RADEON_CLAMP_S_MIRROR;
88
t->
pp_txfilter
|= RADEON_CLAMP_S_MIRROR_CLAMP_GL;
92
t->
pp_txfilter
|= RADEON_CLAMP_S_MIRROR_CLAMP_LAST;
95
t->
pp_txfilter
|= RADEON_CLAMP_S_MIRROR_CLAMP_GL;
105
t->
pp_txfilter
|= RADEON_CLAMP_T_WRAP
[
all
...]
radeon_texstate.c
669
t->
pp_txfilter
|= tx_table[MESA_FORMAT_ARGB8888].filter;
675
t->
pp_txfilter
|= tx_table[MESA_FORMAT_RGB888].filter;
680
t->
pp_txfilter
|= tx_table[MESA_FORMAT_RGB565].filter;
792
cmd[TEX_PP_TXFILTER] |= texobj->
pp_txfilter
& TEXOBJ_TXFILTER_MASK;
997
t->
pp_txfilter
&= ~RADEON_YUV_TO_RGB;
1000
t->
pp_txfilter
|= table[ firstImage->TexFormat ].filter;
1008
t->
pp_txfilter
&= ~RADEON_MAX_MIP_LEVEL_MASK;
1009
t->
pp_txfilter
|= (t->maxLod - t->minLod) << RADEON_MAX_MIP_LEVEL_SHIFT;
[
all
...]
radeon_common_context.h
205
GLuint
pp_txfilter
; /* hardware register values */
member in struct:radeon_tex_obj
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/
r200_tex.c
76
t->
pp_txfilter
&= ~(R200_CLAMP_S_MASK | R200_CLAMP_T_MASK | R200_BORDER_MODE_D3D);
80
t->
pp_txfilter
|= R200_CLAMP_S_WRAP;
83
t->
pp_txfilter
|= R200_CLAMP_S_CLAMP_GL;
87
t->
pp_txfilter
|= R200_CLAMP_S_CLAMP_LAST;
90
t->
pp_txfilter
|= R200_CLAMP_S_CLAMP_GL;
94
t->
pp_txfilter
|= R200_CLAMP_S_MIRROR;
97
t->
pp_txfilter
|= R200_CLAMP_S_MIRROR_CLAMP_GL;
101
t->
pp_txfilter
|= R200_CLAMP_S_MIRROR_CLAMP_LAST;
104
t->
pp_txfilter
|= R200_CLAMP_S_MIRROR_CLAMP_GL;
114
t->
pp_txfilter
|= R200_CLAMP_T_WRAP
[
all
...]
r200_texstate.c
794
t->
pp_txfilter
|= tx_table_le[MESA_FORMAT_ARGB8888].filter;
800
t->
pp_txfilter
|= tx_table_le[MESA_FORMAT_RGB888].filter;
805
t->
pp_txfilter
|= tx_table_le[MESA_FORMAT_RGB565].filter;
1080
cmd[TEX_PP_TXFILTER] |= texobj->
pp_txfilter
& TEXOBJ_TXFILTER_MASK;
[
all
...]
/external/mesa3d/src/mesa/drivers/dri/r200/
r200_tex.c
76
t->
pp_txfilter
&= ~(R200_CLAMP_S_MASK | R200_CLAMP_T_MASK | R200_BORDER_MODE_D3D);
80
t->
pp_txfilter
|= R200_CLAMP_S_WRAP;
83
t->
pp_txfilter
|= R200_CLAMP_S_CLAMP_GL;
87
t->
pp_txfilter
|= R200_CLAMP_S_CLAMP_LAST;
90
t->
pp_txfilter
|= R200_CLAMP_S_CLAMP_GL;
94
t->
pp_txfilter
|= R200_CLAMP_S_MIRROR;
97
t->
pp_txfilter
|= R200_CLAMP_S_MIRROR_CLAMP_GL;
101
t->
pp_txfilter
|= R200_CLAMP_S_MIRROR_CLAMP_LAST;
104
t->
pp_txfilter
|= R200_CLAMP_S_MIRROR_CLAMP_GL;
114
t->
pp_txfilter
|= R200_CLAMP_T_WRAP
[
all
...]
r200_texstate.c
794
t->
pp_txfilter
|= tx_table_le[MESA_FORMAT_ARGB8888].filter;
800
t->
pp_txfilter
|= tx_table_le[MESA_FORMAT_RGB888].filter;
805
t->
pp_txfilter
|= tx_table_le[MESA_FORMAT_RGB565].filter;
1080
cmd[TEX_PP_TXFILTER] |= texobj->
pp_txfilter
& TEXOBJ_TXFILTER_MASK;
[
all
...]
/bionic/libc/kernel/uapi/drm/
radeon_drm.h
372
unsigned int
pp_txfilter
;
member in struct:__anon263
[
all
...]
/external/kernel-headers/original/uapi/drm/
radeon_drm.h
405
unsigned int
pp_txfilter
;
member in struct:__anon27449
[
all
...]
/hardware/intel/img/libdrm/shared-core/
radeon_drm.h
402
unsigned int
pp_txfilter
;
member in struct:__anon40917
/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.6/sysroot/usr/include/drm/
radeon_drm.h
405
unsigned int
pp_txfilter
;
member in struct:__anon46475
/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/drm/
radeon_drm.h
405
unsigned int
pp_txfilter
;
member in struct:__anon48211
Completed in 140 milliseconds