| /art/compiler/dex/ |
| local_value_numbering.h | 47 uint16_t GetSRegValueName(uint16_t s_reg) const {
48 return GetOperandValue(s_reg);
59 bool IsSregValue(uint16_t s_reg, uint16_t value_name) const {
60 auto it = sreg_value_map_.find(s_reg);
64 return gvn_->HasValue(kNoValue, s_reg, kNoValue, kNoValue, value_name);
102 // Key is s_reg, value is value name.
105 void SetOperandValueImpl(uint16_t s_reg, uint16_t value, SregValueMap* map) {
106 DCHECK_EQ(map->count(s_reg), 0u) << PrettyMethod(gvn_->cu_->method_idx, *gvn_->cu_->dex_file)
107 << " LVN id: " << id_ << ", s_reg: " << s_reg; local
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| vreg_analysis.cc | 467 int s_reg = num_regs - num_ins; local
470 reg_location_[s_reg].defined = true;
471 reg_location_[s_reg].ref = true;
472 s_reg++;
479 reg_location_[s_reg].wide = true;
480 reg_location_[s_reg+1].high_word = true;
481 reg_location_[s_reg+1].fp = true;
482 DCHECK_EQ(SRegToVReg(s_reg)+1, SRegToVReg(s_reg+1));
483 reg_location_[s_reg].fp = true
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| global_value_numbering.cc | 128 int s_reg = pred_bb->last_mir_insn->ssa_rep->uses[0]; local
129 uint16_t value_name = merge_lvns_[0]->GetSRegValueName(s_reg);
208 int s_reg = pred_bb->last_mir_insn->ssa_rep->uses[0]; local
209 if (!pred_lvn->IsSregValue(s_reg, value_name)) {
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| mir_graph.h | 709 bool IsConst(int32_t s_reg) const {
710 return is_constant_v_->IsBitSet(s_reg);
722 int32_t ConstantValue(int32_t s_reg) const {
723 DCHECK(IsConst(s_reg));
724 return constant_values_[s_reg];
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| mir_dataflow.cc | 1329 int s_reg = mir->ssa_rep->uses[i]; local
[all...] |
| local_value_numbering.cc | 1051 int s_reg = uses[pos]; local
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| mir_optimization.cc | 230 int MIRGraph::GetSSAUseCount(int s_reg) {
231 return raw_use_counts_.Get(s_reg);
[all...] |
| /art/compiler/dex/quick/ |
| ralloc_util.cc | 220 void Mir2Lir::ClobberSReg(int s_reg) {
221 if (s_reg != INVALID_SREG) {
222 if (kIsDebugBuild && s_reg == live_sreg_) {
227 if (info->SReg() == s_reg) {
251 int Mir2Lir::SRegToPMap(int s_reg) {
252 DCHECK_LT(s_reg, mir_graph_->GetNumSSARegs());
253 DCHECK_GE(s_reg, 0);
254 int v_reg = mir_graph_->SRegToVReg(s_reg);
272 void Mir2Lir::RecordCorePromotion(RegStorage reg, int s_reg) {
273 int p_map_idx = SRegToPMap(s_reg);
826 int s_reg = loc.s_reg_low; local
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| mir_to_lir.h | 257 int s_reg; member in struct:art::Mir2Lir::RefCounts
274 * is the low half by looking at the s_reg names. The high s_reg will equal low_sreg + 1.
277 * will be true and partner==self. s_reg refers to the low-order word of the Dalvik
278 * value, and the s_reg of the high word is implied (s_reg + 1).
283 * meaning. If is_temp==true and live==true, wide_value, partner, dirty, s_reg, def_start
285 * the Dalvik value[s] described by s_reg/s_reg+1.
311 * desired s_reg. This gets a little complicated when dealing with aliased registers. Al
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| /external/lldb/source/Plugins/Instruction/ARM/ |
| EmulationStateARM.cpp | 85 m_vfp_regs.sd_regs[idx / 2].s_reg[idx % 2] = (uint32_t) value;
113 value = m_vfp_regs.sd_regs[idx / 2].s_reg[idx % 2];
294 if (m_vfp_regs.sd_regs[i].s_reg[0] != other_state.m_vfp_regs.sd_regs[i].s_reg[0])
297 if (m_vfp_regs.sd_regs[i].s_reg[1] != other_state.m_vfp_regs.sd_regs[i].s_reg[1])
|
| EmulationStateARM.h | 87 uint32_t s_reg[2]; member in union:EmulationStateARM::sd_regs::__anon29896
|
| /art/compiler/dex/portable/ |
| mir_to_gbc.h | 87 ::llvm::Value* GetLLVMValue(int s_reg);
88 void SetVregOnValue(::llvm::Value* val, int s_reg);
89 void DefineValueOnly(::llvm::Value* val, int s_reg);
90 void DefineValue(::llvm::Value* val, int s_reg);
|
| mir_to_gbc.cc | 66 ::llvm::Value* MirConverter::GetLLVMValue(int s_reg) {
67 return llvm_values_.Get(s_reg);
70 void MirConverter::SetVregOnValue(::llvm::Value* val, int s_reg) {
74 int v_reg = mir_graph_->SRegToVReg(s_reg);
81 void MirConverter::DefineValueOnly(::llvm::Value* val, int s_reg) {
82 ::llvm::Value* placeholder = GetLLVMValue(s_reg);
90 llvm_values_.Put(s_reg, val);
96 void MirConverter::DefineValue(::llvm::Value* val, int s_reg) {
97 DefineValueOnly(val, s_reg);
98 SetVregOnValue(val, s_reg);
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| /art/compiler/dex/quick/arm/ |
| target_arm.cc | 754 * an even numbered reg. It is possible that the paired s_reg (s_reg+1)
757 * s_reg<=sX[even] & (s_reg+1)<= sX+1.
760 RegStorage ArmMir2Lir::AllocPreservedDouble(int s_reg) {
762 int v_reg = mir_graph_->SRegToVReg(s_reg);
763 int p_map_idx = SRegToPMap(s_reg);
810 RegStorage ArmMir2Lir::AllocPreservedSingle(int s_reg) {
816 int p_map_idx = SRegToPMap(s_reg);
817 int v_reg = mir_graph_->SRegToVReg(s_reg);
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| codegen_arm.h | 177 RegStorage AllocPreservedDouble(int s_reg);
178 RegStorage AllocPreservedSingle(int s_reg);
|
