| /external/libhevc/common/arm64/ |
| ihevc_intra_pred_chroma_mode2.s | 116 add x0,x0,x4,lsl #2
146 lsl x5, x3, #2
193 add x20, x2, x3, lsl #2
208 add x20, x0, x4,lsl #1
257 lsl x12,x4,#1
|
| ihevc_inter_pred_chroma_horz.s | 138 lsl x5, x10, #1
167 sub x20,x5,x3,lsl #1
169 add x20,x12, x2 , lsl #1
177 add x20,x4, x2 , lsl #1
231 // add x20,x12, x2 , lsl #1
233 // add x20,x4, x2 , lsl #1
251 add x20,x12, x2 , lsl #2
279 add x20,x4, x2 , lsl #2
517 add x12,x12,x2,lsl #1
518 add x1,x1,x3,lsl #
[all...] |
| ihevc_inter_pred_filters_luma_vert.s | 129 sub x12,x2,x2,lsl #2 //src_ctrd & pi1_coeff
148 sub x20,x4,x6,lsl #2 //x6->dst_strd x5 ->wd
150 sub x20,x4,x2,lsl #2 //x2->src_strd
197 add x20,x3, x2, lsl #1
204 add x20,x3, x2, lsl #1
309 add x10, x3, x2, lsl #3 // 10*strd - 8+2
328 add x20,x10, x2, lsl #1
335 add x20,x10, x2, lsl #1
440 sub x20,x5,x6,lsl #2 //x6->dst_strd x5 ->wd
442 sub x20,x5,x2,lsl #2 //x2->src_str
[all...] |
| ihevc_intra_pred_chroma_planar.s | 128 add x6, x0,x6,lsl #1 //2*(nt-1)
133 add x6, x4, x4,lsl #1 //3nt
135 lsl x6,x6,#1 //2*(3nt + 1)
145 lsl x14,x14,#1 //2*(2nt+1)
147 lsl x6,x6,#1 //2*(2nt-1)
322 sub x2,x2,x3,lsl #4
|
| /external/llvm/test/MC/AArch64/ |
| arm64-advsimd.s | 778 bic.2s v0, #1, lsl #0
779 bic.2s v0, #1, lsl #8
780 bic.2s v0, #1, lsl #16
781 bic.2s v0, #1, lsl #24
785 ; CHECK: bic.2s v0, #0x1, lsl #8 ; encoding: [0x20,0x34,0x00,0x2f]
786 ; CHECK: bic.2s v0, #0x1, lsl #16 ; encoding: [0x20,0x54,0x00,0x2f]
787 ; CHECK: bic.2s v0, #0x1, lsl #24 ; encoding: [0x20,0x74,0x00,0x2f]
790 bic.4h v0, #1, lsl #0
791 bic.4h v0, #1, lsl #8
795 ; CHECK: bic.4h v0, #0x1, lsl #8 ; encoding: [0x20,0xb4,0x00,0x2f
[all...] |
| basic-a64-instructions.s | 249 // LSL variant if sp involved
250 sub sp, x3, x7, lsl #4
251 add w2, wsp, w3, lsl #1
252 cmp wsp, w9, lsl #0
253 adds wzr, wsp, w3, lsl #4
254 subs x3, sp, x9, lsl #2
255 // CHECK: sub sp, x3, x7, lsl #4 // encoding: [0x7f,0x70,0x27,0xcb]
256 // CHECK: add w2, wsp, w3, lsl #1 // encoding: [0xe2,0x47,0x23,0x0b]
258 // CHECK: cmn wsp, w3, lsl #4 // encoding: [0xff,0x53,0x23,0x2b]
259 // CHECK: subs x3, sp, x9, lsl #2 // encoding: [0xe3,0x6b,0x29,0xeb
[all...] |
| arm64-aliases.s | 43 ands wzr, w1, w2, lsl #2
44 ands xzr, x1, x2, lsl #3
45 tst w3, w7, lsl #31
52 ; CHECK: tst w1, w2, lsl #2 ; encoding: [0x3f,0x08,0x02,0x6a]
53 ; CHECK: tst x1, x2, lsl #3 ; encoding: [0x3f,0x0c,0x02,0xea]
54 ; CHECK: tst w3, w7, lsl #31 ; encoding: [0x7f,0x7c,0x07,0x6a]
60 cmn w1, #3, lsl #0
70 ; CHECK: cmn x2, #1024, lsl #12 ; encoding: [0x5f,0x00,0x50,0xb1]
82 cmp w1, #1024, lsl #12
93 cmp wsp, w9, lsl #
[all...] |
| /external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/arm/neon/ |
| vp9_idct8x8_add_neon.asm | 364 mov r12, r3, lsl #1
366 mov r12, r4, lsl #1
372 mov r12, r6, lsl #1
379 mov r12, r5, lsl #1
385 mov r12, r7, lsl #1
392 mov r12, r8, lsl #1
398 mov r12, r9, lsl #1
|
| /external/libhevc/common/arm/ |
| ihevc_inter_pred_filters_luma_vert_w16inp.s | 115 mov r2, r2, lsl #1
116 sub r12,r2,r2,lsl #2 @src_ctrd & pi1_coeff
132 rsb r9,r5,r6,lsl #2 @r6->dst_strd r5 ->wd
133 rsb r8,r5,r2,lsl #2 @r2->src_strd
139 @mov r2, r2, lsl #1
165 addle r0,r0,r8,lsl #0
223 addle r0,r0,r8,lsl #0
|
| ihevc_intra_pred_chroma_planar.s | 126 add r6, r0,r6,lsl #1 @2*(nt-1)
130 add r6, r4, r4,lsl #1 @3nt
132 lsl r6,r6,#1 @2*(3nt + 1)
141 lsl r14,#1 @2*(2nt+1)
143 lsl r6,#1 @2*(2nt-1)
312 sub r2,r2,r3,lsl #4
|
| /external/libvpx/libvpx/vp8/common/arm/neon/ |
| loopfilter_neon.asm | 29 sub r2, r0, r1, lsl #2 ; move src pointer down by 4 lines
45 sub r2, r2, r1, lsl #1
46 sub r12, r12, r1, lsl #1
73 sub r3, r0, r1, lsl #2 ; move u pointer down by 4 lines
74 sub r12, r2, r1, lsl #2 ; move v pointer down by 4 lines
95 sub r0, r0, r1, lsl #1
96 sub r2, r2, r1, lsl #1
|
| sixtappredict16x16_neon.asm | 54 add r2, r12, r2, lsl #5 ;calculate filter location
70 sub r0, r0, r1, lsl #1
87 pld [r0, r1, lsl #1]
200 add r3, r12, r3, lsl #5
288 sub r4, r4, r5, lsl #4
392 add r3, r12, r3, lsl #5
393 sub r0, r0, r1, lsl #1
475 sub r0, r0, r1, lsl #4
476 sub r0, r0, r1, lsl #2
480 sub r4, r4, r5, lsl #
[all...] |
| sixtappredict4x4_neon.asm | 46 add r2, r12, r2, lsl #5 ;calculate filter location
57 sub r0, r0, r1, lsl #1 ;go back 2 lines of src data
73 pld [r0, r1, lsl #1]
203 add r3, r12, r3, lsl #5
356 sub r0, r0, r1, lsl #1
357 add r3, r12, r3, lsl #5
|
| /external/libvpx/libvpx/vp9/common/arm/neon/ |
| vp9_idct8x8_add_neon.asm | 364 mov r12, r3, lsl #1
366 mov r12, r4, lsl #1
372 mov r12, r6, lsl #1
379 mov r12, r5, lsl #1
385 mov r12, r7, lsl #1
392 mov r12, r8, lsl #1
398 mov r12, r9, lsl #1
|
| /external/valgrind/main/coregrind/m_dispatch/ |
| dispatch-arm64-linux.S | 146 4 = movk x9, disp_cp_chain_me_to_slowEP[31:16], lsl 16
147 4 = movk x9, disp_cp_chain_me_to_slowEP[47:32], lsl 32
148 4 = movk x9, disp_cp_chain_me_to_slowEP[63:48], lsl 48
164 4 = movk x9, disp_cp_chain_me_to_fastEP[31:16], lsl 16
165 4 = movk x9, disp_cp_chain_me_to_fastEP[47:32], lsl 32
166 4 = movk x9, disp_cp_chain_me_to_fastEP[63:48], lsl 48
193 add x1, x4, x2, LSL #4 // r1 = &tt_fast[entry#]
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/neon/ |
| loopfilter_neon.asm | 29 sub r2, r0, r1, lsl #2 ; move src pointer down by 4 lines
45 sub r2, r2, r1, lsl #1
46 sub r12, r12, r1, lsl #1
73 sub r3, r0, r1, lsl #2 ; move u pointer down by 4 lines
74 sub r12, r2, r1, lsl #2 ; move v pointer down by 4 lines
95 sub r0, r0, r1, lsl #1
96 sub r2, r2, r1, lsl #1
|
| sixtappredict16x16_neon.asm | 54 add r2, r12, r2, lsl #5 ;calculate filter location
70 sub r0, r0, r1, lsl #1
87 pld [r0, r1, lsl #1]
200 add r3, r12, r3, lsl #5
288 sub r4, r4, r5, lsl #4
392 add r3, r12, r3, lsl #5
393 sub r0, r0, r1, lsl #1
475 sub r0, r0, r1, lsl #4
476 sub r0, r0, r1, lsl #2
480 sub r4, r4, r5, lsl #
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/ |
| vp9_idct8x8_add_neon.asm | 364 mov r12, r3, lsl #1
366 mov r12, r4, lsl #1
372 mov r12, r6, lsl #1
379 mov r12, r5, lsl #1
385 mov r12, r7, lsl #1
392 mov r12, r8, lsl #1
398 mov r12, r9, lsl #1
|
| /hardware/samsung_slsi/exynos5/libswconverter/ |
| csc_ARGB8888_to_YUV420SP_NEON.s | 31 add r5, r2, r3, lsl #2 @r5: pSrcRGB2 = tmpSrcRGB + nWidthx4
210 mov r14, r12,lsl #8 @copy to r10
222 mov r14, r12,lsl #16 @copy to r10
311 mov r14, r12,lsl #8 @copy to r10
323 mov r14, r12,lsl #16 @copy to r10
356 add r2, r2, r3, lsl #2 @pSrcRGB + nwidthx4
358 add r5, r5, r3, lsl #2 @pSrcRGB2 + nwidthx4
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-vector-ldst.ll | 50 ; CHECK: lsl [[SHIFTEDOFFSET:x[0-9]+]], x1, #4
79 ; CHECK: lsl [[SHIFTEDOFFSET:x[0-9]+]], x1, #4
108 ; CHECK: lsl [[SHIFTEDOFFSET:x[0-9]+]], x1, #4
137 ; CHECK: lsl [[SHIFTEDOFFSET:x[0-9]+]], x1, #4
166 ; CHECK: lsl [[SHIFTEDOFFSET:x[0-9]+]], x1, #3
195 ; CHECK: lsl [[SHIFTEDOFFSET:x[0-9]+]], x1, #3
224 ; CHECK: lsl [[SHIFTEDOFFSET:x[0-9]+]], x1, #3
253 ; CHECK: lsl [[SHIFTEDOFFSET:x[0-9]+]], x1, #3
537 ; CHECK: ldr h[[REGNUM:[0-9]+]], [x0, x1, lsl #1]
549 ; CHECK: ldr h[[REGNUM:[0-9]+]], [x0, x1, lsl #1
[all...] |
| /external/llvm/test/MC/ARM/ |
| thumb2-narrow-dp.ll | 27 ANDS r2, r2, r1, lsl #1 // Must use wide - shifted register
41 // CHECK: ands.w r2, r2, r1, lsl #1 @ encoding: [0x12,0xea,0x41,0x02]
69 ANDEQ r0, r0, r1, lsl #1 // Must use wide - shifted register
97 // CHECK: andeq.w r0, r0, r1, lsl #1 @ encoding: [0x00,0xea,0x41,0x00]
114 EORS r2, r2, r1, lsl #1 // Must use wide - shifted register
128 // CHECK: eors.w r2, r2, r1, lsl #1 @ encoding: [0x92,0xea,0x41,0x02]
156 EOREQ r4, r4, r1, lsl #1 // Must use wide - shifted register
184 // CHECK: eoreq.w r4, r4, r1, lsl #1 @ encoding: [0x84,0xea,0x41,0x04]
188 // LSL
194 LSL r4, r1, r4 // Must use wide encoding as not flag-settin
[all...] |
| /external/valgrind/main/none/tests/arm/ |
| v6intARM.c | 21 "orr " #RD "," #RD "," #RD ", LSL #8" "\n\t" \
22 "orr " #RD "," #RD "," #RD ", LSL #16" "\n\t" \
179 printf("LSL\n");
180 TESTINST3("lsl r0, r1, r2", 0xffffffff, 0, r0, r1, r2, 0);
181 TESTINST3("lsl r0, r1, r2", 0xffffffff, 1, r0, r1, r2, 0);
182 TESTINST3("lsl r0, r1, r2", 0xffffffff, 2, r0, r1, r2, 0);
183 TESTINST3("lsl r0, r1, r2", 0xffffffff, 31, r0, r1, r2, 0);
184 TESTINST3("lsl r0, r1, r2", 0xffffffff, 32, r0, r1, r2, 0);
185 TESTINST3("lsl r0, r1, r2", 0xffffffff, 33, r0, r1, r2, 0);
186 TESTINST3("lsl r0, r1, r2", 0xffffffff, 63, r0, r1, r2, 0)
[all...] |
| /external/pixman/pixman/ |
| pixman-arm-neon-asm.S | 272 PF pld, [PF_SRC, PF_X, lsl #src_bpp_shift]
275 PF pld, [PF_DST, PF_X, lsl #dst_bpp_shift]
285 PF ldrgeb DUMMY, [PF_SRC, SRC_STRIDE, lsl #src_bpp_shift]!
288 PF ldrgeb DUMMY, [PF_DST, DST_STRIDE, lsl #dst_bpp_shift]!
443 PF pld, [PF_SRC, PF_X, lsl #src_bpp_shift]
449 PF ldrgeb DUMMY, [PF_SRC, SRC_STRIDE, lsl #src_bpp_shift]!
518 PF pld, [PF_SRC, PF_X, lsl #src_bpp_shift]
519 PF pld, [PF_DST, PF_X, lsl #dst_bpp_shift]
523 PF ldrgeb DUMMY, [PF_SRC, SRC_STRIDE, lsl #src_bpp_shift]!
524 PF ldrgeb DUMMY, [PF_DST, DST_STRIDE, lsl #dst_bpp_shift]
[all...] |
| /external/openssl/crypto/sha/asm/ |
| sha256-armv4.S | 35 add r2,r1,r2,lsl#6 @ len to point at the end of inp
70 orr r2,r2,r12,lsl#8
72 orr r2,r2,r0,lsl#16
77 orr r2,r2,r12,lsl#24
126 orr r2,r2,r3,lsl#8
128 orr r2,r2,r0,lsl#16
133 orr r2,r2,r3,lsl#24
182 orr r2,r2,r12,lsl#8
184 orr r2,r2,r0,lsl#16
189 orr r2,r2,r12,lsl#2
[all...] |
| /bionic/libc/arch-arm/krait/bionic/ |
| strcmp.S | 33 #define S2LOMEM lsl
45 #define S2HIMEM lsl
394 orr b1, b1, b1, lsl #8
395 orr b1, b1, b1, lsl #16
411 ands r3, r3, b1, lsl #7
437 lsl w2, w2, #16
|
