| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm/ |
| h264bsdWriteMacroblock.s | 101 LSL width, width, #4
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/ |
| h264bsdWriteMacroblock.S | 103 LSL width, width, #4
|
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_advsimd_YuvToRGB.S | 309 add x0, x0, x4, LSL #2
313 sub x2, x5, x6, LSL #1
336 add x0, x0, x5, LSL #2
362 add x0, x0, x5, LSL #2
|
| rsCpuIntrinsics_neon_Blend.S | 597 ldrlo ip, [ip, r2, LSL #2]
600 add r0, r3, LSL #2
601 add r1, r3, LSL #2
603 mov r2, r2, LSL #2
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/neon/ |
| loopfiltersimpleverticaledge_neon.asm | 52 sub r0, r0, r1, lsl #4
|
| vp8_subpixelvariance16x16s_neon.asm | 53 ;pld [r0, r1, lsl #1]
252 ;pld [r0, r1, lsl #1]
379 ;pld [r0, r1, lsl #1]
420 ;pld [r0, r1, lsl #1]
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/neon/ |
| subtract_neon.asm | 50 mov r2, r2, lsl #1
|
| /system/core/libpixelflinger/codeflinger/ |
| blending.cpp | 448 else if (shift<0) RSB(AL, 0, diff.reg, fb.reg, reg_imm(fragment.reg, LSL,-shift));
466 else if (shift<0) SUB(AL, 0, diff.reg, fb.reg, reg_imm(fragment.reg, LSL,-shift));
619 ADD(AL, 0, d.reg, temp, reg_imm(add.reg, LSL, ms-as));
643 ADD(AL, 0, d.reg, src.reg, reg_imm(dst.reg, LSL, shift));
|
| /art/compiler/optimizing/ |
| code_generator_arm.cc | [all...] |
| /art/compiler/utils/arm/ |
| assembler_arm32.cc | [all...] |
| assembler_thumb2.cc | 842 case LSL: thumb_opcode = 0b00; break;
1097 case LSL: opcode = 0b00; break;
1117 case LSL: opcode = 0b00; break;
[all...] |
| assembler_arm.h | 199 am_(am), is_immed_offset_(true), shift_(LSL) {
203 am_(am), is_immed_offset_(false), shift_(LSL) {
216 am_(Offset), is_immed_offset_(false), shift_(LSL) {
583 virtual void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
594 virtual void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
|
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 44 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm))
371 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
458 O << ", lsl " << markup("<imm:") << "#1" << markup(">") << "]" << markup(">");
733 O << ", lsl "
746 O << ", lsl " << markup("<imm:") << "#" << Imm << markup(">");
[all...] |
| /external/chromium_org/third_party/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
| transform_neon.S | 55 lsl r6, #5 @ Together with vqdmulh, net effect is ">> 26".
342 add r4, r2, r8, lsl #1 @ &outRe1Q16[FRAMESAMPLES / 2 - 8]
343 add r6, r3, r8, lsl #1 @ &outRe2Q16[FRAMESAMPLES / 2 - 8]
534 lsl r0, #15 @ Together with vqdmulh, net effect is ">> 16".
583 lsl r0, #16 @ With vqdmulh and vrshrn, net effect is ">> 25".
|
| /external/chromium_org/v8/src/arm64/ |
| assembler-arm64-inl.h | 391 DCHECK((shift_ == LSL) && (shift_amount_ <= 4));
446 return Operand(smi, LSL, scale - kSmiShift);
490 DCHECK(shift == LSL);
514 DCHECK(shift_ == LSL);
1117 DCHECK(shift == LSL || shift == LSR || shift == ASR || shift == ROR);
[all...] |
| /external/chromium_org/v8/src/ic/arm/ |
| ic-arm.cc | 507 __ add(r4, r4, Operand(r3, LSL, kPointerSizeLog2 + 1));
542 __ ldr(r5, MemOperand(r4, r3, LSL, kPointerSizeLog2));
556 __ ldr(r0, MemOperand(receiver, r6, LSL, kPointerSizeLog2));
565 __ ldr(r0, MemOperand(receiver, r5, LSL, kPointerSizeLog2));
711 MemOperand(address, key, LSL, kPointerSizeLog2, PreIndex));
[all...] |
| /external/openssl/crypto/sha/asm/ |
| sha1-armv4-large.pl | 118 orr $t0,$t0,$t1,lsl#8
120 orr $t0,$t0,$t2,lsl#16
122 orr $t0,$t0,$t3,lsl#24
187 add $len,$inp,$len,lsl#6 @ $len to point at the end of $inp
487 add $len,$inp,$len,lsl#6 @ $len to point at the end of $inp
|
| /external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/arm/neon/ |
| vp9_idct32x32_add_neon.asm | 132 sub r9, r9, r2, lsl #1
133 add r10, r10, r2, lsl #1
166 sub r9, r9, r2, lsl #1
167 add r10, r10, r2, lsl #1
200 sub r6, r6, r2, lsl #1
201 add r7, r7, r2, lsl #1
234 sub r6, r6, r2, lsl #1
235 add r7, r7, r2, lsl #1
335 rsb r6, r2, r2, lsl #5
336 rsb r9, r2, r2, lsl #
[all...] |
| /external/libvpx/libvpx/vp9/common/arm/neon/ |
| vp9_idct32x32_add_neon.asm | 132 sub r9, r9, r2, lsl #1
133 add r10, r10, r2, lsl #1
166 sub r9, r9, r2, lsl #1
167 add r10, r10, r2, lsl #1
200 sub r6, r6, r2, lsl #1
201 add r7, r7, r2, lsl #1
234 sub r6, r6, r2, lsl #1
235 add r7, r7, r2, lsl #1
335 rsb r6, r2, r2, lsl #5
336 rsb r9, r2, r2, lsl #
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/ |
| vp9_idct32x32_add_neon.asm | 132 sub r9, r9, r2, lsl #1
133 add r10, r10, r2, lsl #1
166 sub r9, r9, r2, lsl #1
167 add r10, r10, r2, lsl #1
200 sub r6, r6, r2, lsl #1
201 add r7, r7, r2, lsl #1
234 sub r6, r6, r2, lsl #1
235 add r7, r7, r2, lsl #1
335 rsb r6, r2, r2, lsl #5
336 rsb r9, r2, r2, lsl #
[all...] |
| /external/chromium_org/v8/src/arm/ |
| code-stubs-arm.cc | 207 __ orr(result_reg, scratch_low, Operand(result_reg, LSL, scratch));
218 __ mov(result_reg, Operand(scratch_low, LSL, scratch));
273 __ mov(scratch(), Operand(the_int(), LSL, 32 - shift_distance));
367 __ mov(r2, Operand(r2, LSL, HeapNumber::kNonMantissaBitsInTopWord));
[all...] |
| /external/libhevc/common/arm64/ |
| ihevc_sao_edge_offset_class3_chroma.s | 389 ADD x8,x14,x5,LSL #1 //I pu1_src_left_cpy[(ht_tmp - row) * 2]
471 ADD x11,x0,x1,LSL #1 //II *pu1_src + src_strd
477 ADD x8,x14,x5,LSL #1 //II pu1_src_left_cpy[(ht_tmp - row) * 2]
518 ADD x11,x14,x10,LSL #1 //III pu1_src_left_cpy[(ht_tmp - row) * 2]
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.cpp | 119 AsmMnemonic = "lsl";
123 AsmMnemonic = "lsl";
191 // (e.g. :gottprel_g1: is always going to be "lsl #16") so it should not be
[all...] |
| /art/compiler/dex/quick/arm64/ |
| target_arm64.cc | 217 "lsl",
367 // Omit ", lsl #0"
423 snprintf(tbuf, arraysize(tbuf), ", lsl #%d", 16*operand);
465 strcpy(tbuf, (IS_WIDE(lir->opcode)) ? ", lsl #3" : ", lsl #2");
503 strcpy(tbuf, ", lsl #12");
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrSystem.td | 231 "lsl{w}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RM>, TB,
234 "lsl{w}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RR>, TB,
237 "lsl{l}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RM>, TB,
240 "lsl{l}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RR>, TB,
243 "lsl{q}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RM>, TB;
245 "lsl{q}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RR>, TB;
|
