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    Searched full:src_gpr (Results 1 - 14 of 14) sorted by null

  /external/llvm/lib/Target/R600/
CaymanInstructions.td 92 // XXX: We can infer this field based on the SRC_GPR. This would allow us
104 : VTX_READ_cm <"VTX_READ_8 $dst_gpr, $src_gpr", buffer_id,
115 : VTX_READ_cm <"VTX_READ_16 $dst_gpr, $src_gpr", buffer_id,
126 : VTX_READ_cm <"VTX_READ_32 $dst_gpr, $src_gpr", buffer_id,
137 // to the $src_gpr registers of the VTX_READ.
142 let Constraints = "$src_gpr.ptr = $dst_gpr";
146 : VTX_READ_cm <"VTX_READ_64 $dst_gpr, $src_gpr", buffer_id,
157 : VTX_READ_cm <"VTX_READ_128 $dst_gpr.XYZW, $src_gpr", buffer_id,
168 // the same constraint as VTX_READ_32_eg, because the $src_gpr.ptr and $dst
176 [(set i32:$dst_gpr, (load_param_exti8 ADDRVTX_READ:$src_gpr))]
    [all...]
EvergreenInstructions.td 118 // XXX: We can infer this field based on the SRC_GPR. This would allow us
126 : VTX_READ_eg <"VTX_READ_8 $dst_gpr, $src_gpr", buffer_id,
138 : VTX_READ_eg <"VTX_READ_16 $dst_gpr, $src_gpr", buffer_id,
150 : VTX_READ_eg <"VTX_READ_32 $dst_gpr, $src_gpr", buffer_id,
162 // to the $src_gpr registers of the VTX_READ.
167 let Constraints = "$src_gpr.ptr = $dst_gpr";
171 : VTX_READ_eg <"VTX_READ_64 $dst_gpr.XY, $src_gpr", buffer_id,
183 : VTX_READ_eg <"VTX_READ_128 $dst_gpr.XYZW, $src_gpr", buffer_id,
195 // the same constraint as VTX_READ_32_eg, because the $src_gpr.ptr and $dst
204 [(set i32:$dst_gpr, (load_param_exti8 ADDRVTX_READ:$src_gpr))]
    [all...]
R600InstrFormats.td 206 bits<7> src_gpr;
218 let Word0{22-16} = src_gpr;
282 bits<7> SRC_GPR;
292 let Word0{22-16} = SRC_GPR;
R600Instructions.td 286 : InstR600ISA <outs, (ins MEMxi:$src_gpr), name, pattern>,
384 def : Pat<(TEXTURE_FETCH (i32 TextureOp), vt:$SRC_GPR,
392 (inst R600_Reg128:$SRC_GPR,
834 (ins R600_Reg128:$SRC_GPR,
843 "$SRC_GPR.$srcx$srcy$srcz$srcw "
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r600/
r600_asm.h 69 unsigned src_gpr; member in struct:r600_bytecode_tex
97 unsigned src_gpr; member in struct:r600_bytecode_vtx
r600_asm.c     [all...]
r600_shader.c 446 tex.src_gpr = bytes[bytes_read++];
488 vtx.src_gpr = G_SQ_VTX_WORD0_SRC_GPR(word0);
1016 vtx.src_gpr = ar_reg;
3760 unsigned src_gpr; local
    [all...]
  /external/mesa3d/src/gallium/drivers/r600/
r600_asm.h 69 unsigned src_gpr; member in struct:r600_bytecode_tex
97 unsigned src_gpr; member in struct:r600_bytecode_vtx
r600_asm.c     [all...]
r600_shader.c 446 tex.src_gpr = bytes[bytes_read++];
488 vtx.src_gpr = G_SQ_VTX_WORD0_SRC_GPR(word0);
1016 vtx.src_gpr = ar_reg;
3760 unsigned src_gpr; local
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/translate/
translate_sse.c 324 static void emit_mov64(struct translate_sse *p, struct x86_reg dst_gpr, struct x86_reg dst_xmm, struct x86_reg src_gpr, struct x86_reg src_xmm)
327 x64_mov64(p->func, dst_gpr, src_gpr);
343 static void emit_store64(struct translate_sse *p, struct x86_reg dst, struct x86_reg src_gpr, struct x86_reg src_xmm)
345 emit_mov64(p, dst, dst, src_gpr, src_xmm);
    [all...]
  /external/mesa3d/src/gallium/auxiliary/translate/
translate_sse.c 324 static void emit_mov64(struct translate_sse *p, struct x86_reg dst_gpr, struct x86_reg dst_xmm, struct x86_reg src_gpr, struct x86_reg src_xmm)
327 x64_mov64(p->func, dst_gpr, src_gpr);
343 static void emit_store64(struct translate_sse *p, struct x86_reg dst, struct x86_reg src_gpr, struct x86_reg src_xmm)
345 emit_mov64(p, dst, dst, src_gpr, src_xmm);
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
R600Instructions.td 920 bits<7> SRC_GPR;
928 // XXX: We can infer this field based on the SRC_GPR. This would allow us
962 let Inst{22-16} = SRC_GPR;
    [all...]
  /external/mesa3d/src/gallium/drivers/radeon/
R600Instructions.td 920 bits<7> SRC_GPR;
928 // XXX: We can infer this field based on the SRC_GPR. This would allow us
962 let Inst{22-16} = SRC_GPR;
    [all...]

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