1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __VMWGFX_DRM_H__ 20 #define __VMWGFX_DRM_H__ 21 #include <drm.h> 22 #define DRM_VMW_MAX_SURFACE_FACES 6 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #define DRM_VMW_MAX_MIP_LEVELS 24 25 #define DRM_VMW_GET_PARAM 0 26 #define DRM_VMW_ALLOC_DMABUF 1 27 #define DRM_VMW_UNREF_DMABUF 2 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define DRM_VMW_CURSOR_BYPASS 3 30 #define DRM_VMW_CONTROL_STREAM 4 31 #define DRM_VMW_CLAIM_STREAM 5 32 #define DRM_VMW_UNREF_STREAM 6 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 #define DRM_VMW_CREATE_CONTEXT 7 35 #define DRM_VMW_UNREF_CONTEXT 8 36 #define DRM_VMW_CREATE_SURFACE 9 37 #define DRM_VMW_UNREF_SURFACE 10 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 #define DRM_VMW_REF_SURFACE 11 40 #define DRM_VMW_EXECBUF 12 41 #define DRM_VMW_GET_3D_CAP 13 42 #define DRM_VMW_FENCE_WAIT 14 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 #define DRM_VMW_FENCE_SIGNALED 15 45 #define DRM_VMW_FENCE_UNREF 16 46 #define DRM_VMW_FENCE_EVENT 17 47 #define DRM_VMW_PRESENT 18 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 #define DRM_VMW_PRESENT_READBACK 19 50 #define DRM_VMW_UPDATE_LAYOUT 20 51 #define DRM_VMW_CREATE_SHADER 21 52 #define DRM_VMW_UNREF_SHADER 22 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 #define DRM_VMW_GB_SURFACE_CREATE 23 55 #define DRM_VMW_GB_SURFACE_REF 24 56 #define DRM_VMW_SYNCCPU 25 57 #define DRM_VMW_PARAM_NUM_STREAMS 0 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1 60 #define DRM_VMW_PARAM_3D 2 61 #define DRM_VMW_PARAM_HW_CAPS 3 62 #define DRM_VMW_PARAM_FIFO_CAPS 4 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 #define DRM_VMW_PARAM_MAX_FB_SIZE 5 65 #define DRM_VMW_PARAM_FIFO_HW_VERSION 6 66 #define DRM_VMW_PARAM_MAX_SURF_MEMORY 7 67 #define DRM_VMW_PARAM_3D_CAPS_SIZE 8 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 #define DRM_VMW_PARAM_MAX_MOB_MEMORY 9 70 #define DRM_VMW_PARAM_MAX_MOB_SIZE 10 71 struct drm_vmw_getparam_arg { 72 uint64_t value; 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 uint32_t param; 75 uint32_t pad64; 76 }; 77 struct drm_vmw_context_arg { 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 int32_t cid; 80 uint32_t pad64; 81 }; 82 struct drm_vmw_surface_create_req { 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 uint32_t flags; 85 uint32_t format; 86 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES]; 87 uint64_t size_addr; 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 int32_t shareable; 90 int32_t scanout; 91 }; 92 struct drm_vmw_surface_arg { 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 int32_t sid; 95 uint32_t pad64; 96 }; 97 struct drm_vmw_size { 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 uint32_t width; 100 uint32_t height; 101 uint32_t depth; 102 uint32_t pad64; 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 }; 105 union drm_vmw_surface_create_arg { 106 struct drm_vmw_surface_arg rep; 107 struct drm_vmw_surface_create_req req; 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 }; 110 union drm_vmw_surface_reference_arg { 111 struct drm_vmw_surface_create_req rep; 112 struct drm_vmw_surface_arg req; 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 }; 115 #define DRM_VMW_EXECBUF_VERSION 1 116 struct drm_vmw_execbuf_arg { 117 uint64_t commands; 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 uint32_t command_size; 120 uint32_t throttle_us; 121 uint64_t fence_rep; 122 uint32_t version; 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 uint32_t flags; 125 }; 126 struct drm_vmw_fence_rep { 127 uint32_t handle; 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 uint32_t mask; 130 uint32_t seqno; 131 uint32_t passed_seqno; 132 uint32_t pad64; 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 int32_t error; 135 }; 136 struct drm_vmw_alloc_dmabuf_req { 137 uint32_t size; 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 uint32_t pad64; 140 }; 141 struct drm_vmw_dmabuf_rep { 142 uint64_t map_handle; 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 uint32_t handle; 145 uint32_t cur_gmr_id; 146 uint32_t cur_gmr_offset; 147 uint32_t pad64; 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 }; 150 union drm_vmw_alloc_dmabuf_arg { 151 struct drm_vmw_alloc_dmabuf_req req; 152 struct drm_vmw_dmabuf_rep rep; 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 }; 155 struct drm_vmw_unref_dmabuf_arg { 156 uint32_t handle; 157 uint32_t pad64; 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 }; 160 struct drm_vmw_rect { 161 int32_t x; 162 int32_t y; 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 uint32_t w; 165 uint32_t h; 166 }; 167 struct drm_vmw_control_stream_arg { 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 uint32_t stream_id; 170 uint32_t enabled; 171 uint32_t flags; 172 uint32_t color_key; 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 uint32_t handle; 175 uint32_t offset; 176 int32_t format; 177 uint32_t size; 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 uint32_t width; 180 uint32_t height; 181 uint32_t pitch[3]; 182 uint32_t pad64; 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 struct drm_vmw_rect src; 185 struct drm_vmw_rect dst; 186 }; 187 #define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0) 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 #define DRM_VMW_CURSOR_BYPASS_FLAGS (1) 190 struct drm_vmw_cursor_bypass_arg { 191 uint32_t flags; 192 uint32_t crtc_id; 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 int32_t xpos; 195 int32_t ypos; 196 int32_t xhot; 197 int32_t yhot; 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 }; 200 struct drm_vmw_stream_arg { 201 uint32_t stream_id; 202 uint32_t pad64; 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 }; 205 struct drm_vmw_get_3d_cap_arg { 206 uint64_t buffer; 207 uint32_t max_size; 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 uint32_t pad64; 210 }; 211 #define DRM_VMW_FENCE_FLAG_EXEC (1 << 0) 212 #define DRM_VMW_FENCE_FLAG_QUERY (1 << 1) 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0) 215 struct drm_vmw_fence_wait_arg { 216 uint32_t handle; 217 int32_t cookie_valid; 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 uint64_t kernel_cookie; 220 uint64_t timeout_us; 221 int32_t lazy; 222 int32_t flags; 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 int32_t wait_options; 225 int32_t pad64; 226 }; 227 struct drm_vmw_fence_signaled_arg { 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 uint32_t handle; 230 uint32_t flags; 231 int32_t signaled; 232 uint32_t passed_seqno; 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 uint32_t signaled_flags; 235 uint32_t pad64; 236 }; 237 struct drm_vmw_fence_arg { 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 uint32_t handle; 240 uint32_t pad64; 241 }; 242 #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 struct drm_vmw_event_fence { 245 struct drm_event base; 246 uint64_t user_data; 247 uint32_t tv_sec; 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 uint32_t tv_usec; 250 }; 251 #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0) 252 struct drm_vmw_fence_event_arg { 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 uint64_t fence_rep; 255 uint64_t user_data; 256 uint32_t handle; 257 uint32_t flags; 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 }; 260 struct drm_vmw_present_arg { 261 uint32_t fb_id; 262 uint32_t sid; 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 int32_t dest_x; 265 int32_t dest_y; 266 uint64_t clips_ptr; 267 uint32_t num_clips; 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 uint32_t pad64; 270 }; 271 struct drm_vmw_present_readback_arg { 272 uint32_t fb_id; 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 uint32_t num_clips; 275 uint64_t clips_ptr; 276 uint64_t fence_rep; 277 }; 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 struct drm_vmw_update_layout_arg { 280 uint32_t num_outputs; 281 uint32_t pad64; 282 uint64_t rects; 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 }; 285 enum drm_vmw_shader_type { 286 drm_vmw_shader_type_vs = 0, 287 drm_vmw_shader_type_ps, 288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 drm_vmw_shader_type_gs 290 }; 291 struct drm_vmw_shader_create_arg { 292 enum drm_vmw_shader_type shader_type; 293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 uint32_t size; 295 uint32_t buffer_handle; 296 uint32_t shader_handle; 297 uint64_t offset; 298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 }; 300 struct drm_vmw_shader_arg { 301 uint32_t handle; 302 uint32_t pad64; 303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 }; 305 enum drm_vmw_surface_flags { 306 drm_vmw_surface_flag_shareable = (1 << 0), 307 drm_vmw_surface_flag_scanout = (1 << 1), 308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 drm_vmw_surface_flag_create_buffer = (1 << 2) 310 }; 311 struct drm_vmw_gb_surface_create_req { 312 uint32_t svga3d_flags; 313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 uint32_t format; 315 uint32_t mip_levels; 316 enum drm_vmw_surface_flags drm_surface_flags; 317 uint32_t multisample_count; 318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 uint32_t autogen_filter; 320 uint32_t buffer_handle; 321 uint32_t pad64; 322 struct drm_vmw_size base_size; 323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 }; 325 struct drm_vmw_gb_surface_create_rep { 326 uint32_t handle; 327 uint32_t backup_size; 328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 uint32_t buffer_handle; 330 uint32_t buffer_size; 331 uint64_t buffer_map_handle; 332 }; 333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 union drm_vmw_gb_surface_create_arg { 335 struct drm_vmw_gb_surface_create_rep rep; 336 struct drm_vmw_gb_surface_create_req req; 337 }; 338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 struct drm_vmw_gb_surface_ref_rep { 340 struct drm_vmw_gb_surface_create_req creq; 341 struct drm_vmw_gb_surface_create_rep crep; 342 }; 343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 union drm_vmw_gb_surface_reference_arg { 345 struct drm_vmw_gb_surface_ref_rep rep; 346 struct drm_vmw_surface_arg req; 347 }; 348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 enum drm_vmw_synccpu_flags { 350 drm_vmw_synccpu_read = (1 << 0), 351 drm_vmw_synccpu_write = (1 << 1), 352 drm_vmw_synccpu_dontblock = (1 << 2), 353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 drm_vmw_synccpu_allow_cs = (1 << 3) 355 }; 356 enum drm_vmw_synccpu_op { 357 drm_vmw_synccpu_grab, 358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 drm_vmw_synccpu_release 360 }; 361 struct drm_vmw_synccpu_arg { 362 enum drm_vmw_synccpu_op op; 363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 enum drm_vmw_synccpu_flags flags; 365 uint32_t handle; 366 uint32_t pad64; 367 }; 368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 #endif 370
