1 /* 2 * linux/drivers/char/serial_core.h 3 * 4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 #ifndef _UAPILINUX_SERIAL_CORE_H 21 #define _UAPILINUX_SERIAL_CORE_H 22 23 #include <linux/serial.h> 24 25 /* 26 * The type definitions. These are from Ted Ts'o's serial.h 27 */ 28 #define PORT_UNKNOWN 0 29 #define PORT_8250 1 30 #define PORT_16450 2 31 #define PORT_16550 3 32 #define PORT_16550A 4 33 #define PORT_CIRRUS 5 34 #define PORT_16650 6 35 #define PORT_16650V2 7 36 #define PORT_16750 8 37 #define PORT_STARTECH 9 38 #define PORT_16C950 10 39 #define PORT_16654 11 40 #define PORT_16850 12 41 #define PORT_RSA 13 42 #define PORT_NS16550A 14 43 #define PORT_XSCALE 15 44 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 45 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 46 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ 47 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */ 48 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */ 49 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */ 50 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */ 51 #define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */ 52 #define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */ 53 #define PORT_BRCM_TRUMANAGE 25 54 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */ 55 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */ 56 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */ 57 #define PORT_MAX_8250 28 /* max port ID */ 58 59 /* 60 * ARM specific type numbers. These are not currently guaranteed 61 * to be implemented, and will change in the future. These are 62 * separate so any additions to the old serial.c that occur before 63 * we are merged can be easily merged here. 64 */ 65 #define PORT_PXA 31 66 #define PORT_AMBA 32 67 #define PORT_CLPS711X 33 68 #define PORT_SA1100 34 69 #define PORT_UART00 35 70 #define PORT_21285 37 71 72 /* Sparc type numbers. */ 73 #define PORT_SUNZILOG 38 74 #define PORT_SUNSAB 39 75 76 /* DEC */ 77 #define PORT_DZ 46 78 #define PORT_ZS 47 79 80 /* Parisc type numbers. */ 81 #define PORT_MUX 48 82 83 /* Atmel AT91 / AT32 SoC */ 84 #define PORT_ATMEL 49 85 86 /* Macintosh Zilog type numbers */ 87 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 88 #define PORT_PMAC_ZILOG 51 89 90 /* SH-SCI */ 91 #define PORT_SCI 52 92 #define PORT_SCIF 53 93 #define PORT_IRDA 54 94 95 /* Samsung S3C2410 SoC and derivatives thereof */ 96 #define PORT_S3C2410 55 97 98 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 99 #define PORT_IP22ZILOG 56 100 101 /* Sharp LH7a40x -- an ARM9 SoC series */ 102 #define PORT_LH7A40X 57 103 104 /* PPC CPM type number */ 105 #define PORT_CPM 58 106 107 /* MPC52xx (and MPC512x) type numbers */ 108 #define PORT_MPC52xx 59 109 110 /* IBM icom */ 111 #define PORT_ICOM 60 112 113 /* Samsung S3C2440 SoC */ 114 #define PORT_S3C2440 61 115 116 /* Motorola i.MX SoC */ 117 #define PORT_IMX 62 118 119 /* Marvell MPSC */ 120 #define PORT_MPSC 63 121 122 /* TXX9 type number */ 123 #define PORT_TXX9 64 124 125 /* NEC VR4100 series SIU/DSIU */ 126 #define PORT_VR41XX_SIU 65 127 #define PORT_VR41XX_DSIU 66 128 129 /* Samsung S3C2400 SoC */ 130 #define PORT_S3C2400 67 131 132 /* M32R SIO */ 133 #define PORT_M32R_SIO 68 134 135 /*Digi jsm */ 136 #define PORT_JSM 69 137 138 #define PORT_PNX8XXX 70 139 140 /* Hilscher netx */ 141 #define PORT_NETX 71 142 143 /* SUN4V Hypervisor Console */ 144 #define PORT_SUNHV 72 145 146 #define PORT_S3C2412 73 147 148 /* Xilinx uartlite */ 149 #define PORT_UARTLITE 74 150 151 /* Blackfin bf5xx */ 152 #define PORT_BFIN 75 153 154 /* Micrel KS8695 */ 155 #define PORT_KS8695 76 156 157 /* Broadcom SB1250, etc. SOC */ 158 #define PORT_SB1250_DUART 77 159 160 /* Freescale ColdFire */ 161 #define PORT_MCF 78 162 163 /* Blackfin SPORT */ 164 #define PORT_BFIN_SPORT 79 165 166 /* MN10300 on-chip UART numbers */ 167 #define PORT_MN10300 80 168 #define PORT_MN10300_CTS 81 169 170 #define PORT_SC26XX 82 171 172 /* SH-SCI */ 173 #define PORT_SCIFA 83 174 175 #define PORT_S3C6400 84 176 177 /* NWPSERIAL */ 178 #define PORT_NWPSERIAL 85 179 180 /* MAX3100 */ 181 #define PORT_MAX3100 86 182 183 /* Timberdale UART */ 184 #define PORT_TIMBUART 87 185 186 /* Qualcomm MSM SoCs */ 187 #define PORT_MSM 88 188 189 /* BCM63xx family SoCs */ 190 #define PORT_BCM63XX 89 191 192 /* Aeroflex Gaisler GRLIB APBUART */ 193 #define PORT_APBUART 90 194 195 /* Altera UARTs */ 196 #define PORT_ALTERA_JTAGUART 91 197 #define PORT_ALTERA_UART 92 198 199 /* SH-SCI */ 200 #define PORT_SCIFB 93 201 202 /* MAX310X */ 203 #define PORT_MAX310X 94 204 205 /* High Speed UART for Medfield */ 206 #define PORT_MFD 95 207 208 /* TI OMAP-UART */ 209 #define PORT_OMAP 96 210 211 /* VIA VT8500 SoC */ 212 #define PORT_VT8500 97 213 214 /* Xilinx PSS UART */ 215 #define PORT_XUARTPS 98 216 217 /* Atheros AR933X SoC */ 218 #define PORT_AR933X 99 219 220 /* Energy Micro efm32 SoC */ 221 #define PORT_EFMUART 100 222 223 /* ARC (Synopsys) on-chip UART */ 224 #define PORT_ARC 101 225 226 /* Rocketport EXPRESS/INFINITY */ 227 #define PORT_RP2 102 228 229 /* Freescale lpuart */ 230 #define PORT_LPUART 103 231 232 /* SH-SCI */ 233 #define PORT_HSCIF 104 234 235 /* ST ASC type numbers */ 236 #define PORT_ASC 105 237 238 /* Tilera TILE-Gx UART */ 239 #define PORT_TILEGX 106 240 241 #endif /* _UAPILINUX_SERIAL_CORE_H */ 242
