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      1 //===--- AArch64Subtarget.h - Define Subtarget for the AArch64 -*- C++ -*--===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file declares the AArch64 specific subclass of TargetSubtarget.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef AArch64SUBTARGET_H
     15 #define AArch64SUBTARGET_H
     16 
     17 #include "AArch64InstrInfo.h"
     18 #include "AArch64FrameLowering.h"
     19 #include "AArch64ISelLowering.h"
     20 #include "AArch64RegisterInfo.h"
     21 #include "AArch64SelectionDAGInfo.h"
     22 #include "llvm/IR/DataLayout.h"
     23 #include "llvm/Target/TargetSubtargetInfo.h"
     24 #include <string>
     25 
     26 #define GET_SUBTARGETINFO_HEADER
     27 #include "AArch64GenSubtargetInfo.inc"
     28 
     29 namespace llvm {
     30 class GlobalValue;
     31 class StringRef;
     32 
     33 class AArch64Subtarget : public AArch64GenSubtargetInfo {
     34 protected:
     35   enum ARMProcFamilyEnum {Others, CortexA53, CortexA57, Cyclone};
     36 
     37   /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
     38   ARMProcFamilyEnum ARMProcFamily;
     39 
     40   bool HasFPARMv8;
     41   bool HasNEON;
     42   bool HasCrypto;
     43   bool HasCRC;
     44 
     45   // HasZeroCycleRegMove - Has zero-cycle register mov instructions.
     46   bool HasZeroCycleRegMove;
     47 
     48   // HasZeroCycleZeroing - Has zero-cycle zeroing instructions.
     49   bool HasZeroCycleZeroing;
     50 
     51   /// CPUString - String name of used CPU.
     52   std::string CPUString;
     53 
     54   /// TargetTriple - What processor and OS we're targeting.
     55   Triple TargetTriple;
     56 
     57   const DataLayout DL;
     58   AArch64FrameLowering FrameLowering;
     59   AArch64InstrInfo InstrInfo;
     60   AArch64SelectionDAGInfo TSInfo;
     61   AArch64TargetLowering TLInfo;
     62 private:
     63   /// initializeSubtargetDependencies - Initializes using CPUString and the
     64   /// passed in feature string so that we can use initializer lists for
     65   /// subtarget initialization.
     66   AArch64Subtarget &initializeSubtargetDependencies(StringRef FS);
     67 
     68 public:
     69   /// This constructor initializes the data members to match that
     70   /// of the specified triple.
     71   AArch64Subtarget(const std::string &TT, const std::string &CPU,
     72 		   const std::string &FS, TargetMachine &TM, bool LittleEndian);
     73 
     74   const AArch64SelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
     75   const AArch64FrameLowering *getFrameLowering() const {
     76     return &FrameLowering;
     77   }
     78   const AArch64TargetLowering *getTargetLowering() const {
     79     return &TLInfo;
     80   }
     81   const AArch64InstrInfo *getInstrInfo() const { return &InstrInfo; }
     82   const DataLayout *getDataLayout() const { return &DL; }
     83   bool enableMachineScheduler() const override { return true; }
     84 
     85   bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
     86 
     87   bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; }
     88 
     89   bool hasFPARMv8() const { return HasFPARMv8; }
     90   bool hasNEON() const { return HasNEON; }
     91   bool hasCrypto() const { return HasCrypto; }
     92   bool hasCRC() const { return HasCRC; }
     93 
     94   bool isLittleEndian() const { return DL.isLittleEndian(); }
     95 
     96   bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
     97 
     98   bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
     99 
    100   bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
    101 
    102   bool isCyclone() const { return CPUString == "cyclone"; }
    103   bool isCortexA57() const { return CPUString == "cortex-a57"; }
    104   bool isCortexA53() const { return CPUString == "cortex-a53"; }
    105 
    106   /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
    107   /// that still makes it profitable to inline the call.
    108   unsigned getMaxInlineSizeThreshold() const { return 64; }
    109 
    110   /// ParseSubtargetFeatures - Parses features string setting specified
    111   /// subtarget options.  Definition of function is auto generated by tblgen.
    112   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
    113 
    114   /// ClassifyGlobalReference - Find the target operand flags that describe
    115   /// how a global value should be referenced for the current subtarget.
    116   unsigned char ClassifyGlobalReference(const GlobalValue *GV,
    117                                         const TargetMachine &TM) const;
    118 
    119   /// This function returns the name of a function which has an interface
    120   /// like the non-standard bzero function, if such a function exists on
    121   /// the current subtarget and it is considered prefereable over
    122   /// memset with zero passed as the second argument. Otherwise it
    123   /// returns null.
    124   const char *getBZeroEntry() const;
    125 
    126   void overrideSchedPolicy(MachineSchedPolicy &Policy, MachineInstr *begin,
    127                            MachineInstr *end,
    128                            unsigned NumRegionInstrs) const override;
    129 
    130   bool enableEarlyIfConversion() const override;
    131 };
    132 } // End llvm namespace
    133 
    134 #endif // AArch64SUBTARGET_H
    135