1 //===-- ARMInstrInfo.h - ARM Instruction Information ------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the ARM implementation of the TargetInstrInfo class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef ARMINSTRUCTIONINFO_H 15 #define ARMINSTRUCTIONINFO_H 16 17 #include "ARMBaseInstrInfo.h" 18 #include "ARMRegisterInfo.h" 19 20 namespace llvm { 21 class ARMSubtarget; 22 23 class ARMInstrInfo : public ARMBaseInstrInfo { 24 ARMRegisterInfo RI; 25 public: 26 explicit ARMInstrInfo(const ARMSubtarget &STI); 27 28 /// getNoopForMachoTarget - Return the noop instruction to use for a noop. 29 void getNoopForMachoTarget(MCInst &NopInst) const override; 30 31 // Return the non-pre/post incrementing version of 'Opc'. Return 0 32 // if there is not such an opcode. 33 unsigned getUnindexedOpcode(unsigned Opc) const override; 34 35 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 36 /// such, whenever a client has an instance of instruction info, it should 37 /// always be able to get register info as well (through this method). 38 /// 39 const ARMRegisterInfo &getRegisterInfo() const override { return RI; } 40 }; 41 42 } 43 44 #endif 45
