1 //===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides Mips specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "InstPrinter/MipsInstPrinter.h" 15 #include "MipsELFStreamer.h" 16 #include "MipsMCAsmInfo.h" 17 #include "MipsMCNaCl.h" 18 #include "MipsMCTargetDesc.h" 19 #include "MipsTargetStreamer.h" 20 #include "llvm/ADT/Triple.h" 21 #include "llvm/MC/MCCodeGenInfo.h" 22 #include "llvm/MC/MCELFStreamer.h" 23 #include "llvm/MC/MCInstrInfo.h" 24 #include "llvm/MC/MCRegisterInfo.h" 25 #include "llvm/MC/MCSubtargetInfo.h" 26 #include "llvm/MC/MCSymbol.h" 27 #include "llvm/MC/MachineLocation.h" 28 #include "llvm/Support/CommandLine.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Support/FormattedStream.h" 31 #include "llvm/Support/TargetRegistry.h" 32 33 using namespace llvm; 34 35 #define GET_INSTRINFO_MC_DESC 36 #include "MipsGenInstrInfo.inc" 37 38 #define GET_SUBTARGETINFO_MC_DESC 39 #include "MipsGenSubtargetInfo.inc" 40 41 #define GET_REGINFO_MC_DESC 42 #include "MipsGenRegisterInfo.inc" 43 44 /// Select the Mips CPU for the given triple and cpu name. 45 /// FIXME: Merge with the copy in MipsSubtarget.cpp 46 static inline StringRef selectMipsCPU(StringRef TT, StringRef CPU) { 47 if (CPU.empty() || CPU == "generic") { 48 Triple TheTriple(TT); 49 if (TheTriple.getArch() == Triple::mips || 50 TheTriple.getArch() == Triple::mipsel) 51 CPU = "mips32"; 52 else 53 CPU = "mips64"; 54 } 55 return CPU; 56 } 57 58 static MCInstrInfo *createMipsMCInstrInfo() { 59 MCInstrInfo *X = new MCInstrInfo(); 60 InitMipsMCInstrInfo(X); 61 return X; 62 } 63 64 static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) { 65 MCRegisterInfo *X = new MCRegisterInfo(); 66 InitMipsMCRegisterInfo(X, Mips::RA); 67 return X; 68 } 69 70 static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU, 71 StringRef FS) { 72 CPU = selectMipsCPU(TT, CPU); 73 MCSubtargetInfo *X = new MCSubtargetInfo(); 74 InitMipsMCSubtargetInfo(X, TT, CPU, FS); 75 return X; 76 } 77 78 static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) { 79 MCAsmInfo *MAI = new MipsMCAsmInfo(TT); 80 81 unsigned SP = MRI.getDwarfRegNum(Mips::SP, true); 82 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, SP, 0); 83 MAI->addInitialFrameState(Inst); 84 85 return MAI; 86 } 87 88 static MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM, 89 CodeModel::Model CM, 90 CodeGenOpt::Level OL) { 91 MCCodeGenInfo *X = new MCCodeGenInfo(); 92 if (CM == CodeModel::JITDefault) 93 RM = Reloc::Static; 94 else if (RM == Reloc::Default) 95 RM = Reloc::PIC_; 96 X->InitMCCodeGenInfo(RM, CM, OL); 97 return X; 98 } 99 100 static MCInstPrinter *createMipsMCInstPrinter(const Target &T, 101 unsigned SyntaxVariant, 102 const MCAsmInfo &MAI, 103 const MCInstrInfo &MII, 104 const MCRegisterInfo &MRI, 105 const MCSubtargetInfo &STI) { 106 return new MipsInstPrinter(MAI, MII, MRI); 107 } 108 109 static MCStreamer *createMCStreamer(const Target &T, StringRef TT, 110 MCContext &Context, MCAsmBackend &MAB, 111 raw_ostream &OS, MCCodeEmitter *Emitter, 112 const MCSubtargetInfo &STI, 113 bool RelaxAll, bool NoExecStack) { 114 MCStreamer *S; 115 if (!Triple(TT).isOSNaCl()) 116 S = createMipsELFStreamer(Context, MAB, OS, Emitter, STI, RelaxAll, 117 NoExecStack); 118 else 119 S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, STI, RelaxAll, 120 NoExecStack); 121 new MipsTargetELFStreamer(*S, STI); 122 return S; 123 } 124 125 static MCStreamer * 126 createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS, 127 bool isVerboseAsm, bool useDwarfDirectory, 128 MCInstPrinter *InstPrint, MCCodeEmitter *CE, 129 MCAsmBackend *TAB, bool ShowInst) { 130 MCStreamer *S = llvm::createAsmStreamer( 131 Ctx, OS, isVerboseAsm, useDwarfDirectory, InstPrint, CE, TAB, ShowInst); 132 new MipsTargetAsmStreamer(*S, OS); 133 return S; 134 } 135 136 static MCStreamer *createMipsNullStreamer(MCContext &Ctx) { 137 MCStreamer *S = llvm::createNullStreamer(Ctx); 138 new MipsTargetStreamer(*S); 139 return S; 140 } 141 142 extern "C" void LLVMInitializeMipsTargetMC() { 143 // Register the MC asm info. 144 RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo); 145 RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo); 146 RegisterMCAsmInfoFn A(TheMips64Target, createMipsMCAsmInfo); 147 RegisterMCAsmInfoFn B(TheMips64elTarget, createMipsMCAsmInfo); 148 149 // Register the MC codegen info. 150 TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget, 151 createMipsMCCodeGenInfo); 152 TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget, 153 createMipsMCCodeGenInfo); 154 TargetRegistry::RegisterMCCodeGenInfo(TheMips64Target, 155 createMipsMCCodeGenInfo); 156 TargetRegistry::RegisterMCCodeGenInfo(TheMips64elTarget, 157 createMipsMCCodeGenInfo); 158 159 // Register the MC instruction info. 160 TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo); 161 TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo); 162 TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo); 163 TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget, 164 createMipsMCInstrInfo); 165 166 // Register the MC register info. 167 TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo); 168 TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo); 169 TargetRegistry::RegisterMCRegInfo(TheMips64Target, createMipsMCRegisterInfo); 170 TargetRegistry::RegisterMCRegInfo(TheMips64elTarget, 171 createMipsMCRegisterInfo); 172 173 // Register the MC Code Emitter 174 TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget, 175 createMipsMCCodeEmitterEB); 176 TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget, 177 createMipsMCCodeEmitterEL); 178 TargetRegistry::RegisterMCCodeEmitter(TheMips64Target, 179 createMipsMCCodeEmitterEB); 180 TargetRegistry::RegisterMCCodeEmitter(TheMips64elTarget, 181 createMipsMCCodeEmitterEL); 182 183 // Register the object streamer. 184 TargetRegistry::RegisterMCObjectStreamer(TheMipsTarget, createMCStreamer); 185 TargetRegistry::RegisterMCObjectStreamer(TheMipselTarget, createMCStreamer); 186 TargetRegistry::RegisterMCObjectStreamer(TheMips64Target, createMCStreamer); 187 TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget, 188 createMCStreamer); 189 190 // Register the asm streamer. 191 TargetRegistry::RegisterAsmStreamer(TheMipsTarget, createMCAsmStreamer); 192 TargetRegistry::RegisterAsmStreamer(TheMipselTarget, createMCAsmStreamer); 193 TargetRegistry::RegisterAsmStreamer(TheMips64Target, createMCAsmStreamer); 194 TargetRegistry::RegisterAsmStreamer(TheMips64elTarget, createMCAsmStreamer); 195 196 TargetRegistry::RegisterNullStreamer(TheMipsTarget, createMipsNullStreamer); 197 TargetRegistry::RegisterNullStreamer(TheMipselTarget, createMipsNullStreamer); 198 TargetRegistry::RegisterNullStreamer(TheMips64Target, createMipsNullStreamer); 199 TargetRegistry::RegisterNullStreamer(TheMips64elTarget, 200 createMipsNullStreamer); 201 202 // Register the asm backend. 203 TargetRegistry::RegisterMCAsmBackend(TheMipsTarget, 204 createMipsAsmBackendEB32); 205 TargetRegistry::RegisterMCAsmBackend(TheMipselTarget, 206 createMipsAsmBackendEL32); 207 TargetRegistry::RegisterMCAsmBackend(TheMips64Target, 208 createMipsAsmBackendEB64); 209 TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget, 210 createMipsAsmBackendEL64); 211 212 // Register the MC subtarget info. 213 TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget, 214 createMipsMCSubtargetInfo); 215 TargetRegistry::RegisterMCSubtargetInfo(TheMipselTarget, 216 createMipsMCSubtargetInfo); 217 TargetRegistry::RegisterMCSubtargetInfo(TheMips64Target, 218 createMipsMCSubtargetInfo); 219 TargetRegistry::RegisterMCSubtargetInfo(TheMips64elTarget, 220 createMipsMCSubtargetInfo); 221 222 // Register the MCInstPrinter. 223 TargetRegistry::RegisterMCInstPrinter(TheMipsTarget, 224 createMipsMCInstPrinter); 225 TargetRegistry::RegisterMCInstPrinter(TheMipselTarget, 226 createMipsMCInstPrinter); 227 TargetRegistry::RegisterMCInstPrinter(TheMips64Target, 228 createMipsMCInstPrinter); 229 TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget, 230 createMipsMCInstPrinter); 231 } 232
