1 //===-- NVPTXMCTargetDesc.cpp - NVPTX Target Descriptions -------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides NVPTX specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "NVPTXMCTargetDesc.h" 15 #include "InstPrinter/NVPTXInstPrinter.h" 16 #include "NVPTXMCAsmInfo.h" 17 #include "llvm/MC/MCCodeGenInfo.h" 18 #include "llvm/MC/MCInstrInfo.h" 19 #include "llvm/MC/MCRegisterInfo.h" 20 #include "llvm/MC/MCSubtargetInfo.h" 21 #include "llvm/Support/TargetRegistry.h" 22 23 using namespace llvm; 24 25 #define GET_INSTRINFO_MC_DESC 26 #include "NVPTXGenInstrInfo.inc" 27 28 #define GET_SUBTARGETINFO_MC_DESC 29 #include "NVPTXGenSubtargetInfo.inc" 30 31 #define GET_REGINFO_MC_DESC 32 #include "NVPTXGenRegisterInfo.inc" 33 34 static MCInstrInfo *createNVPTXMCInstrInfo() { 35 MCInstrInfo *X = new MCInstrInfo(); 36 InitNVPTXMCInstrInfo(X); 37 return X; 38 } 39 40 static MCRegisterInfo *createNVPTXMCRegisterInfo(StringRef TT) { 41 MCRegisterInfo *X = new MCRegisterInfo(); 42 // PTX does not have a return address register. 43 InitNVPTXMCRegisterInfo(X, 0); 44 return X; 45 } 46 47 static MCSubtargetInfo * 48 createNVPTXMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { 49 MCSubtargetInfo *X = new MCSubtargetInfo(); 50 InitNVPTXMCSubtargetInfo(X, TT, CPU, FS); 51 return X; 52 } 53 54 static MCCodeGenInfo *createNVPTXMCCodeGenInfo( 55 StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) { 56 MCCodeGenInfo *X = new MCCodeGenInfo(); 57 X->InitMCCodeGenInfo(RM, CM, OL); 58 return X; 59 } 60 61 static MCInstPrinter *createNVPTXMCInstPrinter(const Target &T, 62 unsigned SyntaxVariant, 63 const MCAsmInfo &MAI, 64 const MCInstrInfo &MII, 65 const MCRegisterInfo &MRI, 66 const MCSubtargetInfo &STI) { 67 if (SyntaxVariant == 0) 68 return new NVPTXInstPrinter(MAI, MII, MRI, STI); 69 return nullptr; 70 } 71 72 // Force static initialization. 73 extern "C" void LLVMInitializeNVPTXTargetMC() { 74 // Register the MC asm info. 75 RegisterMCAsmInfo<NVPTXMCAsmInfo> X(TheNVPTXTarget32); 76 RegisterMCAsmInfo<NVPTXMCAsmInfo> Y(TheNVPTXTarget64); 77 78 // Register the MC codegen info. 79 TargetRegistry::RegisterMCCodeGenInfo(TheNVPTXTarget32, 80 createNVPTXMCCodeGenInfo); 81 TargetRegistry::RegisterMCCodeGenInfo(TheNVPTXTarget64, 82 createNVPTXMCCodeGenInfo); 83 84 // Register the MC instruction info. 85 TargetRegistry::RegisterMCInstrInfo(TheNVPTXTarget32, createNVPTXMCInstrInfo); 86 TargetRegistry::RegisterMCInstrInfo(TheNVPTXTarget64, createNVPTXMCInstrInfo); 87 88 // Register the MC register info. 89 TargetRegistry::RegisterMCRegInfo(TheNVPTXTarget32, 90 createNVPTXMCRegisterInfo); 91 TargetRegistry::RegisterMCRegInfo(TheNVPTXTarget64, 92 createNVPTXMCRegisterInfo); 93 94 // Register the MC subtarget info. 95 TargetRegistry::RegisterMCSubtargetInfo(TheNVPTXTarget32, 96 createNVPTXMCSubtargetInfo); 97 TargetRegistry::RegisterMCSubtargetInfo(TheNVPTXTarget64, 98 createNVPTXMCSubtargetInfo); 99 100 // Register the MCInstPrinter. 101 TargetRegistry::RegisterMCInstPrinter(TheNVPTXTarget32, 102 createNVPTXMCInstPrinter); 103 TargetRegistry::RegisterMCInstPrinter(TheNVPTXTarget64, 104 createNVPTXMCInstPrinter); 105 } 106
