1 ; RUN: llc < %s -mtriple armv8 -mattr=+neon | FileCheck %s 2 ; RUN: llc < %s -mtriple armv8 -mattr=+neon,+fp-armv8 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CHECK-FAST 3 4 define <4 x float> @vmaxnmq(<4 x float>* %A, <4 x float>* %B) nounwind { 5 ; CHECK: vmaxnmq 6 ; CHECK: vmaxnm.f32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} 7 %tmp1 = load <4 x float>* %A 8 %tmp2 = load <4 x float>* %B 9 %tmp3 = call <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float> %tmp1, <4 x float> %tmp2) 10 ret <4 x float> %tmp3 11 } 12 13 define <2 x float> @vmaxnmd(<2 x float>* %A, <2 x float>* %B) nounwind { 14 ; CHECK: vmaxnmd 15 ; CHECK: vmaxnm.f32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}} 16 %tmp1 = load <2 x float>* %A 17 %tmp2 = load <2 x float>* %B 18 %tmp3 = call <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float> %tmp1, <2 x float> %tmp2) 19 ret <2 x float> %tmp3 20 } 21 22 define <4 x float> @vminnmq(<4 x float>* %A, <4 x float>* %B) nounwind { 23 ; CHECK: vminnmq 24 ; CHECK: vminnm.f32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} 25 %tmp1 = load <4 x float>* %A 26 %tmp2 = load <4 x float>* %B 27 %tmp3 = call <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float> %tmp1, <4 x float> %tmp2) 28 ret <4 x float> %tmp3 29 } 30 31 define <2 x float> @vminnmd(<2 x float>* %A, <2 x float>* %B) nounwind { 32 ; CHECK: vminnmd 33 ; CHECK: vminnm.f32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}} 34 %tmp1 = load <2 x float>* %A 35 %tmp2 = load <2 x float>* %B 36 %tmp3 = call <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float> %tmp1, <2 x float> %tmp2) 37 ret <2 x float> %tmp3 38 } 39 40 define float @fp-armv8_vminnm_o(float %a, float %b) { 41 ; CHECK-FAST: fp-armv8_vminnm_o 42 ; CHECK-FAST-NOT: vcmp 43 ; CHECK-FAST: vminnm.f32 44 ; CHECK: fp-armv8_vminnm_o 45 ; CHECK-NOT: vminnm.f32 46 %cmp = fcmp olt float %a, %b 47 %cond = select i1 %cmp, float %a, float %b 48 ret float %cond 49 } 50 51 define float @fp-armv8_vminnm_u(float %a, float %b) { 52 ; CHECK-FAST: fp-armv8_vminnm_u 53 ; CHECK-FAST-NOT: vcmp 54 ; CHECK-FAST: vminnm.f32 55 ; CHECK: fp-armv8_vminnm_u 56 ; CHECK-NOT: vminnm.f32 57 %cmp = fcmp ult float %a, %b 58 %cond = select i1 %cmp, float %a, float %b 59 ret float %cond 60 } 61 62 define float @fp-armv8_vmaxnm_o(float %a, float %b) { 63 ; CHECK-FAST: fp-armv8_vmaxnm_o 64 ; CHECK-FAST-NOT: vcmp 65 ; CHECK-FAST: vmaxnm.f32 66 ; CHECK: fp-armv8_vmaxnm_o 67 ; CHECK-NOT: vmaxnm.f32 68 %cmp = fcmp ogt float %a, %b 69 %cond = select i1 %cmp, float %a, float %b 70 ret float %cond 71 } 72 73 define float @fp-armv8_vmaxnm_u(float %a, float %b) { 74 ; CHECK-FAST: fp-armv8_vmaxnm_u 75 ; CHECK-FAST-NOT: vcmp 76 ; CHECK-FAST: vmaxnm.f32 77 ; CHECK: fp-armv8_vmaxnm_u 78 ; CHECK-NOT: vmaxnm.f32 79 %cmp = fcmp ugt float %a, %b 80 %cond = select i1 %cmp, float %a, float %b 81 ret float %cond 82 } 83 84 85 declare <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float>, <4 x float>) nounwind readnone 86 declare <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float>, <2 x float>) nounwind readnone 87 declare <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float>, <4 x float>) nounwind readnone 88 declare <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float>, <2 x float>) nounwind readnone 89
