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      1 ; RUN: llc -O0 -disable-fp-elim -mtriple=powerpc-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC32
      2 ; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC64
      3 
      4 declare void @foo()
      5 
      6 define i32 @test_cr2() nounwind uwtable {
      7 entry:
      8   %ret = alloca i32, align 4
      9   %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmp 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind
     10   store i32 %0, i32* %ret, align 4
     11   call void @foo()
     12   %1 = load i32* %ret, align 4
     13   ret i32 %1
     14 }
     15 
     16 ; PPC32: stw 31, -4(1)
     17 ; PPC32: stwu 1, -32(1)
     18 ; PPC32: mfcr 12
     19 ; PPC32-NEXT: stw 12, 24(31)
     20 ; PPC32: lwz 12, 24(31)
     21 ; PPC32-NEXT: mtocrf 32, 12
     22 
     23 ; PPC64: .cfi_startproc
     24 ; PPC64: mfcr 12
     25 ; PPC64: stw 12, 8(1)
     26 ; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
     27 ; PPC64: .cfi_def_cfa_offset 128
     28 ; PPC64: .cfi_offset lr, 16
     29 ; PPC64: .cfi_offset cr2, 8
     30 ; PPC64: addi 1, 1, [[AMT]]
     31 ; PPC64: lwz 12, 8(1)
     32 ; PPC64: mtocrf 32, 12
     33 ; PPC64: .cfi_endproc
     34 
     35 define i32 @test_cr234() nounwind {
     36 entry:
     37   %ret = alloca i32, align 4
     38   %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmp 2,$2,$1\0A\09cmp 3,$2,$2\0A\09cmp 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind
     39   store i32 %0, i32* %ret, align 4
     40   call void @foo()
     41   %1 = load i32* %ret, align 4
     42   ret i32 %1
     43 }
     44 
     45 ; PPC32: stw 31, -4(1)
     46 ; PPC32: stwu 1, -32(1)
     47 ; PPC32: mfcr 12
     48 ; PPC32-NEXT: stw 12, 24(31)
     49 ; PPC32: lwz 12, 24(31)
     50 ; PPC32-NEXT: mtocrf 32, 12
     51 ; PPC32-NEXT: mtocrf 16, 12
     52 ; PPC32-NEXT: mtocrf 8, 12
     53 
     54 ; PPC64: mfcr 12
     55 ; PPC64: stw 12, 8(1)
     56 ; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
     57 ; PPC64: addi 1, 1, [[AMT]]
     58 ; PPC64: lwz 12, 8(1)
     59 ; PPC64: mtocrf 32, 12
     60 ; PPC64: mtocrf 16, 12
     61 ; PPC64: mtocrf 8, 12
     62 
     63