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      1 ; RUN: llc -O1 -mcpu=pwr7 -code-model=medium -filetype=obj %s -o - | \
      2 ; RUN: llvm-readobj -r | FileCheck %s
      3 
      4 ; FIXME: When asm-parse is available, could make this an assembly test.
      5 
      6 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
      7 target triple = "powerpc64-unknown-linux-gnu"
      8 
      9 @test_fn_static.si = internal global i32 0, align 4
     10 
     11 define signext i32 @test_fn_static() nounwind {
     12 entry:
     13   %0 = load i32* @test_fn_static.si, align 4
     14   %inc = add nsw i32 %0, 1
     15   store i32 %inc, i32* @test_fn_static.si, align 4
     16   ret i32 %0
     17 }
     18 
     19 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for
     20 ; accessing function-scoped variable si.
     21 ;
     22 ; CHECK: Relocations [
     23 ; CHECK:   Section (2) .rela.text {
     24 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM2:[^ ]+]]
     25 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
     26 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM2]]
     27 
     28 @gi = global i32 5, align 4
     29 
     30 define signext i32 @test_file_static() nounwind {
     31 entry:
     32   %0 = load i32* @gi, align 4
     33   %inc = add nsw i32 %0, 1
     34   store i32 %inc, i32* @gi, align 4
     35   ret i32 %0
     36 }
     37 
     38 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for
     39 ; accessing file-scope variable gi.
     40 ;
     41 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM3:[^ ]+]]
     42 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
     43 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM3]]
     44 
     45 define double @test_double_const() nounwind {
     46 entry:
     47   ret double 0x3F4FD4920B498CF0
     48 }
     49 
     50 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for
     51 ; accessing a constant.
     52 ;
     53 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM4:[^ ]+]]
     54 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM4]]
     55