1 ; RUN: llc -O0 -mcpu=pwr7 -code-model=medium -filetype=obj -fast-isel=false %s -o - | \ 2 ; RUN: llvm-readobj -r | FileCheck -check-prefix=MEDIUM %s 3 ; RUN: llc -O0 -mcpu=pwr7 -code-model=large -filetype=obj -fast-isel=false %s -o - | \ 4 ; RUN: llvm-readobj -r | FileCheck -check-prefix=LARGE %s 5 6 ; FIXME: When asm-parse is available, could make this an assembly test. 7 8 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" 9 target triple = "powerpc64-unknown-linux-gnu" 10 11 @ei = external global i32 12 13 define signext i32 @test_external() nounwind { 14 entry: 15 %0 = load i32* @ei, align 4 16 %inc = add nsw i32 %0, 1 17 store i32 %inc, i32* @ei, align 4 18 ret i32 %0 19 } 20 21 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 22 ; accessing external variable ei. 23 ; 24 ; MEDIUM: Relocations [ 25 ; MEDIUM: Section (2) .rela.text { 26 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]] 27 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]] 28 ; 29 ; LARGE: Relocations [ 30 ; LARGE: Section (2) .rela.text { 31 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]] 32 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]] 33 34 @test_fn_static.si = internal global i32 0, align 4 35 36 define signext i32 @test_fn_static() nounwind { 37 entry: 38 %0 = load i32* @test_fn_static.si, align 4 39 %inc = add nsw i32 %0, 1 40 store i32 %inc, i32* @test_fn_static.si, align 4 41 ret i32 %0 42 } 43 44 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for 45 ; accessing function-scoped variable si. 46 ; 47 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM2:[^ ]+]] 48 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM2]] 49 ; 50 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 51 ; accessing function-scoped variable si. 52 ; 53 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM2:[^ ]+]] 54 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]] 55 56 @gi = global i32 5, align 4 57 58 define signext i32 @test_file_static() nounwind { 59 entry: 60 %0 = load i32* @gi, align 4 61 %inc = add nsw i32 %0, 1 62 store i32 %inc, i32* @gi, align 4 63 ret i32 %0 64 } 65 66 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for 67 ; accessing file-scope variable gi. 68 ; 69 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM3:[^ ]+]] 70 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM3]] 71 ; 72 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 73 ; accessing file-scope variable gi. 74 ; 75 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM3:[^ ]+]] 76 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]] 77 78 define double @test_double_const() nounwind { 79 entry: 80 ret double 0x3F4FD4920B498CF0 81 } 82 83 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for 84 ; accessing a constant. 85 ; 86 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM4:[^ ]+]] 87 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM4]] 88 ; 89 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 90 ; accessing a constant. 91 ; 92 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM4:[^ ]+]] 93 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]] 94 95 define signext i32 @test_jump_table(i32 signext %i) nounwind { 96 entry: 97 %i.addr = alloca i32, align 4 98 store i32 %i, i32* %i.addr, align 4 99 %0 = load i32* %i.addr, align 4 100 switch i32 %0, label %sw.default [ 101 i32 3, label %sw.bb 102 i32 4, label %sw.bb1 103 i32 5, label %sw.bb2 104 i32 6, label %sw.bb3 105 ] 106 107 sw.default: ; preds = %entry 108 br label %sw.epilog 109 110 sw.bb: ; preds = %entry 111 %1 = load i32* %i.addr, align 4 112 %mul = mul nsw i32 %1, 7 113 store i32 %mul, i32* %i.addr, align 4 114 br label %sw.bb1 115 116 sw.bb1: ; preds = %entry, %sw.bb 117 %2 = load i32* %i.addr, align 4 118 %dec = add nsw i32 %2, -1 119 store i32 %dec, i32* %i.addr, align 4 120 br label %sw.bb2 121 122 sw.bb2: ; preds = %entry, %sw.bb1 123 %3 = load i32* %i.addr, align 4 124 %add = add nsw i32 %3, 3 125 store i32 %add, i32* %i.addr, align 4 126 br label %sw.bb3 127 128 sw.bb3: ; preds = %entry, %sw.bb2 129 %4 = load i32* %i.addr, align 4 130 %shl = shl i32 %4, 1 131 store i32 %shl, i32* %i.addr, align 4 132 br label %sw.epilog 133 134 sw.epilog: ; preds = %sw.bb3, %sw.default 135 %5 = load i32* %i.addr, align 4 136 ret i32 %5 137 } 138 139 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 140 ; accessing a jump table address. 141 ; 142 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM5:[^ ]+]] 143 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM5]] 144 ; 145 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM5:[^ ]+]] 146 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM5]] 147 148 @ti = common global i32 0, align 4 149 150 define signext i32 @test_tentative() nounwind { 151 entry: 152 %0 = load i32* @ti, align 4 153 %inc = add nsw i32 %0, 1 154 store i32 %inc, i32* @ti, align 4 155 ret i32 %0 156 } 157 158 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 159 ; accessing tentatively declared variable ti. 160 ; 161 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]] 162 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]] 163 ; 164 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]] 165 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]] 166 167 define i8* @test_fnaddr() nounwind { 168 entry: 169 %func = alloca i32 (i32)*, align 8 170 store i32 (i32)* @foo, i32 (i32)** %func, align 8 171 %0 = load i32 (i32)** %func, align 8 172 %1 = bitcast i32 (i32)* %0 to i8* 173 ret i8* %1 174 } 175 176 declare signext i32 @foo(i32 signext) 177 178 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 179 ; accessing function address foo. 180 ; 181 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM7:[^ ]+]] 182 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]] 183 ; 184 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM7:[^ ]+]] 185 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]] 186
